Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office action is in response to Applicant' s communication filed 6/12/2026 in response to the Office action dated 3/12/2026. Claims 1, 11, and 15-16 have been amended. Claims 14 and 17 have been cancelled. Claims 1-13, 15-16, and 18-20 are pending in this application.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5 and 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Redaelli (US 20240176506 A1) in view of Palmer (US 20240264746 A1).
Regarding claim 1, Redaelli teaches a computer-implemented method for increasing reliability of a current operation performed by a NAND flash device (Paragraph 15; Fig. 1, memory device 120 may be a NAND flash memory device),
the method comprising performing the following via a flash controller (Paragraph 13; Fig. 1, controller 130):
determining a temperature of the NAND flash device (Paragraph 47; Figs. 1 and 5, step 505, transmitting a temperature indication that indicates a temperature of memory device 120);
determining that the temperature satisfies a threshold (Paragraph 49; Fig. 5, step 515, determining whether the temperature satisfies a temperature threshold); and
responsive to the determination that the threshold is satisfied, performing additional operations on the NAND flash device (Paragraphs 49-50; Figs. 1 and 5, steps 515-520, in response to the temperature being below the temperature threshold (functionally similar to the minimum temperature threshold of the application being satisfied), performing a [additional] thermal throttling operation on the memory device 120).
Redaelli does not explicitly teach receiving a read request for data stored in the NAND flash device; and responsive to receiving the read request, determining a temperature of the NAND flash device.
However, Palmer teaches receiving a read request for data stored in the NAND flash device (Paragraph 86; Fig. 7, step 730, receiving a read request associated with data of a memory device); and
responsive to receiving the read request, determining a temperature of the NAND flash device (Paragraph 86; Fig. 7, step 740, based on receiving the read request, detecting a current temperature of the memory device).
Redaelli and Palmer are analogous art because they are in the same field of endeavor, that being temperature-based access management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Redaelli to further include the determining a temperature of the NAND flash device in response to a read request according to the teachings of Palmer. The motivation for doing so would have been to enable a reduction in errors associated with a temperature difference between a read request and a write request (Palmer, Paragraphs 18-19).
Regarding claim 2, Redaelli in view of Palmer teaches the computer-implemented method of claim 1, wherein the additional operations include one or both of read operation(s) and program operation(s) (Redaelli, Paragraph 50, the thermal throttling operation is performed by moving data (which includes reading data and re-writing it)).
Regarding claim 3, Redaelli in view of Palmer teaches the computer-implemented method of claim 1, wherein the additional operations heat the NAND flash device (Redaelli, Paragraph 62, the low temperature thermal throttling operation heats up the NAND memory cells).
Regarding claim 4, Redaelli in view of Palmer teaches the computer-implemented method of claim 1, wherein the current operation is to be performed at a particular location within NAND-based memory media of the NAND flash device (Redaelli, Paragraph 39; Fig. 1, a write/read command [current operation] instructs memory device 120 to write/read data to/from a location within memory), and
wherein the threshold is either: (i) a value for minimum device temperature (Redaelli, Paragraphs 11, 49; Figs. 1 and 5, step 515, the temperature threshold is set at a minimum safe temperature range (20° C) for the memory device 120), or (ii) a value for device temperature calculated based at least in part on a previous temperature measured in connection with a previous operation on the particular location.
Regarding claim 5, Redaelli in view of Palmer teaches the computer-implemented method of claim 4, wherein the flash controller defines the particular location using one or more of the following designations: a block, a sub-block, a word line, a bit line, and a cell (Redaelli, Paragraph 25; Fig. 1, controller 130 sends write/read instructions that target portions of memory 140, such as memory cells, sub-blocks, or blocks).
Regarding claim 8, Redaelli in view of Palmer teaches the computer-implemented method of claim 1, wherein the additional operations are either: (i) not requested by a host (Redaelli, Paragraphs 49, 62; Figs. 1 and 5, step 515, the thermal throttling operation is initiated by memory device 120 rather than being initiated by the host); or (ii) of lower priority than the current operation.
Regarding claim 9, Redaelli in view of Palmer teaches the computer-implemented method of claim 1, further comprising performing the following via the flash controller: determining a second temperature of the NAND flash device following the performing of the additional operations (Redaelli, Paragraph 58; Figs. 1 and 5, step 560, following the thermal throttling operation, determining that the temperature of memory device 120 has been satisfied);
determining that the second temperature is sufficient for performance of the current operation (Redaelli, Paragraph 58; Fig. 5, step 560, determining that the temperature threshold has been satisfied) and
responsive to determining the sufficiency for the current operation, performing the current operation (Redaelli, Paragraph 59; Fig. 5, step 565, in response to the temperature threshold being satisfied, performing background data operations (such as data folding, which includes reading and re-writing data)).
Regarding claim 10, Redaelli in view of Palmer teaches the computer-implemented method of claim 1, further comprising performing the following via the flash controller: determining a second temperature of the NAND flash device following the performing of the additional operations (Redaelli, Paragraph 61; Fig. 1, after performing the thermal throttling operation for a period of time, determining that the temperature of the memory device 120 does not satisfy the temperature threshold);
determining that the second temperature is not sufficient for performance of the current operation (Redaelli, Paragraph 61; Fig. 1, determining that the temperature of the memory device 120 does not satisfy the temperature threshold); and
responsive to determining the insufficiency for the current operation, performing second additional operations on the NAND flash device to heat the NAND flash device (Redaelli, Paragraphs 61-62; Fig. 1, upon determining that the temperature of the memory device 120 does not satisfy the temperature threshold, automatically initiating another thermal throttling operation, which heats the memory device until it satisfies the temperature threshold).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Redaelli in view of Palmer as applied to claim 4 above, and further in view of Duval et al. (US 20230315332 A1), hereinafter Duval.
Regarding claim 6, Redaelli in view of Palmer teaches the computer-implemented method of claim 4, the device temperature threshold (Redaelli, Paragraph 49; Figs. 1 and 5, step 515, determining whether the temperature of memory device 120 satisfies a temperature threshold), and
the operation on the particular location (Redaelli, Paragraph 39; Fig. 1, a write/read command instructs memory device 120 to write/read data to/from a location within memory).
Redaelli in view of Palmer does not explicitly teach wherein the threshold is the value for device temperature calculated based at least in part on the previous temperature measured in connection with the previous operation on the particular location, the previous operation being a program operation and the current operation being a read operation.
However, Duval teaches wherein the threshold is the value for device temperature calculated based at least in part on the previous temperature measured in connection with the previous operation on the particular location, the previous operation being a program operation and the current operation being a read operation (Paragraphs 43-45; Fig. 1, writing temperature metadata that is indicative of a temperature of memory system 110 during a write operation in order to determine a temperature range for performing a subsequent [current] read operation).
Redaelli, Palmer, and Duval are analogous art because they are in the same field of endeavor, that being temperature-based access management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Redaelli in view of Palmer to further include the setting of the temperature threshold according to a previous program operation according to the teachings of Duval. The motivation for doing so would have been to mitigate errors resulting from temperature differences between the previous and current operations (Duval, Paragraph 43).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Redaelli in view of Palmer as applied to claim 1 above, and further in view of Basso et al. (US 20240069784 A1), hereinafter Basso.
Regarding claim 7, Redaelli in view of Palmer teaches the computer-implemented method of claim 1 and the additional operations (Redaelli, Paragraph 50, thermal throttling operation).
Redaelli in view of Palmer does not explicitly teach wherein the additional operations are performed on one or both of: unused NAND blocks of the NAND flash device; and blocks of the NAND flash device that are scheduled for garbage collection.
However, Basso teaches wherein the additional operations are performed on one or both of: unused NAND blocks of the NAND flash device (Paragraph 79, dummy access operations are performed at one or more non-allocated virtual blocks); and
blocks of the NAND flash device that are scheduled for garbage collection (Paragraphs 34, 79, dummy access operations are performed on virtual blocks that are scheduled for erasing, such as selected blocks in a garbage collection operation).
Redaelli, Palmer, and Basso are analogous art because they are in the same field of endeavor, that being temperature-based access management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Redaelli in view of Palmer to further include the utilization of unused and garbage collection blocks for the additional operations according to the teachings of Basso. The motivation for doing so would have been to avoid interference with the additional read operations (Basso, Paragraph 79).
Claims 11-13, 15-16, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Redaelli in view of Duval, further in view of Basso.
Regarding claim 11, Redaelli teaches a NAND flash device controller comprising non-transitory computer-readable media having instructions embodied thereon (Paragraphs 16, 24; Fig. 1, NAND controller 130 may execute instructions stored on a non-transitory computer-readable medium) which,
when executed by one or more processors (Paragraph 16; Fig. 1, controller 130 includes one or more processing components), cause the one or more processors to:
determine a temperature of a NAND flash device (Paragraph 47; Figs. 1 and 5, step 505, transmitting a temperature indication that indicates a temperature of memory device 120);
determine that the temperature satisfies a threshold (Paragraph 49; Fig. 5, step 515, determining whether the temperature satisfies a temperature threshold); and
responsive to the determination that the threshold is satisfied, performing additional operations (Paragraphs 49-50; Figs. 1 and 5, steps 515-520, in response to the temperature being below the temperature threshold (functionally similar to the minimum temperature threshold of the application being satisfied), performing a [additional] thermal throttling operation on the memory device 120).
Redaelli does not explicitly teach determine a temperature of a NAND flash device in connection with a current operation to be performed at a particular location within the NAND flash device; the threshold comprising a value for device temperature calculated based at least in part on a previous temperature measured in connection with a previous operation on the particular location; and performing additional operations on one or both of: unused NAND blocks of the NAND flash device; and blocks of the NAND flash device that are scheduled for garbage collection.
However, Duval teaches determine a temperature of a NAND flash device in connection with a current operation to be performed at a particular location within the NAND flash device (Paragraph 43; Fig. 1, determining a temperature of memory system 110 during a write operation at a location); and
the threshold comprising a value for device temperature calculated based at least in part on a previous temperature measured in connection with a previous operation on the particular location (Paragraphs 43-45; Fig. 1, writing temperature metadata that is indicative of a temperature of memory system 110 during a [previous] write operation at a location in order to determine a temperature range [threshold] for performing a subsequent read operation at the location).
Redaelli and Duval are analogous art because they are in the same field of endeavor, that being temperature-based access management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the non-transitory computer-readable media of Redaelli to further include the setting of the temperature threshold according to a previous operation according to the teachings of Duval. The motivation for doing so would have been to mitigate errors resulting from temperature differences between the previous and current operations (Duval, Paragraph 43).
Redaelli in view of Duval does not explicitly teach performing additional operations on one or both of: unused NAND blocks of the NAND flash device; and blocks of the NAND flash device that are scheduled for garbage collection.
However, Basso teaches performing additional operations on one or both of: unused NAND blocks of the NAND flash device (Paragraph 79, dummy access operations are performed at one or more non-allocated virtual blocks); and
blocks of the NAND flash device that are scheduled for garbage collection (Paragraphs 34, 79, dummy access operations are performed on virtual blocks that are scheduled for erasing, such as selected blocks in a garbage collection operation).
Redaelli, Duval, and Basso are analogous art because they are in the same field of endeavor, that being temperature-based access management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the non-transitory computer-readable media of Redaelli in view of Duval to further include the utilization of unused and garbage collection blocks for the additional operations according to the teachings of Basso. The motivation for doing so would have been to avoid interference with the additional read operations (Basso, Paragraph 79).
Regarding claim 12, Redaelli in view of Duval, further in view of Basso teaches the non-transitory computer-readable media of claim 11, wherein the additional operations include one or both of read operation(s) and program operation(s) (Redaelli, Paragraph 50, the thermal throttling operation is performed by moving data (which includes reading data and re-writing it)).
Regarding claim 13, Redaelli in view of Duval, further in view of Basso teaches the non-transitory computer-readable media of claim 11, wherein the additional operations heat the NAND flash device (Redaelli, Paragraph 62, the low temperature thermal throttling operation heats up the NAND memory cells).
Regarding claim 15, Redaelli in view of Duval, further in view of Basso teaches the non-transitory computer-readable media of claim 11, wherein the instructions, when executed by the one or more processors, cause the one or more processors to define the particular location using one or more of the following designations: a block, a sub-block, a word line, a bit line, and a cell (Redaelli, Paragraph 25; Fig. 1, controller 130 sends write/read instructions that target portions of memory 140, such as memory cells, sub-blocks, or blocks).
Regarding claim 16, Redaelli in view of Duval, further in view of Basso teaches the non-transitory computer-readable media of claim 11, the previous operation being a program operation and the current operation being a read operation (Duval, Paragraphs 43-45; Fig. 1, writing the temperature of memory system 110 during a [previous] write operation in order to determine a temperature range for performing a subsequent [current] read operation).
Regarding claim 18, Redaelli in view of Duval, further in view of Basso teaches the non-transitory computer-readable media of claim 11, wherein the additional operations are either: (i) not requested by a host (Redaelli, Paragraphs 49, 62; Figs. 1 and 5, step 515, the thermal throttling operation is initiated by memory device 120 rather than being initiated by the host); or (ii) of lower priority than the current operation.
Regarding claim 19, Redaelli in view of Duval, further in view of Basso teaches the non-transitory computer-readable media of claim 11, wherein the instructions, when executed by the one or more processors, cause the one or more processors to: determine a second temperature of the NAND flash device following the performing of the additional operations (Redaelli, Paragraph 58; Figs. 1 and 5, step 560, following the thermal throttling operation, determining that the temperature of memory device 120 has been satisfied);
determine that the second temperature is sufficient for performance of the current operation (Redaelli, Paragraph 58; Fig. 5, step 560, determining that the temperature threshold has been satisfied); and
responsive to determining the sufficiency for the current operation, performing the current operation (Redaelli, Paragraph 59; Fig. 5, step 565, in response to the temperature threshold being satisfied, performing background data operations (such as data folding, which includes reading and re-writing data)).
Regarding claim 20, Redaelli in view of Duval, further in view of Basso teaches the non-transitory computer-readable media of claim 11, wherein the instructions, when executed by the one or more processors, cause the one or more processors to: determine a second temperature of the NAND flash device following the performing of the additional operations (Redaelli, Paragraph 61; Fig. 1, after performing the thermal throttling operation for a period of time, determining that the temperature of the memory device 120 does not satisfy the temperature threshold);
determine that the second temperature is not sufficient for performance of the current operation (Redaelli, Paragraph 61; Fig. 1, determining that the temperature of the memory device 120 does not satisfy the temperature threshold); and
responsive to determining the insufficiency for the current operation, performing second additional operations on the NAND flash device to heat the NAND flash device (Redaelli, Paragraphs 61-62; Fig. 1, upon determining that the temperature of the memory device 120 does not satisfy the temperature threshold, automatically initiating another thermal throttling operation, which heats the memory device until it satisfies the temperature threshold).
Response to Arguments
Applicant’s arguments (see pages 6-7 of the remarks) filed 6/12/2026, with respect to the rejections of claims 1-5 and 8-10 under 35 U.S.C 102 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration a new ground(s) of rejection is made in view of Redaelli and Palmer.
Applicant’s arguments (see pages 7-8 of the remarks) filed 6/12/2026, with respect to the rejections of claims 11-13, 15, and 18-20 under 35 U.S.C 102 have been fully considered, but are not persuasive.
Regarding amended claim 11, the Applicant argues that Redaelli and the remaining references of record do not teach the limitations: “the threshold comprising a value for device temperature calculated based at least in part on a previous temperature measured in connection with a previous operation on the particular location”, and “performing additional operations on one or both of: unused NAND blocks of the NAND flash device; and blocks of the NAND flash device that are scheduled for garbage collection”.
However, Duval teaches setting the temperature threshold based on a locational temperature of a previous operation (Duval, Paragraphs 43-45, Fig. 1, collecting temperature information of memory system 110 during a [previous] write operation at a location to determine a set of temperature ranges and using the temperature ranges when performing a subsequent read operation at the same location). In addition, Basso teaches performing additional operations on unused blocks of a memory device (Basso, Paragraph 79, performing dummy access operations on non-allocated memory device blocks) as well as performing additional operations on blocks scheduled for garbage collection (Basso, Paragraphs 34, 79, performing dummy access operations on blocks that are flagged for erasing, such as blocks in a garbage collection operation).
The Examiner argues that the cited areas of the Duval and Basso teach the amended limitations of claim 11, and further notes any other arguments with respect to claim 11 are consummate in scope with the argument above. Thus, the Examiner maintains the rejections set forth above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Pinga whose telephone number is (571) 272-2620. The examiner can normally be reached on M-F 8:30am-6pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla, can be reached on (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/J.M.P./Examiner, Art Unit 2137
/Arpan P. Savla/Supervisory Patent Examiner, Art Unit 2137
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