DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1 – 20 remain pending in the application and have been fully considered.
Claim Objections
Claims 6, 7, 8, 9 are objected to under 37 CFR 1.75 as being a substantial duplicate of claims 2, 3, 4, and 5. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 – 20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lee (US 2024/0416882).
The applied reference has a common assignee, HL Mando Corp., with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement.
Regarding Claim 1:
Lee teaches a brake apparatus comprising: first and second wheel speed sensors (70, paragraph 0105) associated with a wheel of a vehicle and configured to measure a speed of the wheel; one or more controllers (110, 210) configured to control braking of the wheel of the vehicle in response to a wheel speed signal outputted from at least one of the first and second wheel speed sensors; a brake actuator (156, 256) operably coupled to the wheel of the vehicle and configured to brake the wheel; first and second brake drive circuits (112, 113, 212, 213) configured to control a power source (Vdd1, Vdd2) of the brake actuator in response to control of the one or more controllers; an actuator housing (via 100) to which the first and second wheel speed sensors are coupled and in which the first and second brake drive circuits are included; and a plurality of circuits (fig 4 – 5 shows the circuitry and signal connections between each element) connecting the first wheel speed sensor, the second wheel speed sensor, the first brake drive circuit, and the second brake drive circuit to the one or more controllers.
Regarding Claim 2:
Lee teaches the one or more controllers comprises one or more processors (111, 211) configured to receive the wheel speed signal of at least one of the first and second wheel speed sensors.
Regarding Claim 3:
Lee teaches the plurality of circuits comprises first and second circuits separated (112, 113, 212, 213) from each other and configured to connect the one or more processors to the first wheel speed sensor, the second wheel speed sensor, the first brake drive circuit, and the second brake drive circuit (Figs 4 – 5).
Regarding Claim 4:
Lee teaches the one or more processors are configured to: transmit a brake control signal, which is generated based on the wheel speed signal of at least one of the first and second wheel speed sensors, to at least one of the first and second brake drive circuits through one of the first and second circuits, and supply power to at least one of the first and second brake drive circuits through another of the first and second circuits (Figs 4 – 5, via 117 and 212, see abstract, and paragraphs 0122 – 0128).
Regarding Claim 5:
Lee teaches the one or more processors are configured to, in an abnormal state of one of the first and second brake drive circuits: transmit a brake control signal to another of the first and second brake drive circuits through the first circuit, and supply power to the another of the first and second brake drive circuits through the second circuit (paragraph 0059).
Regarding Claim 6:
Lee teaches the one or more controllers comprise first and second processors (111 211) configured to receive the wheel speed signal of at least one of the first and second wheel speed sensors.
Regarding Claim 7:
Lee teaches he plurality of circuits comprises first and second circuits (112, 113, 212, 213) separated from each other and configured to connect the first and second processors to the first wheel speed sensor, the second wheel speed sensor, the first brake drive circuit, and the second brake drive circuit.
Regarding Claim 8:
Lee teaches wherein at least one of the first and second processors is configured to: transmit a brake control signal, which is generated based on the wheel speed signal of at least one of the first and second wheel speed sensors, to at least one of the first and second brake drive circuits through one of the first and second circuits, and supply power to at least one of the first and second brake drive circuits through another of the first and second circuits (Figs 4 – 5, via 117 and 212, see abstract, and paragraphs 0122 – 0128).
Regarding Claim 9:
Lee teaches wherein at least one of the first and second processors is configured to, in an abnormal state of one of the first and second brake drive circuits: transmit a brake control signal to another of the first and second brake drive circuits through the first circuit, and supply power to the another of the first and second brake drive circuits through the second circuit (paragraph 0059).
Regarding Claim 10:
Lee teaches a brake apparatus comprising: first and second wheel speed sensors (70, paragraph 0105) disposed in a wheel of a vehicle and configured to sense a speed of the wheel; a first controller (110) configured to control braking of the wheel in response to a wheel speed signal outputted from one of the first and second wheel speed sensors (Figs 4 – 5); a second controller (110) configured to receive a wheel speed signal outputted from another of the first and second wheel speed sensors and communicationally connected with the first controller through a network of the vehicle (Figs 4 – 5); a brake actuator (156, 256) associated with the wheel of the vehicle and configured to brake the wheel; first and second brake drive circuits (112, 113, 212, 213) configured to control a power source of the brake actuator in response to control of the first controller; an actuator housing (via 100) to which the first and second wheel speed sensors are coupled and in which the first and second brake drive circuits are included; and a plurality of circuits connecting the first wheel speed sensor, the second wheel speed sensor, the first brake drive circuit, and the second brake drive circuit to the first and second controllers (Figs 4 – 5).
Regarding Claim 11:
See rejection of Claim 2 above.
Regarding Claim 12:
See rejection of Claim 3 above.
Regarding Claim 13:
See rejection of Claim 4 above.
Regarding Claim 14:
See rejection of Claim 5 above.
Regarding Claim 15:
Lee teaches the plurality of circuits comprises third and fourth circuits (212, 213) separated from each other and configured to connect the second processor to the another of the first and second wheel speed sensors.
Regarding Claim 16:
Lee teaches the second processor is configured to: receive a wheel speed signal of the another of the first and second wheel speed sensors through one of the third and fourth circuits, transmit the wheel speed signal of the another of the first and second wheel speed sensors to the first processor through the network of the vehicle, and supply power to the another of the first and second wheel speed sensors through another of the third and fourth circuits (Figs 4 – 5).
Regarding Claim 17:
Lee teaches the plurality of circuits is separated from one another and comprises: first and second circuits configured to connect the first processor to the first brake drive circuit, the second brake drive circuit, and one of the first and second wheel speed sensors; and third and fourth circuits configured to connect the second processor to the first brake drive circuit, and the second brake drive circuit, and another of the first and second wheel speed sensors (Figs 4 – 5).
Regarding Claim 18:
Lee teaches the first processor is configured to transmit a brake control signal, which is generated based on a wheel speed signal of one of the first and second wheel speed sensors, to at least one of the first and second brake drive circuits through one of the first and second circuits, and the second processor is configured to receive a wheel speed signal of another of the first and second wheel speed sensors through one of the third and fourth circuits, transmit the wheel speed signal of the another of the first and second wheel speed sensors to the first processor through the network of the vehicle, and supply power to at least one of the first and second brake drive circuits through one of the third and fourth circuits (Figs 4 – 5).
Regarding Claim 19:
See rejection of Claim 5 above.
Regarding Claim 20:
See rejection of Claim 5 above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LONG T TRAN whose telephone number is (571)270-1899. The examiner can normally be reached Mon - Fri 9:00 - 5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Logan Kraft can be reached at 571-270-5065. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LONG T TRAN/Primary Examiner, Art Unit 3747