DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is responsive to the application filed 30 January 2025 and the preliminary amendment filed 23 April 2025.
Claims 2-21 are pending and have been presented for examination.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 2, 10-12 and 20 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by YANG (U.S. Patent Application Publication #2016/0246672).
2. YANG discloses An apparatus, comprising: processing circuitry associated with one or more memory devices (see [0025]: memory controller implemented on an ASIC; [0026]: memory controller communicates with the memory, this would be considered associated with the memory) and configured to cause the apparatus to: transmit parameter data for operating a memory system based at least in part on the memory system being booted for a first occurrence (see [0047]: configuration data transmitted from controller ROM); receive one or more error control codes associated with the parameter data based at least in part on transmitting the parameter data (see [0047]: ECC engine computes and ECC for the read configuration data); transmit the parameter data and the one or more error control codes based at least in part on the memory system being booted for a second occurrence (see [0047]: ECC is stored with the configuration data in a memory page, on a subsequent power-on, the configuration data and ECC are read from the page); and receive corrected parameter data based at least in part on transmitting the parameter data and the one or more error control codes (see [0046]: ECCC can be used for correction of data, if there was a correctable error in the configuration data, the system would use the ECC to correct the data and present corrected configuration data).
10. The apparatus of claim 2, wherein the processing circuitry is further configured to cause the apparatus to: receive a signal from a host system to boot the memory system for the first occurrence (see [0034]: command to start operation); and perform, as part of booting the memory system for the first occurrence and based at least in part on receiving the signal from the host system, one or more processes to provide power to the memory system (see [0034]: starting operation is part of powering the system on), to initiate software stored at the memory system (see [0031]: software instructions in the controller ROM execute to allow the controller to function), or both, wherein transmitting the parameter data is based at least in part on performing the one or more processes (see [0047]: parameter data is transferred from the ROM as part of the power-on start-up operation).
11. The apparatus of claim 2, wherein the processing circuitry is further configured to cause the apparatus to: receive a signal from a host system to boot the memory system for the second occurrence (see [0034]: command to start operation); and perform, as part of booting the memory system for the second occurrence and based at least in part on receiving the signal from the host system, one or more processes to provide power to the memory system (see [0034]: starting operation is part of powering the system on), to initiate software stored at the memory system (see [0031]: software instructions in the controller ROM execute to allow the controller to function), or both, wherein transmitting the parameter data and the one or more error control codes is based at least in part on performing the one or more processes (see [0047]: parameter data is read from the memory page based on the power-on and start-up process).
12. YANG discloses A method, comprising: transmitting parameter data for operating a memory system based at least in part on the memory system being booted for a first occurrence (see [0047]: configuration data transmitted from controller ROM); receiving one or more error control codes associated with the parameter data based at least in part on transmitting the parameter data (see [0047]: ECC engine computes and ECC for the read configuration data); transmitting the parameter data and the one or more error control codes based at least in part on the memory system being booted for a second occurrence (see [0047]: ECC is stored with the configuration data in a memory page, on a subsequent power-on, the configuration data and ECC are read from the page); and receiving corrected parameter data based at least in part on transmitting the parameter data and the one or more error control codes (see [0046]: ECCC can be used for correction of data, if there was a correctable error in the configuration data, the system would use the ECC to correct the data and present corrected configuration data).
20. YANG discloses A non-transitory computer-readable medium storing code, the code comprising instructions executable by one or more processors to: transmit parameter data for operating a memory system based at least in part on the memory system being booted for a first occurrence (see [0047]: configuration data transmitted from controller ROM); receive one or more error control codes associated with the parameter data based at least in part on transmitting the parameter data (see [0047]: ECC engine computes and ECC for the read configuration data); transmit the parameter data and the one or more error control codes based at least in part on the memory system being booted for a second occurrence (see [0047]: ECC is stored with the configuration data in a memory page, on a subsequent power-on, the configuration data and ECC are read from the page); and receive corrected parameter data based at least in part on transmitting the parameter data and the one or more error control codes (see [0046]: ECCC can be used for correction of data, if there was a correctable error in the configuration data, the system would use the ECC to correct the data and present corrected configuration data).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 3, 13 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over YANG (U.S. Patent Application Publication #2016/0246672) in view of SASIDHARAN (U.S. Patent Application Publication #2019/0339888).
3. The apparatus of claim 2 (see YANG above), wherein the processing circuitry is further configured to cause the apparatus to: receive, from a host system and after the memory system is booted for the first occurrence, a first request for the parameter data; transmit, to the one or more memory devices, a second request for the parameter data based at least in part on the first request; and receive the parameter data from the one or more memory devices based at least in part on the second request, wherein transmitting the parameter data is based at least in part on receiving the parameter data from the one or more memory devices (see SASIDHARAN below).
SASIDHARAN discloses the following limitations that are not taught by YANG: receive, from a host system and after the memory system is booted for the first occurrence, a first request for the parameter data (see [0034]-[0035]: in response to initialization from a host, the host initiates a boot partition read procedure); transmit, to the one or more memory devices, a second request for the parameter data based at least in part on the first request (see [0035]: controller reads data from the boot partition); and receive the parameter data from the one or more memory devices based at least in part on the second request (see [0035]: controller obtains the data from the boot partition), wherein transmitting the parameter data is based at least in part on receiving the parameter data from the one or more memory devices (see [0036]: controller output the data from the boot partition to the host). The host can then use the data from the boot partition to configure overall operation of the storage controller (see [0036]). Storing parameter data in the boot partition, and allowing the host to request the data, allows for adding new features to the storage system that may not be supported by the existing register set (see [0028]).
It would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to which said subject matter pertains to modify YANG to receive a request for parameter data from a host, as disclosed by SASIDHARAN. One of ordinary skill in the art would have been motivated to make such a modification to allow additional features to be added, as taught by SASIDHARAN. YANG and SASIDHARAN are analogous/in the same field of endeavor as both references are directed to configuration of a storage system.
13. The method of claim 12 (see YANG above), further comprising: receiving, from a host system and after the memory system is booted for the first occurrence, a first request for the parameter data; transmitting, to a memory device of the memory system, a second request for the parameter data based at least in part on the first request; and receiving the parameter data from the memory device based at least in part on the second request, wherein transmitting the parameter data is based at least in part on receiving the parameter data from the memory device (see SASIDHARAN below).
SASIDHARAN discloses the following limitations that are not taught by YANG: receive, from a host system and after the memory system is booted for the first occurrence, a first request for the parameter data (see [0034]-[0035]: in response to initialization from a host, the host initiates a boot partition read procedure); transmit, to the one or more memory devices, a second request for the parameter data based at least in part on the first request (see [0035]: controller reads data from the boot partition); and receive the parameter data from the one or more memory devices based at least in part on the second request (see [0035]: controller obtains the data from the boot partition), wherein transmitting the parameter data is based at least in part on receiving the parameter data from the one or more memory devices (see [0036]: controller output the data from the boot partition to the host). The host can then use the data from the boot partition to configure overall operation of the storage controller (see [0036]). Storing parameter data in the boot partition, and allowing the host to request the data, allows for adding new features to the storage system that may not be supported by the existing register set (see [0028]).
It would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to which said subject matter pertains to modify YANG to receive a request for parameter data from a host, as disclosed by SASIDHARAN. One of ordinary skill in the art would have been motivated to make such a modification to allow additional features to be added, as taught by SASIDHARAN. YANG and SASIDHARAN are analogous/in the same field of endeavor as both references are directed to configuration of a storage system.
21. The non-transitory computer-readable medium of claim 20 (see YANG above), wherein the instructions are further executable by the one or more processors to: receive, from a host system and after the memory system is booted for the first occurrence, a first request for the parameter data; transmit, to a memory device of the memory system, a second request for the parameter data based at least in part on the first request; and receive the parameter data from the memory device based at least in part on the second request, wherein transmitting the parameter data is based at least in part on receiving the parameter data from the memory device (see SASIDHARAN below).
SASIDHARAN discloses the following limitations that are not taught by YANG: receive, from a host system and after the memory system is booted for the first occurrence, a first request for the parameter data (see [0034]-[0035]: in response to initialization from a host, the host initiates a boot partition read procedure); transmit, to the one or more memory devices, a second request for the parameter data based at least in part on the first request (see [0035]: controller reads data from the boot partition); and receive the parameter data from the one or more memory devices based at least in part on the second request (see [0035]: controller obtains the data from the boot partition), wherein transmitting the parameter data is based at least in part on receiving the parameter data from the one or more memory devices (see [0036]: controller output the data from the boot partition to the host). The host can then use the data from the boot partition to configure overall operation of the storage controller (see [0036]). Storing parameter data in the boot partition, and allowing the host to request the data, allows for adding new features to the storage system that may not be supported by the existing register set (see [0028]).
It would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to which said subject matter pertains to modify YANG to receive a request for parameter data from a host, as disclosed by SASIDHARAN. One of ordinary skill in the art would have been motivated to make such a modification to allow additional features to be added, as taught by SASIDHARAN. YANG and SASIDHARAN are analogous/in the same field of endeavor as both references are directed to configuration of a storage system.
Allowable Subject Matter
Claims 4-9 and 14-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The state of the art fails to anticipate, or render obvious, “… the one or more error control codes are received from a host device and the parameter data and the one or more error control codes are transmitted to the host device, and the processing circuitry is further configured to cause the apparatus to: transmit, prior to transmitting the parameter data and the one or more error control codes to the host device, the one or more error control codes to the one or more memory devices for storage at the one or more memory devices.”
The state of the art fails to anticipate, or render obvious, “… receive, from a host system and after the memory system is booted for the second occurrence, a first request for the parameter data and the one or more error control codes; transmit, to the one or more memory devices, a second request for the parameter data and the one or more error control codes based at least in part on the first request; and receive the parameter data and the one or more error control codes from the one or more memory devices based at least in part on the second request, wherein transmitting the parameter data and the one or more error control codes is based at least in part on receiving the parameter data and the one or more error control codes from the one or more memory devices.”
The state of the art fails to anticipate, or render obvious, “… the corrected parameter data is received from a host device, and the processing circuitry is further configured to cause the apparatus to: transmit the corrected parameter data to the one or more memory devices based at least in part on receiving the corrected parameter data from the host device.”
The cited references disclose the host requesting parameter data, and the ECC functions implemented by the storage controller. The host does not request parameter data or provide corrected parameter data. The state of the art does not suggest making such a modification to the cited references. Sending the parameter data to the host for error correction introduces additional opportunities for errors to occur. While the host is capable of performing ECC operations, the motivation to move the ECC operations off the storage device and onto the host are lacking.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
RAVIMOHAN [2022/0269603] discloses a host reading parameters from a storage device [0037]-[0038]
KURAMOTO [11,372,700] discloses error checking data that is transmitted between integrated circuits, detect an error in data, correction of data errors. [Columns 7 and 8]
HER [2020/0167227] discloses storing parameter data with CRC data and correcting errors in parameter data. [0044]-[0067]
HARA [2015/0248322] discloses detection of errors during power supply start-up to a memory chip. [Abstract]
Conclusion
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/EDWARD J DUDEK JR/Primary Examiner, Art Unit 2132