DETAILED ACTION
1. This Office Action is responsive to claims filed for No. 19/042,394 on January 31, 2025. Please note Claims 1-18 are pending.
Notice of Pre-AIA or AIA Status
2. The present application is being examined under the pre-AIA first to invent provisions.
Information Disclosure Statement
3. The information disclosure statements (IDS) submitted on January 31, 2025 (2 submissions) and May 7, 2025 were filed. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 103
4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
6. Claims 1-9 and 12-18 are rejected under 35 U.S.C. 103 as being unpatentable over Tsuboi ( US 2021/0111227 A1 ) in view of Seo et al. ( US 2025/0017042 A1 ).
Tsuboi teaches in Claim 1:
A light-emitting device in which a plurality of pixels are arranged in a matrix in a semiconductor substrate ( Figure 14, [0083] disclose a light emitting device 101 with a plurality of pixels arranged in a matrix ), wherein
each of the plurality of pixels includes a light-emitting element, a driving transistor configured to supply a current to the light-emitting element, and a switching transistor configured to control the light-emitting element ( Figure 15, [0084] discloses a light emitting element 201, a driving transistor 202 and a reset transistor 1501 (read as a switching transistor which controls 201 ); but
Tsuboi does not explicitly teach of “a gate electrode of the switching transistor is provided on at least two faces of four faces surrounding a cross section of a region to be a channel.”
While Tsuboi does focus on the semiconductor layering, ( Tsuboi, Figure 17 ), Tsuboi is silent with regards to the particular cross-sectional which shows the faces of the gate electrode. To emphasize, in the same field of endeavor, transistor layouts, Seo teaches of a view of an akin transistor Tr1, ( Seo, Figure 9, [0163] ), which is also between the driving TFT and the light emitting element, as shown in Figure 4. Notably, Seo teaches an akin gate electrode 222 disposed in conjunction with channel region 212a. Please note first side surface 222a and second side surface 222b of the gate electrode 222 and in general, these aspects are provided on at least two faces surrounding a cross section of channel 212a, as clearly shown. Respectfully, this is a well known structure and can be designed/combined with Tsuboi.
Therefore, it would have been obvious to one of ordinary skill in the art, at the effective filed date of the invention, to implement the siding surface alignment, as taught by Seo, with the motivation that the lengths of lines in the gate driving circuit can be reduced or minimized, ( Seo, [0167] ). Furthermore, by reducing/minimizing aspects, it may prevent or reduce penetration of moisture or oxygen into the light emitting layer, ( Seo, [0034] ).
Tsuboi teaches in Claim 2:
The device according to claim 1, wherein a part of the gate electrode is provided in a groove of the semiconductor substrate, and a depth of the groove is larger than twice a thickness of a gate insulating film. ( Figure 7, [0127]+ disclose a different view of gate 222 of Tr1, it shows 222 being provided within the channel 212 and also within buffer layer 158. As is shown, the groove/depth of substrate 158 and channel 212 combined is larger than twice the thickness of gate insulating layer 166 )
Tsuboi teaches in Claim 3:
The device according to claim 2, wherein the depth of the groove is shallower than a depth of an element insulation portion. ( Figure 7, [0097] discloses first interlayer insulating layer 174 and second interlayer insulating layer 176 (read these an element insulation portion, which is not well defined). As shown, the depth of the interpreted groove is shallower than a depth of 174 and 176 combined )
Tsuboi teaches in Claim 4:
The device according to claim 2, wherein a width of the groove is not more than twice a thickness of the gate electrode on a surface of the semiconductor substrate. ( Figure 7 shows the interpreted groove width is not, at the very least, more than twice the thickness of gate 222, as shown )
Tsuboi teaches in Claim 5:
The device according to claim 1, wherein the gate electrode includes two faces facing with respect to the region to be the channel, and one face between the two faces. ( Figure 9 shows the two side surfaces 222a and 222b, as well as an unlabeled surface between these, at the far right of Figure 9 )
Tsuboi teaches in Claim 6:
The device according to claim 1, wherein the gate electrode of the switching transistor has an inverted U-shape with respect to a bottom surface of the semiconductor substrate in a cross section perpendicular to a direction of a current flowing through the channel. ( Please note the similarities of Applicant’s Figure 4B and Seo’s Figure 9. Furthermore, Seo teaches in Figure 7 of an inverted U-shape for Tr1 in general. Furthermore, Figure 9 shows the 212a, b and c which connect and help define the inverted U-shape )
Tsuboi and Seo teach in Claim 7:
The device according to claim 1, wherein one of a source and a drain of the switching transistor is connected to a connection portion between a first main terminal of the light-emitting element and one of a source and a drain of the driving transistor, and the other of the source and the drain of the switching transistor is connected to a predetermined potential. ( Seo, Figure 9 shows a drain electrode 232 on one side of gate 222 and a source electrode 234 on the other side of gate 222. Figure 7 shows the connection aspects between these using the channel region 212. As for the predetermined potential, Tsuboi, Figure 15 shows a VSS connection to both 1501 and 201 )
Tsuboi and Seo teach in Claim 8:
The device according to claim 7, wherein a region functioning as one of the source and the drain of the switching transistor and a region functioning as one of the source and the drain of the driving transistor share a diffusion region of the semiconductor substrate. ( Figure 17, [0087] disclose a diffusion region 406a for the drain and diffusion region 4041 for the source. Please note the sharing of regions and this similar concept is taught by Seo in Figures 7 and 9 as well )
Tsuboi and Seo teach in Claim 9:
The device according to claim 1, wherein a gate electrode of the driving transistor has a planar structure. ( Seo, Figure 9, [0162] shows a planar structure for the gate electrode 222 )
Tsuboi teaches in Claim 12:
An image forming device comprising a photosensitive member, an exposure light source configured to expose the photosensitive member, a developing device configured to apply a developing agent to the exposed photosensitive member, and a transfer device configured to transfer an image developed by the developing device to a print medium, wherein the exposure light source includes a light-emitting device defined in claim 1. ( Figure 24, [0126] discloses a photoelectric conversion device including an optical unit as well as a display unit for displaying information acquired by an imaging element. Please note the imaging unit for aspects of an exposed member, transferring light/imaging and then printing/displaying )
Tsuboi teaches in Claim 13:
An image capturing device comprising an optical unit including a plurality of lenses, an image capturing element configured to receive light having passed through the optical unit, and a display unit configured to display an image captured by the image capturing element, wherein the display unit includes a light-emitting device defined in claim 1. ( Figure 24, [0126] discloses a photoelectric conversion device including an optical unit as well as a display unit for displaying information acquired by an imaging element. Please note the imaging unit for aspects of an exposed member, transferring light/imaging and then printing/displaying. Also, please note the plurality of lenses, etc )
Tsuboi teaches in Claim 14:
A display device comprising a display unit including a light-emitting device defined in claim 1, and a housing provided with the display unit. ( Figure 24 discloses a display device with an upper cover, lower cover, etc, i.e. a housing which holds the elements )
Tsuboi teaches in Claim 15:
An electronic apparatus comprising a display unit including a light-emitting device defined in claim 1, a housing provided with the display unit, and a communication unit provided in the housing and configured to perform external communication. ( Figure 24, [0125] discloses a light emitting device 101, a display panel 2405, a frame 2406 (read as housing) and [0131] discloses a communication unit )
Tsuboi teaches in Claim 16:
An illumination device comprising a light source including a light-emitting device defined in claim 1, and one of a light diffusing unit and an optical film configured to transmit light emitted by the light source. ( [0124], [0134] discloses a light source, light-diffusing unit and optical film 2804 )
Tsuboi teaches in Claim 17:
A mobile body comprising a lighting appliance including a light-emitting device defined in claim 1, and a body provided with the lighting appliance. ( Figure 24 discloses a display device with an upper cover, lower cover, etc, i.e. a housing which holds the elements )
As per Claim 18:
Tsuboi does not explicitly teach of a “wearable device” configured to display an image
However, light emitting units/displays in wearable devices are well known, such as watches, etc. Respectfully, this is an intended use limitation and this lower level of detail is not patentably distinct.
Therefore, it would have been obvious to one of ordinary skill in the art, at the effective filed date of the invention, to implement the device of Tsuboi in a wearable device, with the motivation that it is an intended use limitation and one of ordinary skill in the art could apply Tsuboi’s invention in a number of devices, including wearable devices.
7. Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Tsuboi
( US 2021/0111227 A1 ) in view of Seo et al. ( US 2025/0017042 A1 ), as applied to Claim 1, further in view of Tsuboi ( US 2022/0173190 A1 ), hereinafter referred to as Tsuboi2.
As per Claim 10:
Tsuboi does not explicitly teach “wherein the driving transistor has an LDD structure.”
However, in the same field of endeavor, transistor fabrication, Tsuboi2 teaches that each transistor shown in Figure 11 has a lightly doped drain (LDD) structure. Respectfully, such a type of structure is well known in the art.
Therefore, it would have been obvious to one of ordinary skill in the art, at the effective filed date of the invention, to implement the LDD structure, as taught by Tsuboi2, with the motivation that this is a well known type of structure to design transistors. Tsuboi2 teaches in [0060] of reducing leakage current, a known benefit of LDD design.
As per Claim 11:
Tsuboi does not explicitly teach “wherein at least one of the driving transistor and the switching transistor includes a silicide in a region where at least one of a source and a drain is arranged.”
Initially, Tsuboi, Figures 15-17, [0057] disclose a doped silicon as part of the diffusion regions, (where the drain and source are located).
To further emphasize, in the same field of endeavor, transistor fabrication, Tsuboi2 teaches of a write transistor, ( Tsuboi2, Figure 2, [0080] ). Notably, Tsuboi2 teaches of a silicide region obtained by reacting part of the diffusion region with a metal. Respectfully, a silicide, notably a metal component, is well known for transistor fabrication, such as for contact plug regions.
Therefore, it would have been obvious to one of ordinary skill in the art, at the effective filed date of the invention, to implement the silicide, as taught by Tsuboi2, with the motivation that by constructing the contact plugs with a metal aspect can have a lower resistivity, as well as increasing distance between the chemical compound and electrical regions, ( Tsuboi2, [0088] ).
Conclusion
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DENNIS P JOSEPH whose telephone number is (571)270-1459. The examiner can normally be reached Monday - Friday 5:30 - 3:30 EST.
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/DENNIS P JOSEPH/Primary Examiner, Art Unit 2621