DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Request for Reconsideration
The Response filed 24 June 2026 has been entered. Claims 1-12 remain pending in the application. Examiner further acknowledges arguments concerning the claims which were found unpersuasive.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 5, 7-8, and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lih et al (U.S. Patent Pub. No. 2014/0036680), hereinafter referred to as Lih.
As for claim 1, Lih teaches a data receiving and transmitting method, executed by a processor reading at least one command stored in a memory (Fig. 6), comprising: receiving and transmitting a plurality of general priority data by a first request block (¶ 0026 lines 1-11 buffers store packets (i.e. requests) with priorities for receiving and transmitting; lines 11-25 each buffer stores a priority of data, including lowest (general) priority data 4 in buffer 4); receiving and transmitting a plurality of high priority data by a second request block (¶ 0026 lines 27-29 high priority data may be handled by a shared buffer); and if the first request block is unable to receive and transmit a portion data of the plurality of general priority data, receiving and transmitting the portion data of the plurality of general priority data by the second request block (¶ 0026 lines 25-27 shared buffer may be used by any type if its buffer is full i.e. it is unable to receive and transmit more data), achieving the claimed limitation.
As for claim 2, the previously cited references teach the method of claim 1. Additionally, Lih ¶ 0039, lines 1-4 disclose that high priority packets are transferred earlier than low priority packets, meaning that if the shared buffer contains high and low priority packets (such as in the example in ¶ 0035 wherein the shared buffer groups packets of different priorities together), high priority packets would be handled by the shared buffer (i.e. second request block), followed by handling low priority packets, achieving the claimed limitation.
As for claim 5, the previously cited references teach the method of claim 1. Additionally, Lih ¶ 0025 discloses a buffer credit system including shared buffer credits (¶ 0028) for deciding whether to send packets to a buffer based on whether it is full. Therefore, in normal operation, a transmitter will determine if the shared buffer (i.e. second request block) is full before sending overflow low priority data to it, achieving the claimed limitation.
As for claim 7, Applicant is directed to the rejection of claim 1 as the claims include the same limitations and are rejected on the same rationale.
As for claim 8, Applicant is directed to the rejection of claim 2 as the claims include the same limitations and are rejected on the same rationale.
As for claim 11, Applicant is directed to the rejection of claim 5 as the claims include the same limitations and are rejected on the same rationale.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 3-4, 6, 9-10, and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Lih in view of Lovell et al (U.S. Patent Pub. No. 2010/0153659), hereinafter referred to as Lovell.
As for claim 3, the previously cited references teach the method of claim 1. Lih does not explicitly teach queueing data before distributing it to buffers, However, Lovell ¶ 0046 lines 14-26 discloses multiple priority-based queues used to transfer packets to a memory controller according to priority. If combined with the disclosure of Lih, queued data would be stored to buffers (i.e. request blocks), including distributing low priority data to its private (first) buffer, and in certain cases distributing some high priority data to the shared (second) buffer, achieving the claimed limitation. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Lovell in order to increase memory transfer performance (¶ 0018). Remaining limitations are addressed by the rejection of claim 1.
As for claim 4, the previously cited references teach the method of claim 1. They do not explicitly teach the remaining limitations of claim 4. However, Lovell ¶ 0046 lines 14-26 discloses multiple priority-based queues used to transfer packets to a memory controller according to priority. If combined with the disclosure of Lih, queued data would be stored to buffers (i.e. request blocks) according to queues for different priorities, including low priority data being stored in a private buffer and overflow high priority data being stored in the shared buffer (second request block) for transmission. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Lovell in order to increase memory transfer performance (¶ 0018).
As for claim 6, the previously cited references teach the method of claim 1. Additionally, the embodiment described in the rejection of claim 4 would encompass the claimed limitation, as during normal operation a lack of high priority packets (e.g. empty high priority data queue) would result in the shared overflow buffer being utilized exclusively by lower priority packets for receiving and transmitting.
As for claim 9, Applicant is directed to the rejection of claim 3 as the claims include the same limitations and are rejected on the same rationale.
As for claim 10, Applicant is directed to the rejection of claim 4 as the claims include the same limitations and are rejected on the same rationale.
As for claim 12, Applicant is directed to the rejection of claim 6 as the claims include the same limitations and are rejected on the same rationale.
Response to Arguments
Applicant's arguments filed 24 June 2026 have been fully considered but they are not persuasive. In response to applicant's argument that the references fail to show certain features of the invention (see pages 2-6), it is noted that the features upon which applicant relies (i.e., that the claimed “request block” is a specific functional module of the claimed invention) are not recited in the rejected claims. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Additionally, the specification explicitly states in ¶ 0019 that a request block may be a USB Request Block, which is known in the art as a data structure used for transfer over the USB protocol, and not a functional module or processing unit of a device. Therefore, under broadest reasonable interpretation, a software-defined buffer structure is equivalent to the claimed invention in terms of containing data, being filled with data (receiving), and de-staging or providing access to data (transmitting). The buffers that are the subject of Lih are disclosed as temporarily storing data (see ¶ 0004) meaning that data stored in a buffer in the disclosure is inevitably transmitted elsewhere in some manner. As packets are conveyed by the buffer structures, the target requests are therefore received and transmitted by way of the buffer structures, achieving the claimed limitation.
As for arguments concerning the limitation directed to a scenario in which a request block is unable to receive or transmit data (see pages 6-8), it is again noted that this specific feature is not recited in the claims. The claims recite a request block being unable to receive and transmit a portion of data. If a buffer is full and a packet may not be placed in it, that portion of data is not able to be transmitted by the buffer, and is then placed in another buffer in the cited combination, achieving the claimed limitation.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZAKARIA MOHAMMED BELKHAYAT whose telephone number is (571)270-0472. The examiner can normally be reached Monday thru Thursday 7:30AM-5:30PM EST.
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/ZAKARIA MOHAMMED BELKHAYAT/Examiner, Art Unit 2139
/REGINALD G BRAGDON/Supervisory Patent Examiner, Art Unit 2139
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