Prosecution Insights
Last updated: October 02, 2026
Application No. 19/044,957

Storage Optimization of CAT Table During Background Operations

Non-Final OA §103
Filed
Feb 04, 2025
Priority
Apr 05, 2022 — divisional of 12/248,676
Examiner
MAMO, ELIAS
Art Unit
2184
Tech Center
2100 — Computer Architecture & Software
Assignee
SanDisk Technologies Inc.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
776 granted / 937 resolved
+27.8% vs TC avg
Moderate +6% lift
Without
With
+5.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
14 currently pending
Career history
953
Total Applications
across all art units

Statute-Specific Performance

§101
7.1%
-32.9% vs TC avg
§103
60.5%
+20.5% vs TC avg
§102
12.2%
-27.8% vs TC avg
§112
12.7%
-27.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 937 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 1-7 in the reply filed on 06/25/2026 is acknowledged. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3 and 5 are rejected under 35 U.S.C. 103 as being obvious over Vlaiko et al. (US 2017/0242606), hereinafter referred to as Vlaiko in view of Loh et al. (US 9,727,241), hereinafter referred to as Loh. Referring to claim 1, Vlaiko teaches, as claimed, a data storage device, comprising: a memory device; and a controller coupled to the memory device (see fig. 1, storage device 100), wherein the controller is configured to: determine that the data storage device is in a low power mode (i.e.-initiating storage device 100 transitioning to PS4 state – low power state, page 2, ¶27, lines 1-6); check a workload locality (i.e.-check if HMB is available with sufficient capacity, page 4, ¶44, lines 8-10) and a current placement of a logical to physical table (CAT) (i.e.-storage of FTL tables, page 2, ¶25, lines 3-5). However, Vlaiko does not teach the step of: determine that the CAT is unfit for the workload locality; and modify contents of the CAT based on the workload locality. On the other hand, Loh teaches a memory management method and system configured to determine that the CAT is unfit for the workload locality (i.e.-identifying less accessed TLB entries for eviction, col. 5, lines 60-61 and col. 8, lines 16-18); and modify contents of the CAT based on the workload locality (i.e.-storing TLB/PTE entries based on the most likely to be accessed data, col. 3, lines 36-37; col. 4, lines 47-53; col. 7, lines 10-11 and 18-20). Therefore, before the effective filing date of he claimed invention, it would have been obvious to a person of ordinary skill in the art to modify the teachings of Vlaiko and incorporate the steps of: determine that the CAT is unfit for the workload locality; and modify contents of the CAT based on the workload locality, as taught by Loh. The motivation for doing so would have been to improve processing efficiency by reducing data access speed. As to claim 2, the modified Vlaiko in view of Loh teaches the data storage device of claim 1, wherein modifying comprises replacing unnecessary logical to physical (L2P) entries in the CAT with relevant L2P entries (see Loh, col. 7, lines 22-23 and 59-61). As to claim 3, the modified Vlaiko teaches the data storage device of claim 1, wherein the modifying is modifying the CAT that is stored in a host memory buffer (HMB) (see Vlaiko, page 2, ¶22, lines 4-6). As to claim 5, the modified Vlaiko innately teaches the data storage device of claim 1, wherein at least a portion of the CAT is stored in a host memory buffer (HMB) (see Vlaiko, page 2, ¶25, lines 3-5 and ¶27, lines 7-9). Claim Objections Claims 4, 6 and 7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Examiner’s note: Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the Applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the Applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passages as taught by the prior art or disclosed by the Examiner. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Shiu (US 9,740,631), Boyd et al. (US 2017/0351452), Yoshimi (US 7,418,553), Ugureanu et al. (US 2013/0173853), Yuen et al. (US 11,269,545), Hsieh et al. (US 10,503,606) do teach method and systems for transitioning between different storage device power states using host memory buffer. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELIAS MAMO whose telephone number is (571)270-1726. The examiner can normally be reached Mon-Thu, 7 AM - 5 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, HENRY TSAI can be reached at 571-272-4176. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Elias Mamo/Primary Examiner, Art Unit 2184
Read full office action

Prosecution Timeline

Feb 04, 2025
Application Filed
Sep 10, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
89%
With Interview (+5.9%)
2y 6m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 937 resolved cases by this examiner. Grant probability derived from career allowance rate.

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