DETAILED ACTION
This Office action is in response to the application filed on 06 February 2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5, 6, 8, 10 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Abdulkerim Coban et. al (US11353903B1; hereafter “Coban”) in view of Tallam Vishwanath et. al (US11088699B1; hereafter “Tallam”).
-Regarding claim 1:
Coban discloses:
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650
582
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An electronic circuit, comprising PMOS transistors (5, 6) (Fig. 1; M3,and M4) and NMOS transistors (7, 8) (Fig. 1; M1,and M2) and a degeneration resistor(Fig. 1; R), wherein the electronic circuit is configured to generate a reference current (ID) (Fig. 1; I0) using the weak inversion operation of the NMOS transistors (Fig. 1; M1,and M2), wherein the electronic circuit comprises:- a first supply line (Fig. 1; 102) at a first voltage (Fig. 1; VDD) and a second supply line (Fig. 1; 104) at a second voltage (Fig. 1; VSS), wherein
However, Coban does not disclose tap resistors in the voltage reference circuit.
Tallam, in the same field of endeavor, discloses:
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806
580
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the resistor (10, 110, 210, 310) (Fig. 2; R21,…R2N) is at a voltage floating with respect to both the first voltage of the first supply line (Fig. 2; 116, VDD) and the second voltage of the second supply line (Fig. 2; 201, 200),- wherein the resistor is a tap resistor (10, 110, 210, 310) and in that the electronic circuit comprises a tap subcircuit (16, 116, 216, 316) comprising a set of switches (15, 115, 215, 315; 220, 320) and a set of second transistors (14, 114, 214, 314) each connected to a respective switch (Fig. 2; tab subcircuit 224 includes set of switches MN211,221, 2N1 connecting to MN212,222,2N2) , which is configured to tap the resistor,- wherein the tap subcircuit comprises separate tap branches (13, 113, 213, 313) each including at least one of the switches and one second transistor (14, 114, 214, 314) (Fig. 2; red arrows) which forms afunctional transistor operating in the weak inversion region,- wherein the switches are all connected either to the first supply line (1) or to the second supply line (2) (Fig. 2; switches are all connected to 116 or 201), each tap branch being connected to a respective tap point (12, 112, 212, 312) (Fig. 2; red circles) of the resistor for tapping a respective resistance value of the resistor, and each second or functional transistor (14, 114, 214, 314) being respectively connected to the respective tap point (Fig. 2; MN212,222,2N2 connect to the respective tap point),- and wherein the switches (15, 115, 215, 315; 220, 320) are each controlled by a switch controller (17, 117, 217, 317) (Fig. 2; Knee code 126 provide signals to the switches) for selectively opening or closing a connection of each branch to the first supply line (1) (Fig. 2; 116) or second supply line (2) (Fig. 2; 201).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Coban such that a commonly used tab subcircuit described in Tallam is applied to the voltage reference circuit. Doing so allows for improving of generating a reference current using transistors in the weak inversion region of operation.
-Regarding claim 2:
Tallam discloses:
The electronic circuit according to claim 1, wherein the second or functional transistors (14, 114, 214, 314) are each operated in the same manner (detailed description; “The bias transistors MN202, MN212, MN222, ... , MN2N2 each have a gate control terminal 208 coupled to the CTAT second voltage signal VCTAT.”), wherein each second transistor is preferably a MOS transistor (detailed description; “ n-channel FETs (e.g., NFETs or NMOS transistors) including a first transistor MN21 coupled in series with MP21 and MP23, an integer number N selection transistors MN201, MN211, MN221, MN2Nl and N bias transistors MN202, MN212, MN222, and MN2N2.”), the gates of each of the second transistors being controlled or driven at a same voltage (detailed description; “The bias transistors MN202, MN212, MN222, ... , MN2N2 each have a gate control terminal 208 coupled to the CTAT second voltage signal VCTAT.”)
-Regarding claim 3:
Tallam discloses:
The electronic circuit according to claim 1, wherein the second or functional transistors are structurally identical one with another and/or have identical dimensions (detailed description; “a selected one or more of the bias transistor MN201, MN212, MN222,….MN2N2, ”, where the numbering description 201…2N2 is based on the identical transistors.).
-Regarding claim 5:
Tallam discloses:
The electronic circuit according to claim 1, wherein the switches (15, 115, 215, 315) of each branch are structurally identical one with another and/or have identical dimensions (detailed description; ”the selection transistors MN201,
MN211, MN221, ... , MN2Nl are coupled together at the node 204,”, where the numbering description 201…2N1 is based on the identical transistors.) .
-Regarding claim 6:
Tallam discloses:
The electronic circuit according to claim 1, wherein each of the switches (15, 115, 215, 315) includes a MOS transistor (detailed description;” n-channel FETs (e.g., NFETs or NMOS transistors) including a first transistor MN21 coupled in series with MP21 and MP23, an integer number N selection transistors MN201, MN211, MN221, MN2Nl and N bias transistors MN202, MN212, MN222, and MN2N2.”) having either a source terminal or a drain terminal connected to the first supply line (1) or the second supply line (2) (Fig. 2; MN211,MN221, …MN2N1 connected 116) and a gate terminal controlled by the switch controller (17, 117, 217, 317) (Fig. 2;gates of switches MN211, MN221, …MN2N1 controlled by KNEE CODE 126, and detailed description; “The knee code 126 includes N bits KC<0> to control MNOl, KC<l> to control MN211, KC<2> to control MN221, .. . , KC<N-1> to control MN2Nl.)
-Regarding claim 8:
Tallam discloses:
The electronic circuit according to claim 1, wherein the switch of each branch includes a single transistor (15, 115) (Fig. 2; MN211, MN221,..MN2N1 for each branch-red arrows).
-Regarding claim 10:
Tallam discloses:
The electronic circuit according to claim 8, wherein in each of the branches (13, 113) said single transistor of the switch (15, 115) has a channel between its drain terminal and its source terminal, and the functional transistor (14, 114) has a channel between its drain terminal and its source terminal, both channels being in series along a common electric path extending from the respective tap point (12, 112) to the first supply line (1) or the second supply line (2) (Fig. 2; each pair of switches in 224 connected in series, for example MN211 and MN212, extends from tap point-red circle to the first supply line 116.).
-Regarding claim 15:
Tallam discloses:
The electronic circuit according to claim 1, wherein the tap points in said tap resistor (10, 110, 210, 310) (Fig. 2; 205 R2B) are distributed uniformly or non- uniformly, creating equal or non-equal resistive segments (11, 111, 211, 311) (Fig. 2; R21, R22, R23,…R2N).
Allowable Subject Matter
Claims 4, 7, 9, 11-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim.
The following is a statement of reasons for the indication of allowable subject matter:
-with respect to claim 4:
the prior arts in Coban, and Tallam disclose the claimed invention in basic claims but do not further disclose that the second or functional transistors (114, 314) are PMOS devices and are connected to the supply line via switch transistors (115, 315) which are also PMOS devices.
-with respect to claim 7:
the prior arts in Coban, and Tallam disclose the claimed invention in basic claims but do not further disclose about the active switch, which is controlled differently from the other switches of the set of switches by the switch controller.
-with respect to claim 9:
the prior arts in Coban, and Tallam disclose the claimed invention in basic claims but do not further disclose about a transfer gate (220, 320) comprising two transistor devices of opposite type, that is one NMOS device (221, 321) and one PMOS device (222, 322).
-with respect to claim 14:
the prior arts in Coban, and Tallam disclose the claimed invention in basic claims but do not further disclose about third transistor (19, 119), which is in a branch of the electronic circuit distinct from the tap branches (13, 113). It connects the first supply line (1) or the second supply line (2) to one of said first transistors (5, 7) and its gate terminal is connected to the opposite of the first supply line (1) or the second supply line (2).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEUNG HO CHOI whose telephone number is (571)272-8188. The examiner can normally be reached Monday-Thursday, 7:30 AM - 5:30 PM ET.
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/SEUNG HO CHOI/Examiner, Art Unit 2838
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
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