DETAILED ACTION
This office action is in response to the application filed on 02/06/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 02/26/2026, 12/02/2025, 07/04/2025 and 02/14/2025 has been considered by the examiner.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in claims 1 and 12. Therefore, the “detecting each zero-crossing point of the input voltage, the output voltage” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Examiner’s Note: the circuit is DC-DC so the input voltage and the output voltage are also DC and don’t fluctuate however the primary current and secondary current can have different values.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 1 is objected to because of the following informalities: Claim 1 recites “(S1)” and “(S2)” this should “Step S1” and “Step S2” . Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 and 12-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1 and 11 recite “detecting each zero-crossing point of the input voltage, the output voltage and each output current of the three-phase LLC power conversion circuit in each phase”. However, the input voltage is DC and the output voltage is also DC due to the synchronous rectification. Therefore, it is not clear what the applicant meant by detecting zero crossing of the input and output voltages since they don’t oscillate. For purposes of examination the limitations are going to be interpreted as the detection being done on the input or output currents with detecting the zero crossing.
Claims 2-10 and 13-15 are also rejected to under 35 U.S.C. 112(b), for being dependent on a rejected claim under 35 U.S.C. 112(b).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim US 20220014099.
Regarding Claim 1, Kim teaches (Figures 3-6 and 12) a control method of a three-phase LLC power conversion circuit (Fig. 4), wherein the three-phase LLC power conversion circuit receives an input voltage and outputs an output voltage (Vin and Vout), and comprises a three-phase transformer (Tr1), an input switch group (Qp1-Qpn), an output switch group (Qs1-Qsn) and a resonant circuit group (resonant circuit, Lp and Cp), the input switch group (qp1-qpn) is electrically connected to a plurality of primary windings of the three-phase transformer (Np) and comprises a plurality of input switches (Qp1-Qpn), the output switch group is electrically connected to a plurality of secondary windings (Ns) of the three-phase transformer and comprises a plurality of rectification switches (Qs1-Qsn), the resonant circuit (resonant circuit, Lp and Cp) group is electrically connected between the input switch group (Qp1-Qpn) and the plurality of primary windings (Np), and the control method comprises steps of:(S1) detecting each zero-crossing point of the input voltage, the output voltage and each output current of the three-phase LLC power conversion circuit in each phase(par. 58 and 61-62) ; and(S2) controlling the plurality of input switches to perform switching operation and controlling the plurality of rectification switches to perform synchronous rectification switching operation based on detection results of the step S1 (with 400, par. 61-62), and controlling the output switch group (Qs1-Qsn) in each phase according to a ratio of the output voltage to the input voltage (par. 63-68 and 82), wherein a switching state of at least one of the rectification switches (Qs1 or Qs2) is controlled to lead or lag a switching state of the corresponding input switch (Qp2), and/or adjusting the plurality of input switches (Qp1-Qpn) in each phase to increase a duty cycle (see fig. 12), so that the ratio of the output voltage to the input voltage is increased (par. 63-68 and 74-75, fig. 12), wherein switching frequencies of the plurality of input switches are adjusted according to the output voltage (Vout), a reference voltage (Vref) and a soft switching setting condition (zero crossing, see figs. 5a-5c), so that the plurality of input switches perform soft switching (par. 62 and 85). (For Example: Par. 56-68 and 74-75)
Regarding Claims 2-4, Kim teaches (Figures 3-6 and 12) wherein in the step (S2), the switching state of the at least one of the rectification switches (Qs1) in each phase is controlled to lead the switching state of the corresponding input switch (Qp2) in the same phase according to the ratio of the output voltage to the input voltage (par. 63-68 and 82), and the switching state of at least remaining one of the rectification switches in each phase is controlled to lag (Qs2) the switching state of the corresponding input switch in the same phase. (For Example: Par. 56-68 and 74-75)
Regarding Claim 5, Kim teaches (Figures 3-6 and 12) wherein the plurality of input switches comprise a first upper input switch , a first lower input switch, a second upper input switch, a second lower input switch, a third upper input switch and a third lower input switch (Qp1-Qpn), wherein the first upper input switch is connected in series with the first lower input switch to form a first input switch bridge (Qp1-Qp2), the second upper input switch is connected in series with the second lower input switch to form a second input switch bridge (Qp3-Qp4), and the third upper input switch is connected in series with the third lower input switch to form a third input switch bridge (at Qpn), wherein the first input switch bridge, the second input switch bridge and the third input switch bridge are connected in parallel (Fig. 4). (For Example: Par. 56-68 and 74-75)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Zhang US 20210408927.
Regarding Claim 6, Kim teaches (Figures 3-6 and 12) wherein the plurality of input switches comprise a first upper input switch, a first lower input switch, a second upper input switch, a second lower input switch, a third upper input switch and a third lower input switch (Qp1-Qpn), wherein the first upper input switch is connected in series with the first lower input switch (Qp1-Qp2), the second upper input switch is connected in series with the second lower input switch (Qp3-Qp4), and the third upper input switch is connected in series with the third lower input switch(Qpn switches).
Kim does not teach wherein the first upper input switch, the first lower input switch, the second upper input switch, the second lower input switch, the third upper input switch and the third lower input switch are connected in a cascade manner.
Zhang teaches (Figure 14d ) wherein the first upper input switch, the first lower input switch, the second upper input switch, the second lower input switch, the third upper input switch and the third lower input switch (S1-Sn) are connected in a cascade manner (Fig. 14). (For Example: Par. 186)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Kim to include wherein the first upper input switch, the first lower input switch, the second upper input switch, the second lower input switch, the third upper input switch and the third lower input switch are connected in a cascade manner, as taught by Zhang for its high efficiency, simple structure achieved by magnetic integration.
Regarding Claim 7, Kim teaches (Figures 3-6 and 12) the device.
Kim does not teach wherein the plurality of rectification switches comprise a first upper rectification switch, a first lower rectification switch, a second upper rectification switch, a second lower rectification switch, a third upper rectification switch, a third lower rectification switch, and a fourth upper rectification switch, a fourth lower rectification switch, a fifth upper rectification switch, a fifth lower rectification switch, a sixth upper rectification switch and a sixth lower rectification switch, wherein the first upper rectification switch and the first lower rectification switch are connected in series to form a first rectification bridge, the second upper rectification switch and the second lower rectification switch are connected in series to form a second rectification bridge, the first rectification bridge is connected in parallel with the second rectification bridge, wherein the third upper rectification switch and the third lower rectification switch are connected in series to form a third rectification bridge, the fourth upper rectification switch and the fourth lower rectification switch are connected in series to form a fourth rectification bridge, the third rectification bridge is connected in parallel with the fourth rectification bridge, wherein the fifth upper rectification switch and the fifth lower rectification switch are connected in series to form a fifth rectification bridge, the sixth upper and the sixth lower rectification switch are connected in series to form a sixth rectification bridge, and the fifth rectification bridge is connected in parallel with the sixth rectification bridge.
Zhang teaches (Figure 14d ) wherein the plurality of rectification switches (So1-Son) comprise a first upper rectification switch, a first lower rectification switch, a second upper rectification switch, a second lower rectification switch, a third upper rectification switch, a third lower rectification switch, and a fourth upper rectification switch, a fourth lower rectification switch, a fifth upper rectification switch, a fifth lower rectification switch, a sixth upper rectification switch and a sixth lower rectification switch (So1-Son), wherein the first upper rectification switch and the first lower rectification switch are connected in series to form a first rectification bridge (So1 and So3), the second upper rectification switch and the second lower rectification switch are connected in (So2 and So4) series to form a second rectification bridge, the first rectification bridge is connected in parallel with the second rectification bridge, wherein the third upper rectification switch and the third lower rectification switch are connected in series (So5 and So7) to form a third rectification bridge, the fourth upper rectification switch and the fourth lower rectification switch are connected in series (So6 and So8) to form a fourth rectification bridge, the third rectification bridge is connected in parallel with the fourth rectification bridge, wherein the fifth upper rectification switch and the fifth lower rectification switch are connected in series (So switches) to form a fifth rectification bridge, the sixth upper and the sixth lower rectification switch are connected in series (So switches) to form a sixth rectification bridge, and the fifth rectification bridge is connected in parallel with the sixth rectification bridge (Fig. 14d). (For Example: Par. 186)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Kim to include wherein the plurality of rectification switches comprise a first upper rectification switch, a first lower rectification switch, a second upper rectification switch, a second lower rectification switch, a third upper rectification switch, a third lower rectification switch, and a fourth upper rectification switch, a fourth lower rectification switch, a fifth upper rectification switch, a fifth lower rectification switch, a sixth upper rectification switch and a sixth lower rectification switch, wherein the first upper rectification switch and the first lower rectification switch are connected in series to form a first rectification bridge, the second upper rectification switch and the second lower rectification switch are connected in series to form a second rectification bridge, the first rectification bridge is connected in parallel with the second rectification bridge, wherein the third upper rectification switch and the third lower rectification switch are connected in series to form a third rectification bridge, the fourth upper rectification switch and the fourth lower rectification switch are connected in series to form a fourth rectification bridge, the third rectification bridge is connected in parallel with the fourth rectification bridge, wherein the fifth upper rectification switch and the fifth lower rectification switch are connected in series to form a fifth rectification bridge, the sixth upper and the sixth lower rectification switch are connected in series to form a sixth rectification bridge, and the fifth rectification bridge is connected in parallel with the sixth rectification bridge, as taught by Zhang for its high efficiency, simple structure achieved by magnetic integration.
Regarding Claim 8, Kim teaches (Figures 3-6 and 12) wherein the plurality of rectification switches (Qs1-Qsn) are respectively formed by an active switch (Fig. 4b). (For Example: Par. 56-68 and 74-75)
Claim(s) 9-16 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Gadelrab et al. US 2023/0122794.
Regarding Claim 9, Kim teaches (Figures 3-6 and 12) wherein the resonant circuit (resonant circuit with Cp and Lp) group comprises a plurality of first resonant elements (Lp) and a plurality of second resonant elements (Cp), the plurality of first resonant elements (Lp) are star- connected (Fig. 4) and respectively formed by an inductor or respectively formed by a capacitor. (For Example: Par. 56-68 and 74-75)
Kim does not teach the plurality of second resonant elements are delta-connected and respectively formed by another inductor or respectively formed by another capacitor.
Gadelrab teaches (Figure 3 ) the plurality of second resonant elements are delta-connected and respectively formed by another inductor or respectively formed by another capacitor (Cr1-Cr3). (For Example: Par. 54-55)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Kim to include the plurality of second resonant elements are delta-connected and respectively formed by another inductor or respectively formed by another capacitor, as taught by Gadelrab to widen the range of the voltage conversion ratio.
Regarding Claims 10 and 20, Kim teaches (Figures 3-6 and 12)wherein the plurality of primary windings (Np) of the three-phase transformer are delta-connected (Fig. 3d, par. 55), and the plurality of secondary windings (Ns) of the three-phase transformer are delta- connected (Fig. 3d, par. 55).
Regarding Claim 11, Kim teaches (Figures 3-6 and 12) a three-phase LLC power conversion circuit, configured to receive an input voltage (Vin) and output an output voltage, and comprising: an input switch group (Qp1-Qpn) configured to receive the input voltage and comprising a plurality of input switches; a three-phase transformer (Tr) comprising a plurality of primary windings (Np) and a plurality of secondary windings (Ns), wherein the input switch group (Qp1-Qpn) is electrically connected to the plurality of primary windings (Np); a resonant circuit group (Lp and Cp) electrically connected between the input switch group and the plurality of primary windings (see fig. 4), and comprising a plurality of first resonant elements (Lp) and a plurality of second resonant elements (Cp), the plurality of first resonant elements (Lp) are star- connected (Fig. 4) and respectively formed by an inductor or respectively formed by a capacitor. (For Example: Par. 56-68 and 74-75)
Kim does not teach the plurality of second resonant elements are delta-connected and respectively formed by another inductor or respectively formed by another capacitor.
Gadelrab teaches (Figure 3 ) the plurality of second resonant elements are delta-connected and respectively formed by another inductor or respectively formed by another capacitor (Cr1-Cr3). (For Example: Par. 54-55)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Kim to include the plurality of second resonant elements are delta-connected and respectively formed by another inductor or respectively formed by another capacitor, as taught by Gadelrab to widen the range of the voltage conversion ratio.
Regarding Claim 12, Kim teaches (Figures 3-6 and 12) a control unit (400) electrically connected to the input switch group (Qp1-Qpn) and the output switch group (Qs1-Qsn) for detecting each zero-crossing point of the input voltage, the output voltage and each output current of the three-phase LLC power conversion circuit in each phase (par. 58 and 61-62), wherein the plurality of input switches (Qp1-Qpn) are controlled to perform switching operation based on detection results (with 400, par. 61-62), the plurality of rectification switches (Qs1-Qsn) are controlled to perform synchronous rectification switching operation (with 400, par. 61-62), and the output switch group in each phase is controlled according to a ratio of the output voltage to the input voltage (par. 63-68 and 82), wherein a switching state of at least one of the rectification switches (Qs1 or Qs2) is controlled to lead or lag a switching state of the corresponding input switch (Qp2), and/or adjusting the plurality of input switches (Qp1-Qpn) in each phase to increase a duty cycle (see fig. 12), so that the ratio of the output voltage to the input voltage is increased (par. 63-68 and 74-75, fig. 12), wherein switching frequencies of the plurality of input switches are adjusted according to the output voltage (Vout), a reference voltage (Vref) and a soft switching setting condition (zero crossing, see figs. 5a-5c), so that the plurality of input switches perform soft switching (par. 62 and 85). (For Example: Par. 56-68 and 74-75)
Regarding Claims 13-15, Kim teaches (Figures 3-6 and 12) wherein in the step (S2), the switching state of the at least one of the rectification switches (Qs1) in each phase is controlled to lead the switching state of the corresponding input switch (Qp2) in the same phase according to the ratio of the output voltage to the input voltage (par. 63-68 and 82), and the switching state of at least remaining one of the rectification switches in each phase is controlled to lag (Qs2) the switching state of the corresponding input switch in the same phase. (For Example: Par. 56-68 and 74-75)
Regarding Claim 16, Kim teaches (Figures 3-6 and 12) wherein the plurality of input switches comprise a first upper input switch , a first lower input switch, a second upper input switch, a second lower input switch, a third upper input switch and a third lower input switch (Qp1-Qpn), wherein the first upper input switch is connected in series with the first lower input switch to form a first input switch bridge (Qp1-Qp2), the second upper input switch is connected in series with the second lower input switch to form a second input switch bridge (Qp3-Qp4), and the third upper input switch is connected in series with the third lower input switch to form a third input switch bridge (at Qpn), wherein the first input switch bridge, the second input switch bridge and the third input switch bridge are connected in parallel (Fig. 4). (For Example: Par. 56-68 and 74-75)
Claim(s) 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Gadelrab and further in view of Zhang US 20210408927.
Regarding Claim 17, Kim teaches (Figures 3-6 and 12) wherein the plurality of input switches comprise a first upper input switch, a first lower input switch, a second upper input switch, a second lower input switch, a third upper input switch and a third lower input switch (Qp1-Qpn), wherein the first upper input switch is connected in series with the first lower input switch (Qp1-Qp2), the second upper input switch is connected in series with the second lower input switch (Qp3-Qp4), and the third upper input switch is connected in series with the third lower input switch(Qpn switches).
Kim does not teach wherein the first upper input switch, the first lower input switch, the second upper input switch, the second lower input switch, the third upper input switch and the third lower input switch are connected in a cascade manner.
Zhang teaches (Figure 14d ) wherein the first upper input switch, the first lower input switch, the second upper input switch, the second lower input switch, the third upper input switch and the third lower input switch (S1-Sn) are connected in a cascade manner (Fig. 14). (For Example: Par. 186)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Kim to include wherein the first upper input switch, the first lower input switch, the second upper input switch, the second lower input switch, the third upper input switch and the third lower input switch are connected in a cascade manner, as taught by Zhang for its high efficiency, simple structure achieved by magnetic integration.
Regarding Claims 18, Kim teaches (Figures 3-6 and 12) the device.
Kim does not teach wherein the plurality of rectification switches comprise a first upper rectification switch, a first lower rectification switch, a second upper rectification switch, a second lower rectification switch, a third upper rectification switch, a third lower rectification switch, and a fourth upper rectification switch, a fourth lower rectification switch, a fifth upper rectification switch, a fifth lower rectification switch, a sixth upper rectification switch and a sixth lower rectification switch, wherein the first upper rectification switch and the first lower rectification switch are connected in series to form a first rectification bridge, the second upper rectification switch and the second lower rectification switch are connected in series to form a second rectification bridge, the first rectification bridge is connected in parallel with the second rectification bridge, wherein the third upper rectification switch and the third lower rectification switch are connected in series to form a third rectification bridge, the fourth upper rectification switch and the fourth lower rectification switch are connected in series to form a fourth rectification bridge, the third rectification bridge is connected in parallel with the fourth rectification bridge, wherein the fifth upper rectification switch and the fifth lower rectification switch are connected in series to form a fifth rectification bridge, the sixth upper and the sixth lower rectification switch are connected in series to form a sixth rectification bridge, and the fifth rectification bridge is connected in parallel with the sixth rectification bridge.
Zhang teaches (Figure 14d ) wherein the plurality of rectification switches (So1-Son) comprise a first upper rectification switch, a first lower rectification switch, a second upper rectification switch, a second lower rectification switch, a third upper rectification switch, a third lower rectification switch, and a fourth upper rectification switch, a fourth lower rectification switch, a fifth upper rectification switch, a fifth lower rectification switch, a sixth upper rectification switch and a sixth lower rectification switch (So1-Son), wherein the first upper rectification switch and the first lower rectification switch are connected in series to form a first rectification bridge (So1 and So3), the second upper rectification switch and the second lower rectification switch are connected in (So2 and So4) series to form a second rectification bridge, the first rectification bridge is connected in parallel with the second rectification bridge, wherein the third upper rectification switch and the third lower rectification switch are connected in series (So5 and So7) to form a third rectification bridge, the fourth upper rectification switch and the fourth lower rectification switch are connected in series (So6 and So8) to form a fourth rectification bridge, the third rectification bridge is connected in parallel with the fourth rectification bridge, wherein the fifth upper rectification switch and the fifth lower rectification switch are connected in series (So switches) to form a fifth rectification bridge, the sixth upper and the sixth lower rectification switch are connected in series (So switches) to form a sixth rectification bridge, and the fifth rectification bridge is connected in parallel with the sixth rectification bridge (Fig. 14d). (For Example: Par. 186)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Kim to include wherein the plurality of rectification switches comprise a first upper rectification switch, a first lower rectification switch, a second upper rectification switch, a second lower rectification switch, a third upper rectification switch, a third lower rectification switch, and a fourth upper rectification switch, a fourth lower rectification switch, a fifth upper rectification switch, a fifth lower rectification switch, a sixth upper rectification switch and a sixth lower rectification switch, wherein the first upper rectification switch and the first lower rectification switch are connected in series to form a first rectification bridge, the second upper rectification switch and the second lower rectification switch are connected in series to form a second rectification bridge, the first rectification bridge is connected in parallel with the second rectification bridge, wherein the third upper rectification switch and the third lower rectification switch are connected in series to form a third rectification bridge, the fourth upper rectification switch and the fourth lower rectification switch are connected in series to form a fourth rectification bridge, the third rectification bridge is connected in parallel with the fourth rectification bridge, wherein the fifth upper rectification switch and the fifth lower rectification switch are connected in series to form a fifth rectification bridge, the sixth upper and the sixth lower rectification switch are connected in series to form a sixth rectification bridge, and the fifth rectification bridge is connected in parallel with the sixth rectification bridge, as taught by Zhang for its high efficiency, simple structure achieved by magnetic integration.
Regarding Claim and 19, Kim teaches (Figures 3-6 and 12) wherein the plurality of rectification switches (Qs1-Qsn) are respectively formed by an active switch (Fig. 4b). (For Example: Par. 56-68 and 74-75)
Conclusion
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/GUSTAVO A ROSARIO-BENITEZ/ Primary Examiner, Art Unit 2838
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