Prosecution Insights
Last updated: October 01, 2026
Application No. 19/048,260

Resilient Interconnect Network In Large Scale Computing

Non-Final OA §103
Filed
Feb 07, 2025
Examiner
CHEN, CAI Y
Art Unit
2425
Tech Center
2400 — Computer Networks
Assignee
Google LLC
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
1y 3m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
591 granted / 810 resolved
+15.0% vs TC avg
Moderate +9% lift
Without
With
+8.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
9 currently pending
Career history
816
Total Applications
across all art units

Statute-Specific Performance

§101
7.4%
-32.6% vs TC avg
§103
52.8%
+12.8% vs TC avg
§102
21.2%
-18.8% vs TC avg
§112
5.8%
-34.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 810 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-9 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over EP 3,993,359 A1 (hereinafter refers Google LLC) in view of Yazhou Zu et al. (Resiliency at Scale: Managing Google’s TPUv4 Machine Learning Supercomputer…, 2024-04-15, hereinafter refers as Zu). Regarding claim 1, Google LLC disclose a protected interconnect network for a computing network comprising: a plurality of processing nodes connected by the protected interconnect network (Fig. 1, para. 4, 15, claim 1, a cluster of processing node); at least one building block comprising a predetermined number of processing nodes of the plurality of processing nodes (para. 11, para. 34, para. 82-86, a subsets of processing nodes allocated for processing tasks and different nodal configurations); an electrical circuit switch (ECS) associated with each of the at least one building block (para. 9, 16, 21, 39, 43, para. 94, the management module provides switching instructions), routing a portion of data traffic of each building block to a protection communication path running in parallel with a regular communication path (the switches to turn off certain connections and turn on other connections for data transfer, para. 11-12, 21-24, para. 43-45); Google LLC does not explicitly disclose the ECS routing a portion of data traffic of each building block to a protection communication path running in parallel with a regular communication path; Zu teaches the ECS routing a portion of data traffic (using an optical circuit switching to dynamically configure routes to work around machine); the modify of Google LLC to include Zu would result in the claim limitation of “the ECS routing a portion of data traffic of each building block to a protection communication path running in parallel with a regular communication path;” It would be obvious for one of ordinary skill in art to modify Google LLC to include Zu in order allow a system to effective routing the data traffic to save the resource. Regarding claim 2, Google LLC in view of Zu discloses wherein the computing network is a reconfigurable superpod (Zu, abstract, introduction, section 2.2, a TPUv4 reconfigurable supercomputer/pod). Regarding claim 3, Google LLC in view of Zu discloses wherein the reconfigurable superpod defines a plurality of dimensions, each processing node in communication with each dimension (Google LLC, para. 26-27, para. 49-50, and para. 159, processing nodes organized in an n-dimension graph with routing paths along axes of the dimensions, Zu, abstract, section 2.2, a TPUv3 3d torus interconnect cube faces in XYZ dimensions). Regarding claim 4, Google LLC in view of Zu discloses comprising: one optical circuit switch (OCS) (Google LLC, para. 31, 54, 166, the reconfigurable interconnect fabric…that switches for optical data carrying media)in communication with each ECS corresponding to each of the at least one building block and in communication with each dimension of the plurality of dimensions (Google LLC, para. 26-27, para. 49-50, and para. 159, processing nodes organized in an n-dimension graph with routing paths along axes of the dimensions, Zu, abstract, section 2.2, a TPUv3 3d torus interconnect cube faces in XYZ dimensions). Regarding claim 5, Google LLC in view of Zu discloses comprising: an optical circuit switch (OCS) (Google LLC, para. 31, 54, 166, the reconfigurable interconnect fabric…that switches for optical data carrying media)corresponding to each of the dimensions of the plurality of dimensions, the OCS of each dimension in communication with the ECS of each of the at least one building block and its corresponding dimension (section 2.2, TPUv4 ICI fabric including programmable OCS cross connects dedicated ICI link connections, 16 optical links per cube face, 6144 optical ICK links). Regarding claim 6, Google LLC in view of Zu discloses wherein a building block of the at least one building block comprises 32 processing nodes (para. 11, para. 34, para. 82, node configuration including 32 processing nodes). Regarding claim 7, Google LLC in view of Zu discloses wherein the processing nodes are tensor processing units (TPU) (Zu, abstract, section 2.2, a TPUv4). Regarding claim 8, Google LLC in view of Zu discloses further comprising: a computing rack for housing one of the at least one building block (Zu, section 2.2, 16 TPU machines grouped together as one datecentre rack…). Regarding claim 9, Google LLC in view of Zu discloses wherein each ECS for each building block is configured on the computing rack as a top of rack (ToR) switch or a middle of rack (MoR) switch (Google LLC para. 13, para. 86, para. 89-94, ToR switches). Regarding claim 15, Google LLC in view of Zu discloses wherein each dimension comprises two external facing hyperplanes to facilitate communication with the dimension in an inbound and an outbound direction (Google LLC, Fig. 1, Fig. 2A-2B). Regarding claim 16, Google LLC in view of Zu discloses each processing node comprising: two inter-chip interconnect (ICI) links for each of the dimensions; and one additional ICI link in communication with the ECS of the building block containing the processing node (Google LLC, Fig. 1, Fig. 2A-2B, para. 62-65, Zu, section 2.3). Allowable Subject Matter Claims 10-14 and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 10 and its dependents, the art of record either alone or in combination fails to particular disclose or suggest the claim limitation of “comprising: a first number of regular inter-chip interconnects (ICI) links connecting each processing node to a regular OCS of the computing network; and a second number of protection inter-chip interconnects ICI connecting each ECS switch to the one protection OCS.” As to the art of record, Google LLC reference discloses the general concept of connecting node in a computing network. However, Google LLC does not teach with respect to the entire or combination claim limitation of “a second number of protection inter-chip interconnects ICI connecting each ECS switch to the one protection OCS.” Regarding claim 11 and its dependents, the art of record either alone or in combination fails to particular disclose or suggest the claim limitation of “wherein the ECS of each building block comprises: a first number of building block facing ports connected to each processing node of the building block; and a second number of external facing ports in communication with the protection path of the building block; the first and second number of ports determined by a topology of the computing network.” As to the art of record, Google LLC reference discloses the general concept of connecting node in a computing network. However, Google LLC does not teach with respect to the entire or combination claim limitation of “a second number of external facing ports in communication with the protection path of the building block; the first and second number of ports determined by a topology of the computing network” Regarding claim 12 and its dependents, the art of record either alone or in combination fails to particular disclose or suggest the claim limitation of “wherein each building block comprises two ECS, each ECS comprising: a first number of building block facing ports connected to a subset of processing nodes of the building block; and a second number of external facing ports in communication with the protection path of the building block; the first and second number of ports determined by a topology of the computing network.” As to the art of record, Google LLC reference discloses the general concept of connecting node in a computing network. However, Google LLC does not teach with respect to the entire or combination claim limitation of “a second number of external facing ports in communication with the protection path of the building block; the first and second number of ports determined by a topology of the computing network.” Regarding claim 13 and its dependents, the art of record either alone or in combination fails to particular disclose or suggest the claim limitation of “wherein the ECS of each building block comprises: 32 building block facing ports connected to each processing node of the building block; and 20 external facing ports in communication with a single OCS in the protection path of the building block.” As to the art of record, Google LLC reference discloses the general concept of connecting node in a computing network. However, Google LLC does not teach with respect to the entire or combination claim limitation of “20 external facing ports in communication with a single OCS in the protection path of the building bloc.” Regarding claim 14 and its dependents, the art of record either alone or in combination fails to particular disclose or suggest the claim limitation of “each processing node in communication with: a first number of regular inter-chip interconnect (ICI) links in communication with the regular communication path of the computing network; and one protection ICI link in communication with the protection path of the computing network.” As to the art of record, Google LLC reference discloses the general concept of connecting node in a computing network. However, Google LLC does not teach with respect to the entire or combination claim limitation of “each processing node in communication with: a first number of regular inter-chip interconnect (ICI) links in communication with the regular communication path of the computing network; and one protection ICI link in communication with the protection path of the computing network.” Allowable Subject Matter Claims 17-20 are allowed. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 17 and its dependents, the art of record either alone or in combination fails to particular disclose or suggest the claim limitation of “in the building block, providing one additional protection communication path connected to a protection processing path; and routing data from the building block to the protection processing path via an electrical circuit switch (ECS) associated with the building block of the computing network.” As to the art of record, Google LLC reference discloses the general concept of connecting node in a computing network. However, Google LLC does not teach with respect to the entire or combination claim limitation of “in the building block, providing one additional protection communication path connected to a protection processing path; and routing data from the building block to the protection processing path via an electrical circuit switch (ECS) associated with the building block of the computing network.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CAI Y CHEN whose telephone number is (571)270-5679. The examiner can normally be reached 8:30 AM -4:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brian Pendleton can be reached at 571-272-7527. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CAI Y CHEN/Primary Examiner, Art Unit 2425
Read full office action

Prosecution Timeline

Feb 07, 2025
Application Filed
Aug 10, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
82%
With Interview (+8.6%)
2y 11m (~1y 3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 810 resolved cases by this examiner. Grant probability derived from career allowance rate.

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