DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim 1 contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. On line 4 of claim 1, claims a modulation capacitor in series with the sampling capacitor which is not supported in the specification (none of drawings in the specifications show that the modulator capacitor is in series with the sampling capacitor).
Claims 2-11 are rejected under 112(a) as well as being depended on based rejected claim 1.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2020/0358454).
Regarding claim 1, Kim et al. discloses an delta sigma ADC architecture in figure 6 that teaches: a sampling stage (3002) comprising a sampling capacitor (3121, 3122); and a modulation stage (1001, 1002) comprising: a modulation capacitor (1102, 1102) in series with the sampling capacitor (3121, 3122), a reference capacitor (3111, 3112), and a unit gain buffer (3101) (when RST 3142, 3141) closed 3101 become unit gain buffer, which means input and output is the same) having a non-inverting input terminal (-), an inverting input terminal (+) and an output terminal (N31,N32), wherein the non-inverting input terminal (-) is connectable to the reference capacitor (3112) and the modulation capacitor (1102), and the output terminal (N31, N32) is connected to the inverting input terminal (see descriptions of figure 6).
Allowable Subject Matter
Claims 2-11 are objected to as being dependent upon a rejected base claim, but they would be considered for allowable if they are rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art of record, considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein the sampling capacitor is in series with a first switching device; the modulation capacitor is in series with the first switching device and a second switching device disposed between the modulation capacitor and the first switching device; the non-inverting input terminal is connectable to the reference capacitor through a third switching device, the inverting input terminal is in series with a fourth switching device and a fifth switching device, the output terminal is connectable to a node between the third switching device and the reference capacitor through a sixth switching device, and the reference capacitor is connected to a node between the fourth switching device and the fifth switching device.
Claims 12-20 are allowable.
The following is an examiner’s statement of reasons for allowance: Claim 12 is allowed over the closest prior art of record. The closest prior art of record, considered individually or in combination, fails to fairly teach or suggest invented features, which is “a unit gain buffer having a non-inverting input terminal, an inverting input terminal and an output terminal, wherein the non-inverting input terminal is connectable to the reference capacitor through a third switching device, the inverting input terminal is in series with a fourth switching device and a fifth switching device, the output terminal is connected to the inverting input terminal and connectable to a node between the third switching device and the reference capacitor through a sixth switching device, and the reference capacitor is connected to a node between the fourth switching device and the fifth switching device”, structurally and functionally interconnected with other limitations in the manner as cited in the claim and dependent claims.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Cited References
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cited references are related to instant application subject matters.
Conclusion
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/LAM T MAI/Primary Examiner, Art Unit 2845
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