Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected for minor informalities: in fig. 2, one of reference voltage line labeled as “REF” shall be “VREF” according to specification. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 8 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 8 recites the limitation "the first digital data of the n−1-th subpixel and the second digital data of an n−2-th subpixel". There is insufficient antecedent basis for “the first digital data of the n-1-th subpixel”, and “the second digital data of an n-2-th subpixel”. In independent claim, the first digital data referred to digital data of n-th subpixel, and the second digital data referred to digital data of n-1-th subpixel.
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 10 and 19 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
Claim 10 recites, inter alia: wherein the adder updates the second digital data of the n-th subpixel in the line buffer by applying an overdriving voltage of a level corresponding to the data transition value to the first digital data of the n-th subpixel during an overdriving period of a length corresponding to the data transition value.
Similarly, claim 19 recites, inter alia, wherein the data compensation circuit is configured to generate the second digital data of the n-th subpixel by applying an overdriving voltage to the first digital data of the n-th subpixel for an overdriving period of a length determined based on a comparison result between the first digital data of the n-th subpixel and the second digital data of the n−1-th subpixel.
Reviewing corresponding specification and reviewing claimed term based on plain meaning, digital data correspond to image data stored in digital bits, represented digitally instead of in analog voltage, while overdriving voltage correspond to an analog voltage that is generated based on digital data by digital-to-analog (DAC) converter in data driver, wherein the analog voltage is applied to data lines. In other words, overdriving voltage is generated based on updated digital data, not vice versa. In operation of display device as described in specification. The corresponding claimed terms, however, claim to update the digital data in line buffer by applying an analog overdriving voltage to digital data, but lacks enablement in specification on how to carry out such function while enabling display to perform image display and overdriving function as understood by one of ordinary skill in the art. Hence, the corresponding claimed terms contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Baek, US 20150213770 A1 (hereinafter “Baek”).
Regarding claim 1, Baek discloses a display device comprising:
a display panel (fig. 1, display panel 200) including a plurality of gate lines, a plurality of data lines, and a plurality of subpixels (paragraphs 5, 62, “The display panel 200 includes a plurality of scan lines (not shown), a plurality of data lines (not shown), and a plurality of unit pixels connected to the plurality of scan lines and the plurality of data lines”);
a gate driving circuit configured to drive the plurality of gate lines (paragraphs 5, 58); a data driving circuit configured to supply a data voltage to the plurality of data lines (paragraphs, 5, 50, ““A display device includes a display panel in which a plurality of unit pixels for displaying an image are arranged, a gate driver for driving gate lines of the display panel, and a source driver for providing display data for data lines of the display panel so as to display the image”); and a display controller configured to control the gate driving circuit and the data driving circuit (paragraphs 50-52, “The display driving device 100 includes a timing controller 110, a shift register 120, a multiplexer (MUX) controller 130, a level shifter 140, a gray scale generator 150, a decoder 160, and a channel driver 170. In an exemplary embodiment, the shift register 120, the MUX controller 130, the level shifter 140, the gray scale generator 150, the decoder 160, and the channel driver 170 may be implemented as a source driver”),
wherein the data driving circuit is configured to generate second digital data of an n-th subpixel on which an overdriving processing has been performed from first digital data of the n-th subpixel, based on a difference between the first digital data of the n-th subpixel connected to an n-th gate line among the plurality of gate lines and second digital data of a n−1-th subpixel connected to a n−1-th gate line among the plurality of gate lines (paragraph 51, “The timing controller 110 generates overdriving pixel data OPD to perform an overdriving operation. The overdriving pixel data OPD is generated by adding or subtracting n-bit weight data to or from pixel data PD”, paragraph 59, “The display driving device 100 according to an embodiment of the present inventive concept compares previous pixel data and current pixel data in units of a line, and adds or subtracts the n-bit weight data to or from the current pixel data based on the compared result”, see detail in fig. 6, paragraphs 80-91, “The line memory device 111 includes a first pixel data storing unit 112 to store the previous pixel data PD(N), and a second pixel data storing unit 113 to store the current pixel data PD(N+1). The data comparator 114 compares the previous pixel data PD and the current pixel data PD by units of a line”, “Specifically, when the current pixel data PD(N+1) is greater than the previous pixel data PD(N), the data comparator 114 selects the first comparing result processor 115. The first comparing result processor 115 adds n-bit weight data to the current pixel data PD(N+1) through the calculating unit 118”, “Further, when the current pixel data PD(N+1) is smaller than the previous pixel data PD(N), the data comparator 114 selects the second comparing result processor 116. The second comparing result processor …subtracts … from the current pixel data PD(N+1) through the calculating unit 118. Moreover, when … the current pixel data PD(N+1) is equal to the previous pixel data PD(N). In this case, the data comparator 114 selects the third comparing result processor 117. The third comparing result processor 117 transmits the current pixel data PD(N+1) to the shift register 120 by bypassing the calculating unit 118.” In summary, the timing controller / data driving circuit of Baek compensate for RC delay by comparing digital data of current line of pixel data PD(N+1) --- corresponding to claimed n-th subpixel of nth gate line, with previous line of pixel data PD(N) – corresponding to claimed n-1th subpixel of n-1th gate line, and adjust digital data of current line by adding to, subtract from, or maintain bits data of pixel value based on difference between current line data and previous line data), and supply the data voltage based on the second digital data of the n-th subpixel (fig. 7, paragraphs 92-96, modified pixel data supplied to analog-to-digital converter 160)
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Regarding claim 2, Baek discloses the display device of claim 1, wherein the data voltage, which is an analog voltage for the second digital data of the n-th subpixel, is output from the data driving circuit during a data writing period (paragraphs 56 57, “The decoder 160 converts the pixel data PD or the overdriving pixel data OPD into an analog signal based on the gray scale voltage VG. That is, the decoder 160 receives the gray scale voltage VG from the gray scale generator 150, and transmits the gray scale voltage VG corresponding to the pixel data PD or the overdriving pixel data OPD to the channel driver 170. The channel driver 170 transmits the converted analog signal to the display panel 200 for driving the display panel 200. In an exemplary embodiment, the channel driver 170 may be implemented by a non-inverting operational amplifier (OP AMP)”, fig. 7, paragraphs 92-96, modified pixel data supplied to analog-to-digital converter 160), and
wherein the data voltage has an overdriving voltage during an overdriving period within the data writing period, and has an analog voltage for the first digital data of the n-th subpixel during a period after the overdriving period within the data writing period (fig. 9, paragraphs 102-112, data voltage is being supplied with overdriving voltage corresponding overdrive adjusted digital data during overdriving period OP, and supplied with voltage corresponding to original first digital data of n-th subpixel after overdriving period within a horizontal data writing period.
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 3 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Baek, as applied in claim 2 above, and in further view of Chien, US 20210011505 A1 (hereinafter “Chien”).
Regarding claim 3, Baek discloses the display device of claim 2.
Baek does not disclose in particular wherein the overdriving period increases as a distance between the data driving circuit and the n-th subpixel increases.
In similar field of endeavor of display device (fig. 1, paragraph 24) where data driving circuit is configured to overdrive pixel voltage to increase slew rate of output voltage (paragraph 3), Chien discloses similar scanning period divided into overdriving period and normal driving period, and further discloses the concept that a length of overdriving period may selectively increase as a distance between a data driving circuit and the pixel being driven increases (paragraphs 69: “According to a requirement of an application environment, the control circuit 1050 may selectively divide one scan line period (a turn on period of one pixel circuit) into an overdriving period and a normal driving period … the output buffer 100 may perform overdriving to the data line DL_1 during the overdriving period, and perform normal driving to the data line DL_1 during the normal driving period. The output buffer 100 may perform overdriving to the data line DL_1 of the display panel 13 during the overdriving period to increase the slew rate of the output voltage VOUT. Paragraph 71: A time length of the overdriving period may be selectively set according to the requirement of the application environment. In the embodiment of FIG. 1, the data line DL_1 is coupled to a near pixel circuit (for example, a pixel circuit P(1,1)) and a far pixel circuit (for example, a pixel circuit P(1,n)) of the display panel 13. A distance between the near pixel circuit and the source driver 12 is smaller than a distance between the far pixel circuit and the source driver 12. Generally, a time constant of the far pixel circuit is greater than a time constant of the near pixel circuit. Based on a design requirement, the control circuit 1050 may dynamically adjust a time length of the overdriving period according to a position (the distance between the pixel circuit and the source driver) of the pixel circuit in the display panel 13. For example, a time length of the overdriving period related to the near pixel circuit is smaller than a time length of the overdriving period related to the far pixel circuit”).
It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of adjusting length of overdriving period within a scanning period in accordance to a distance between the data driving circuit of display device and pixel being driven, such as disclosed by Chien, into the display device of Baek with overdriving period, to constitute wherein the overdriving period increases as a distance between the data driving circuit and the n-th subpixel increases, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would allow display device to account for different time constant of pixel due to length of data line when overdriving pixel to improve overdrive effectiveness.
Regarding claim 6, Baek discloses the display device of claim 1.
Baek does not disclose in particular wherein a length of an application period of the first digital data of the n-th subpixel and a length of an application period of the second digital data of the n-th subpixel are identical to each other.
In similar field of endeavor of display device (fig. 1, paragraph 24) where data driving circuit is configured to overdrive pixel voltage to increase slew rate of output voltage (paragraph 3), Chien discloses similar scanning period divided into overdriving period and normal driving period, and further discloses the concept that a length of overdriving period may selectively increase as a distance between a data driving circuit and the pixel being driven increases (paragraphs 69: “According to a requirement of an application environment, the control circuit 1050 may selectively divide one scan line period (a turn on period of one pixel circuit) into an overdriving period and a normal driving period … the output buffer 100 may perform overdriving to the data line DL_1 during the overdriving period, and perform normal driving to the data line DL_1 during the normal driving period. The output buffer 100 may perform overdriving to the data line DL_1 of the display panel 13 during the overdriving period to increase the slew rate of the output voltage VOUT. Paragraph 71: A time length of the overdriving period may be selectively set according to the requirement of the application environment. In the embodiment of FIG. 1, the data line DL_1 is coupled to a near pixel circuit (for example, a pixel circuit P(1,1)) and a far pixel circuit (for example, a pixel circuit P(1,n)) of the display panel 13. A distance between the near pixel circuit and the source driver 12 is smaller than a distance between the far pixel circuit and the source driver 12. Generally, a time constant of the far pixel circuit is greater than a time constant of the near pixel circuit. Based on a design requirement, the control circuit 1050 may dynamically adjust a time length of the overdriving period according to a position (the distance between the pixel circuit and the source driver) of the pixel circuit in the display panel 13. For example, a time length of the overdriving period related to the near pixel circuit is smaller than a time length of the overdriving period related to the far pixel circuit”).
It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of adjusting length of overdriving period within a scanning period in accordance to a distance between the data driving circuit of display device and pixel being driven, such as disclosed by Chien, into the display device of Baek with overdriving period, to constitute wherein the overdriving period increases as a distance between the data driving circuit and the n-th subpixel increases, such that for a pixel row located at an appropriate distance from driving circuit, the length of an application period of the first digital data of the n-th subpixel and a length of an application period of the second digital data of the n-th subpixel are identical to each other, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would allow display device to account for different time constant of pixel due to length of data line when overdriving pixel to improve overdrive effectiveness.
Claims 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Baek, as applied in claim 2 above, and in further view of Shigeta, US 20220199050 A1 (hereinafter “Shigeta”).
Regarding claim 4, Baek discloses the display device of claim 2.
Baek does not disclose in particular wherein a level of the overdriving voltage increases as a distance between the data driving circuit and the n-th subpixel increases.
In similar field of endeavor of display device (fig. 1, paragraph 25) where data driving circuit is configured to overdrive pixel voltage to improve display quality (paragraphs 4, 5), Shigeta disclose the concept increasing level of overdriving voltage as a distance between the data driving circuit and the pixel being driven increases (paragraph 10, “it is an object of the present invention to provide a display apparatus that can suppress the degradation of the image quality due to variation of the pixel charging rate in association with the signal delay in the direction of the source line”, paragraph 66, “in addition to calculating the overdrive adjustment value ODV based on the data comparison, weights the overdrive adjustment value ODV such that an overdrive amount of the drive voltage signal at the source driver distal end becomes larger than that at the source driver proximal end. Thus, the overdrive adjustment corresponding to the signal delay in the direction of the source line is performed”, fig. 8, paragraphs 77, 78, claim 2, “the overdrive arithmetic circuit calculates the overdrive value such that the drive voltage output from the voltage output unit varies corresponding to a length of the source line to the pixel portion where the drive voltage is supplied from the source driver”).
It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of adjusting magnitude of overdriving voltage in accordance to a distance between the data driving circuit of display device and pixel being driven, such as disclosed by Shigeta, into the display device of Baek with overdrive, to constitute wherein a level of the overdriving voltage increases as a distance between the data driving circuit and the n-th subpixel increases, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would allow display device to account for different time constant of pixel due to length of data line when overdriving pixel to improve overdrive effectiveness and sufficiently charge pixel.
Regarding claim 5, Baek discloses the display device of claim 1.
Baek does not specifically disclose wherein a distance between the data driving circuit and the n−1-th subpixel is smaller than a distance between the data driving circuit and the n-th subpixel, as Baek does not specifically disclose location of data driving circuit in relation to location of n-1-th subpixel and n-th subpixel.
In similar field of endeavor, Shigeta discloses display panel with data driving circuit located at a top of display, wherein a distance between the data driving circuit and the n−1-th subpixel is smaller than a distance between the data driving circuit and the n-th subpixel (fig. 1, paragraphs 24-34, source driver 14 at top of display, paragraph 30, n-th and n-1th pixel data corresponding to pixels among rows connected to gate lines GL1 to GLn, “Each of the n pixel data piece groups is a pixel data piece group constituted of the pixel data piece corresponding to the gradation voltage to be supplied to the pixels on one horizontal scanning line (namely, each of the gate lines GL1 to GLn)”), wherein the data driving circuit is configured to generate second digital data of an n-th subpixel on which an overdriving processing has been performed from first digital data of the n-th subpixel, based on a difference between the first digital data of the n-th subpixel connected to an n-th gate line among the plurality of gate lines and second digital data of a n−1-th subpixel connected to a n−1-th gate line among the plurality of gate lines (fig. 2, 3, see details in paragraphs 35-52, “The OD arithmetic circuit 34 compares the data of the (N) line output from the first latch 31 with the data of the (N−1) line output from the second latch 32 and calculates the overdrive adjustment value ODV based on a comparison result. That is, the data row corresponding to each line is constituted of data values of a predetermined number of bits (8 bits in the embodiment) representing the luminance levels of the pixels. The OD arithmetic circuit 34 compares the data values of each bit digit and calculate the overdrive adjustment value ODV based on a difference of the data values”).
It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of comparing digital pixel data of n-1-th and n-th pixel row respectively closer and further from data driving circuit to generate overdriving data, such as disclosed by Shigeta, into the display device with overdrive generation of Baek, to constitute wherein a distance between the data driving circuit and the n−1-th subpixel is smaller than a distance between the data driving circuit and the n-th subpixel, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would allow display device to account for different time constant of pixel due to length of data line when overdriving pixel to improve overdrive effectiveness and sufficiently charge pixel.
Claims 7, 8 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Baek, as applied in claim 1 above, and in further view of Sun, US 20090040167 A1 (hereinafter “Sun”).
Regarding claim 7, Baek discloses the display device of claim 1, wherein the data driving circuit comprises:
a first latch circuit configured to store the first digital data of the n-th subpixel based on a sampling signal corresponding to a data control signal applied from the display controller (paragraphs 93, 94, “Referring to FIGS. 1 and 7, the shift register 120 includes a pixel data shift register latch 121 to shift pixel data, and an overdriving pixel data shift register latch 122 to shift overdriving pixel data. The pixel data shift register latch 121 stores the pixel data PD input from the timing controller 110”);
a line memory device configured to store the second digital data of the n−1-th subpixel (paragraph 80, “The line memory device 111 includes a first pixel data storing unit 112 to store the previous pixel data PDN”);
a data compensation circuit configured to update the second digital data of the n-th subpixel based on a comparison result between the second digital data of the n−1-th subpixel stored in the line memory device and the first digital data of the n-th subpixel stored in the first latch circuit (paragraph 81, “The data comparator 114 compares the previous pixel data PDN and the current pixel data PDN+1 by units of a line. The data comparator 114 selects one of the first to third comparing result processors 115 to 117 based on the compared result”, see details in fig. 6, 7, paragraphs 81-96, updated second digital data of n-th subpixel is output as OPD and stored in second latch 122); and
a second latch circuit configured to receive the second digital data of the n-th subpixel and output the second digital data of the n-th subpixel in response to a data timing control signal (paragraphs 93, 94, “Referring to FIGS. 1 and 7, the shift register 120 includes a pixel data shift register latch 121 to shift pixel data, and an overdriving pixel data shift register latch 122 to shift overdriving pixel data… The overdriving pixel data shift register latch 122 stores the overdriving pixel data OPD input from the timing controller 110”).
Baek differs from instant application in that Baek does not disclose the line memory device is a line buffer, and that the updated second digital data of n-th subpixel is stored in the line buffer prior to being transferred to the second latch.
In similar field of endeavor, Sun discloses the concept of utilizing a line buffer to store digital data of pixel driven, wherein digital data of pixel updated for overdriven function is being stored in the line buffer (fig. 5, line buffer 28, paragraph 30, “The circuitry 16 of the processor 14 compares the previous image stored in an external SDRAM frame buffer 26 with the inputted present image. According to the compared results, the red portion of the overdrived gray level is chosen from the R-ODLUT unit 30, the green portion of the overdrived gray level is chosen from the G-ODLUT unit 32, and the blue portion of the overdrived gray level is chosen from the B-ODLUT unit 34 respectively. A lookup table stored in the OTP memory 24 provides RGB gray levels and sends to the R-ODLUT unit 30, the G-ODLUT unit 32, and the B-ODLUT unit 34 for access by the circuitry 16 of the processor 14. After overdrived, the circuitry 18 of the processor 14 deals the RGB data transmitted from the circuitry 16 of the processor 14 with the independent RGB gamma curve corrections. An independent Red gamma curve of a pixel is sent from the RedLUT unit 40, an independent Green gamma curve of the pixel is sent from the GreenLUT unit 42, and an independent Blue gamma curve of a pixel is sent from the BlueLUT unit 44 to the circuitry 18 of the processor 14 to provide independent RGB gamma curves for correction according to the gray level of the pixel. The lookup table of independent RGB gamma curves of each pixel is also stored in the OTP memory 24 and sent to the RedLUT unit 40, the GreenLUT unit 42, and the BlueLUT unit 44 respectively for access. At last, the adjusted RGB data of the image are sent to the line buffer 28 and then transmitted to the transmitter 29 in parallel for outputting to column drivers to drive pixels of an LCD panel.”
Both Baek and instant application discloses storing and comparing digital data of current pixel row with preceding pixel row to generate and store updated digital data for overdriving. Baek differs from instant application that the updated digital data is being directly transferred to the second latch while instant application stores the updated digital value back to the line buffer before transferring the digital data to the second latch. It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of storing updated digital data for overdriving function into line buffer, such as disclosed by Sun, into the display device of Baek, such that line buffer is utilized to store previous as well as updated digital data, to constitute: a line buffer configured to store the second digital data of the n−1-th subpixel; a data compensation circuit configured to update the second digital data of the n-th subpixel to the line buffer based on a comparison result between the second digital data of the n−1-th subpixel stored in the line buffer and the first digital data of the n-th subpixel stored in the first latch circuit; a second latch circuit configured to receive the second digital data of the n-th subpixel from the line buffer and output the second digital data of the n-th subpixel in response to a data timing control signal, such is incorporation of a known technique into a know device to yield predictable result, the predictable result of allowing display device to improving charging function of pixel data line based on updated overdriving digital data would have been the same.
Regarding claim 8, Baek in view of Sun discloses the display device of claim 7, wherein the second digital data of the n−1-th subpixel is digital data is derived based on the comparison result between the first digital data of the n−1-th subpixel and the second digital data of an n−2-th subpixel (see Baek, paragraphs 79-91, each second digital data of subpixel to be driven is derived based on comparison result between the current pixel data and previous line pixel data, hence as the overdriving process is executed line by line, overdriving digital data of n-1-th subpixel would have been derived based on comparison result between digital data of n-1-th subpixel and n-2-th subpixel).
Regarding claim 14. The display device of claim 7, wherein the data driving circuit further includes:
a digital-to-analog conversion circuit configured to convert the second digital data of the n-th subpixel into the data voltage based on a gamma grayscale voltage (Baek, paragraphs 55, 56, “The decoder 160 converts the pixel data PD or the overdriving pixel data OPD into an analog signal based on the gray scale voltage VG. That is, the decoder 160 receives the gray scale voltage VG from the gray scale generator 150, and transmits the gray scale voltage VG corresponding to the pixel data PD or the overdriving pixel data OPD to the channel driver 170”); and
an output amplifier circuit configured to amplify the data voltage received from the digital-to-analog conversion circuit and outputting the amplified data voltage (Baek, paragraph 57, “The channel driver 170 transmits the converted analog signal to the display panel 200 for driving the display panel 200. In an exemplary embodiment, the channel driver 170 may be implemented by a non-inverting operational amplifier (OP AMP)”).
Claims 9 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Baek in view of Sun, as applied in claim 7 above, and in further view of Kim et al., US 20210312850 A1 (hereinafter “Kim”).
Regarding claim 9, Baek in view of Sun discloses the display device of claim 7, wherein the data compensation circuit comprises:
a comparator configured to compare the second digital data of the n−1-th subpixel stored in the line buffer with the first digital data of the n-th subpixel stored in the first latch circuit, and calculate a data transition value of the first digital data of the n-th subpixel as a comparison result (Baek, fig. 6, paragraphs 79, 81, “The data comparator 114 compares the previous pixel data PDN and the current pixel data PDN+1 by units of a line. The data comparator 114 selects one of the first to third comparing result processors 115 to 117 based on the compared result”); and
an adder configured to update the second digital data of the n-th subpixel in the line buffer (fig. 6, paragraphs 79, 82-88, calculating unit 118 which adds bit data to digital data of n-th pixel based on comparison result, “Specifically, when the current pixel data PDN+1 is greater than the previous pixel data PDN, the data comparator 114 selects the first comparing result processor 115. The first comparing result processor 115 adds n-bit weight data to the current pixel data PDN+1 through the calculating unit 118”).
Baek does not specifically disclose that the second digital data updated for overdriving is based on information corresponding to the data transition value among a plurality of overdriving period information and a plurality of overdriving level information previously stored in a look-up table.
In similar field of endeavor updating digital data of pixel to be driven for overdriving function, Kim discloses the concept that the amount of change to digital data to be updated is based on difference between current pixel data in present n-th row and previous digital data in n-1-th row, wherein the digital data is updated based on information in a look-up table, with data transition value, i.e. difference in present and previous data, each corresponding to an amount of level change in digital data to perform overdrive function (fig. 2, 3, 4A, paragraphs 62-63, “when it is determined to overdrive the current sub-pixel, the compensation value calculation unit 230 may determine values mapped to the first pixel data for the previous sub-pixel and the second pixel data for the current sub-pixel on the lookup table 240 as the compensation values for overdriving the current sub-pixel. For example, as shown in FIG. 4A, when the first pixel data for the previous sub-pixel is 32, the second pixel data for the current sub-pixel is 64, and the threshold value is 0, since the difference value between the first pixel data and the second pixel data is 32 which is greater than the threshold value, the compensation value calculation unit 230 determines to overdrive the current sub-pixel. Further, it is determined that the compensation value for the current sub-pixel is a value 73 for a point where a value 32 for the first pixel data and a value 64 for the second pixel data cross on the lookup table 240).
It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of adjusting the amount of change to digital data to be updated based on difference between current pixel data in present n-th row and previous digital data in n-1-th row, wherein the digital data is updated based on information in a look-up table, such as disclosed by Kim, into the display device of Baek in view of Sun, to constitute adder configured to update the second digital data of the n-th subpixel in the line buffer based on information corresponding to the data transition value among a plurality of overdriving period information and a plurality of overdriving level information previously stored in a look-up table, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would allow display device to account for different digital data shift amount from one row to next row and dynamically adjust overdriving amount to improve display quality.
Regarding claim 11, Baek in view of Sun and Kim discloses the display device of claim 9, wherein the data driving circuit updates the line buffer with the first digital data of the n-th subpixel to which the overdriving period is not applied, as the second digital data of the n-th subpixel, when the data transition value is less than a preset threshold value (see combination of Baek in view of Sun and Kim in claim 9, also see Baek, paragraphs 81, 86, 90, 92-95, when difference between previous digital data and current digital data is less than a preset threshold – 0 in this case, the data comparator select original pixel data as overdriving pixel data, which result in overdriving period not being applied as the original pixel data is driven throughout the horizontal period, “when the previous pixel data PDN is 8′b10010000 which is a binary number (136 which is a decimal number) and the current pixel data PDN+1 is 8′b10010000 which is a binary number (136 which is a decimal number), the current pixel data PDN+1 is equal to the previous pixel data PDN. In this case, the data comparator 114 selects the third comparing result processor 117. The third comparing result processor 117 transmits the current pixel data PDN+1 to the shift register 120 by bypassing the calculating unit 118”).
Claims 12 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Baek in view of Sun, as applied in claim 7 above, and in further view of Kim et al., US 20210256923 A1 (hereinafter “Kim”).
Regarding claims 12 and 13, Baek in view of Sun discloses the display device of claim 7, Baek in view of Sun does not disclose in particular (from claim 12) wherein the data timing control signal includes at least one of a source output enable signal and a source control signal, and (from claim 13) wherein a length of an application period of the source control signal is equal to a length of an overdriving period.
In similar field of endeavor, Kim discloses display device with similar overdriving function to compare image data of previous pixel line with image data of current pixel line and generating overdriving signal (fig. 6, paragraphs 132-137, “Image data signals are input (62) to the timing controller 101, which outputs the overdriving control signal OD based on the image data signals from the system. For example, the timing controller 101 compares (64) each of image data signals of a previous horizontal line among the image data signals with the first reference value and compares each of image data signals of a current horizontal line among the image data signals with the second reference value” , wherein the data timing control signal to control overdriving function includes at least one of a source output enable signal (paragraphs 91, “The holding latch unit 330 substantially simultaneously receives the image data signals applied thereto from the sampling latch unit 320 to store the image data signals and substantially simultaneously outputs sampled digital image data signals that are stored in a previous period, in response to a source output enable signal (“SOE”). The image data signals output from the holding latch unit 330 are substantially simultaneously applied to the digital-analog converter 340”, paragraph 143, “The source output enable signal SOE defines a source output period and a horizontal blanking period. A period (for example, (1) or (3)) during which the source output enable signal SOE maintains a low level corresponds to the aforementioned source output period, and a period (for example, (2)) during which the source output enable signal maintains a high level corresponds to the aforementioned horizontal blanking period,”, paragraph 144, “the data driver 111 substantially simultaneously outputs data voltages of the first horizontal line during the source output period of the source output enable signal SOE. For example, the data driver 111 substantially simultaneously outputs the data voltages of the first horizontal line during the first source output period (1) of the source output enable signal SOE”), and a source control signal, and wherein a length of an application period of the source control signal is equal to a length of an overdriving period (paragraph 137, “When the overdriving control signal OD of the active level is output from the timing controller 101, an overdriving operation is performed for the image data signals of the current horizontal line. On the other hand, when the overdriving control signal OD of the inactive level is output from the timing controller 101, no overdriving operation is performed for the image data signals of the current horizontal line).
It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of utilizing source enable signal and source/overdrive control signal in controlling overdriving function of display device, such as disclosed by Kim, into the display device of Baek in view of Sun with pixel driving circuit having data control signal to control overdrive, wherein the data timing control signal includes at least one of a source output enable signal and a source control signal, and wherein a length of an application period of the source control signal is equal to a length of an overdriving period, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would allow display device to account for different time constant of pixel due to length of data line when overdriving pixel to improve overdrive effectiveness.
Claims 15, 16 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Baek, as applied in claim 1 above, and in further view of Zhou et al., US 20240249658 A1 (hereinafter “Zhou”).
Regarding claims 15 and 16, Baek discloses the display device of claim 1.
Baek does not disclose in particular (from claim 15) wherein the data driving circuit includes a first data driving circuit disposed at a position corresponding to a first surface of the display panel and a second data driving circuit disposed at a position corresponding to a second surface of the display panel opposite the first surface,
wherein the display panel includes a first panel area adjacent to the first surface and a second panel area adjacent to the second surface,
wherein the first data driving circuit supplies the data voltage to the plurality of data lines located within the first panel area, and
wherein the second data driving circuit supplies the data voltage to the plurality of data lines located within the second panel area, and
(from claim 16) wherein each of the first data driving circuit and the second data driving circuit is configured to perform overdriving compensation for the data voltage provided to each of the first panel area and the second panel area.
In similar field of endeavor, Zhou discloses display device with similar overdriving function to compare image data of previous pixel line with image data of current pixel line and generating overdriving signal, Zhou discloses wherein the data driving circuit includes a first data driving circuit disposed at a position corresponding to a first surface of the display panel and a second data driving circuit disposed at a position corresponding to a second surface of the display panel opposite the first surface, wherein the display panel includes a first panel area adjacent to the first surface and a second panel area adjacent to the second surface,
wherein the first data driving circuit supplies the data voltage to the plurality of data lines located within the first panel area, and wherein the second data driving circuit supplies the data voltage to the plurality of data lines located within the second panel area (fig. 1a, paragraphs 61, 62, see annotated figure below)
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and wherein each of the first data driving circuit and the second data driving circuit is configured to perform overdriving compensation for the data voltage provided to each of the first panel area and the second panel area (fig. 8-10, paragraphs 88-101, obtaining a gray scale value of each sub-pixels in a current row and a gray scale value of each sub-pixels in a previous row; determining a target gray scale value of each sub-pixel in the current row according to the gray scale value of each sub-pixel in the current row, the gray scale value of each sub-pixel in the previous row, and a target compensation value in a predetermined target compensation lookup table)
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It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept having multiple source driver each being configured to provide pixel driving and overdriving voltage to separate area of display panel, such as disclosed by Zhou, into the display device of Baek, to constitute (from claim 15) wherein the data driving circuit includes a first data driving circuit disposed at a position corresponding to a first surface of the display panel and a second data driving circuit disposed at a position corresponding to a second surface of the display panel opposite the first surface,
wherein the display panel includes a first panel area adjacent to the first surface and a second panel area adjacent to the second surface,
wherein the first data driving circuit supplies the data voltage to the plurality of data lines located within the first panel area, and
wherein the second data driving circuit supplies the data voltage to the plurality of data lines located within the second panel area, and
(from claim 16) wherein each of the first data driving circuit and the second data driving circuit is configured to perform overdriving compensation for the data voltage provided to each of the first panel area and the second panel area, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would allow modular manufacturing of different components of display device while allowing the display device to achieve the function of improved charging of pixel data lines based on overdriving compensation to improve display effect.
Regarding claim 18, Baek discloses a display device comprising:
a display panel (fig. 1, display panel 200) including a plurality of gate lines, a plurality of data lines, and a plurality of subpixels (paragraphs 5, 62, “The display panel 200 includes a plurality of scan lines (not shown), a plurality of data lines (not shown), and a plurality of unit pixels connected to the plurality of scan lines and the plurality of data lines”);
a gate driving circuit configured to drive the plurality of gate lines (paragraphs 5, 58); a data driving circuit configured to supply a data voltage to the plurality of data lines (paragraphs, 5, 50, ““A display device includes a display panel in which a plurality of unit pixels for displaying an image are arranged, a gate driver for driving gate lines of the display panel, and a source driver for providing display data for data lines of the display panel so as to display the image”);
wherein the data driving circuit is configured to generate second digital data of an n-th subpixel on which an overdriving processing has been performed from first digital data of the n-th subpixel, based on a difference between the first digital data of the n-th subpixel connected to an n-th gate line among the plurality of gate lines and second digital data of a n−1-th subpixel connected to a n−1-th gate line among the plurality of gate lines (paragraph 51, “The timing controller 110 generates overdriving pixel data OPD to perform an overdriving operation. The overdriving pixel data OPD is generated by adding or subtracting n-bit weight data to or from pixel data PD”, paragraph 59, “The display driving device 100 according to an embodiment of the present inventive concept compares previous pixel data and current pixel data in units of a line, and adds or subtracts the n-bit weight data to or from the current pixel data based on the compared result”, see detail in fig. 6, paragraphs 80-91, “The line memory device 111 includes a first pixel data storing unit 112 to store the previous pixel data PD(N), and a second pixel data storing unit 113 to store the current pixel data PD(N+1). The data comparator 114 compares the previous pixel data PD and the current pixel data PD by units of a line”, “Specifically, when the current pixel data PD(N+1) is greater than the previous pixel data PD(N), the data comparator 114 selects the first comparing result processor 115. The first comparing result processor 115 adds n-bit weight data to the current pixel data PD(N+1) through the calculating unit 118”, “Further, when the current pixel data PD(N+1) is smaller than the previous pixel data PD(N), the data comparator 114 selects the second comparing result processor 116. The second comparing result processor …subtracts … from the current pixel data PD(N+1) through the calculating unit 118. Moreover, when … the current pixel data PD(N+1) is equal to the previous pixel data PD(N). In this case, the data comparator 114 selects the third comparing result processor 117. The third comparing result processor 117 transmits the current pixel data PD(N+1) to the shift register 120 by bypassing the calculating unit 118.” In summary, the timing controller / data driving circuit of Baek compensate for RC delay by comparing digital data of current line of pixel data PD(N+1) --- corresponding to claimed n-th subpixel of nth gate line, with previous line of pixel data PD(N) – corresponding to claimed n-1th subpixel of n-1th gate line, and adjust digital data of current line by adding to, subtract from, or maintain bits data of pixel value based on difference between current line data and previous line data), and supply the data voltage based on the second digital data of the n-th subpixel (fig. 7, paragraphs 92-96, modified pixel data supplied to analog-to-digital converter 160)
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Baek does not disclose in particular: wherein the data driving circuit includes a first data driving circuit disposed at a position corresponding to a first surface of the display panel and a second data driving circuit disposed at a position corresponding to a second surface of the display panel opposite the first surface,
wherein the display panel includes a first panel area adjacent to the first surface and a second panel area adjacent to the second surface,
wherein the first data driving circuit supplies the data voltage to the plurality of data lines located within the first panel area, and
wherein the second data driving circuit supplies the data voltage to the plurality of data lines located within the second panel area, and wherein each of the first data driving circuit and the second data driving circuit is configured to perform overdriving compensation for the data voltage provided to each of the first panel area and the second panel area.
In similar field of endeavor, Zhou discloses display device with similar overdriving function to compare image data of previous pixel line with image data of current pixel line and generating overdriving signal, Zhou discloses wherein the data driving circuit includes a first data driving circuit disposed at a position corresponding to a first surface of the display panel and a second data driving circuit disposed at a position corresponding to a second surface of the display panel opposite the first surface, wherein the display panel includes a first panel area adjacent to the first surface and a second panel area adjacent to the second surface,
wherein the first data driving circuit supplies the data voltage to the plurality of data lines located within the first panel area, and wherein the second data driving circuit supplies the data voltage to the plurality of data lines located within the second panel area (fig. 1a, paragraphs 61, 62, see annotated figure below)
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and wherein each of the first data driving circuit and the second data driving circuit is configured to perform overdriving compensation for the data voltage provided to each of the first panel area and the second panel area (fig. 8-10, paragraphs 88-101, obtaining a gray scale value of each sub-pixels in a current row and a gray scale value of each sub-pixels in a previous row; determining a target gray scale value of each sub-pixel in the current row according to the gray scale value of each sub-pixel in the current row, the gray scale value of each sub-pixel in the previous row, and a target compensation value in a predetermined target compensation lookup table)
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It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept having multiple source driver each being configured to provide pixel driving and overdriving voltage to separate area of display panel, such as disclosed by Zhou, into the display device of Baek, such that the data driving circuit of Baek comprises of multiple data driving circuit each configured to drive and provide overdrive voltage to one are of the display panel, to constitute a display panel including a first panel area and a second panel area, in which a plurality of gate lines, a plurality of data lines, and a plurality of subpixels are disposed respectively; a first data driving circuit configured to supply a data voltage to the plurality of data lines provided in the first panel area; and a second data driving circuit configured to supply a data voltage to the plurality of data lines provided in the second panel area, wherein each of the first data driving circuit and the second data driving circuit is configured to: generate second digital data of an n-th subpixel on which an overdriving processing has been performed from first digital data of the n-th subpixel, based on a difference between the first digital data of the n-th subpixel connected to an n-th gate line among the plurality of gate lines provided in each of the first panel area and the second panel area and second digital data of a n−1-th subpixel connected to a n−1-th gate line among the plurality of gate lines, and supply the data voltage based on the second digital data of the n-th subpixel, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would allow modular manufacturing of different components of display device while allowing the display device to achieve the function of improved charging of pixel data lines based on overdriving compensation to improve display effect.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Baek, as applied in claim 1 above, and in further view of Park et al., US 20180226029 A1 (hereinafter “Park”).
Regarding claim 17, Baek discloses the display device of claim 1.
Baek does not disclose in particular wherein each of the plurality of subpixels includes a driving transistor, a light emitting device connected to the driving transistor, a first node connected to the light emitting device, and at least one transistor connected to at least one of a gate node, a drain node and a source node of the driving transistor, and
wherein at least one transistor provided in the n−1-th subpixel and at least one transistor provided in the n-th subpixel are connected to a same gate control signal line.
In similar field of endeavor of display device, Park discloses pixel structure wherein each of the plurality of subpixels includes a driving transistor, a light emitting device connected to the driving transistor, a first node connected to the light emitting device, and at least one transistor connected to at least one of a gate node, a drain node and a source node of the driving transistor, and wherein at least one transistor provided in the n−1-th subpixel and at least one transistor provided in the n-th subpixel are connected to a same gate control signal line (see fig. 3, paragraphs 59-67, annotated as in below, paragraph 52, each subpixel include a initialization transistor wherein the gate control signal line is connected with all subpixels to provide an initialization signal GI to initialize each subpixel at the same time: “the scan driver 130 may simultaneously output the scan signals SCAN(1) to SCAN(n). Each of the scan signals SCAN(1) to SCAN(n) may have a turn-on level during the initialization period P1. The global gate driver 140 may output the initialization signal GI having the turn-on level and the emission signal EM having the turn-off level during the initialization period P1. Accordingly, the gate voltage of the driving transistor and the anode voltage of the organic light emitting diode of each pixel 10 may be substantially simultaneously initialized to the same voltage”).
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It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the pixel structure of Park, into the display device of Baek, to constitute wherein each of the plurality of subpixels includes a driving transistor, a light emitting device connected to the driving transistor, a first node connected to the light emitting device, and at least one transistor connected to at least one of a gate node, a drain node and a source node of the driving transistor, and wherein at least one transistor provided in the n−1-th subpixel and at least one transistor provided in the n-th subpixel are connected to a same gate control signal line, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would allow subpixels to be reset/initialized simultaneously before carrying out overdriving and display function to display intended image.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PEIJIE SHEN whose telephone number is (571)272-5522. The examiner can normally be reached Monday - Friday 10AM - 6PM.
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/PEIJIE SHEN/Examiner, Art Unit 2622
/PATRICK N EDOUARD/Supervisory Patent Examiner, Art Unit 2622