DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to amendment filed on 12/29/25.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6 and 8-15 are rejected under 35 U.S.C. 103 as being unpatentable over Zhou et al. (US 2006/0262083) in view of Van Baarsen et al. (US 2013/0300779).
Regarding claim 1, Zhou discloses an image processing device (300, fig. 3, para.
0040), comprising:
a controller (330, para. 0040) configured to provide an image data (image, para.
0040) and a plurality of waveform data (voltage waveform, para. 0009), wherein the
image data comprises a plurality of pixel values of a plurality of frame periods, and the plurality of waveform data corresponds to the plurality of frame periods (FT); and
a driver (100) coupled to the controller (330) and a display circuit (310), and
configured to receive the image data and a first part (DR1, fig. 10, paras. 0066-0067) of
the plurality of waveform data from the controller, wherein after the driver drives the
display circuit according to the first part of the plurality of waveform data, the driver
receives a second part (DR2, fig. 10, paras. 0066-0067) of the waveform data from the
controller.
Zhou does not specifically disclose transmitting a preparation signal to the controller to obtain a second part of the waveform data.
In a similar field of endeavor of display controller, Van Baarsen discloses transmitting a preparation signal (such as signal from update buffer 304, fig. 8 to the controller 222 and 800) to the controller (222 and 800) to obtain a second part (second and subsequent frames) of the waveform data (paras. 0078-0079).
Therefore, it would have been obvious to one of ordinary skill in the art before effective filling date of the claimed invention to incorporate the signal to the controller as taught by Van Baarsen in the system of Zhou in order to save time and space in the memory (para. 0080).
Regarding claim 2, the combination of Zhou and Van Baarsen discloses after the driver drives the display circuit according to the first part (such as first frame) of the plurality of waveform data, the driver transmits the preparation signal (such as signal from update buffer 304, fig. 8 to the controller 222 and 800) to the controller (222 and 800) to obtain the second part (second and subsequent frames) of the waveform data from the controller (paras. 0078-0079 of Van Baarsen).
Regarding claims 3 and 8, the combination of Zhou and Van Baarsen discloses when each of the plurality of frame periods ends, the driver transmits the preparation signal to the controller to obtain the second part of the waveform data from the controller (paras. 0078-0079 of Van Baarsen).
Regarding claims 4 and 9, Zhou discloses the driver is configured to apply
voltage (voltage waveform) to the display circuit according to the plurality of waveform
data, and the first part (DR1) of the plurality of waveform data corresponds to one or
more of the plurality of frame periods (FT).
Regarding claims 5 and 10, Zhou discloses the driver is configured to decode the
plurality of waveform data to control the display circuit to display the plurality of pixel
values (paras. 0040 and 0043).
Regarding claim 6, Zhou discloses an image display method, comprising:
transmitting, by a controller (330, para. 0040), an image data (image, para. 0040)
to a driver (100), wherein the image data comprises a plurality of pixel values of a
plurality of frame periods;
transmitting, by the controller (330), a first part (DR1, fig. 10, paras. 0066-0067)
of a plurality of waveform data (voltage waveform, para. 0009) to the driver, wherein the
plurality of waveform data corresponds to the plurality of frame periods (FT);
driving, by the driver, a display circuit (310) according to the first part (DR1) of
the plurality of waveform data; and
receiving, by the driver, a second part (DR2, fig. 10, paras. 0066-0067) of the
waveform data from the controller.
Zhou does not specifically disclose transmitting a preparation signal to the controller to obtain a second part of the waveform data.
In a similar field of endeavor of display controller, Van Baarsen discloses transmitting a preparation signal (such as signal from update buffer 304, fig. 8 to the controller 222 and 800) to the controller (222 and 800) to obtain a second part (second and subsequent frames) of the waveform data (paras. 0078-0079).
Therefore, it would have been obvious to one of ordinary skill in the art before effective filling date of the claimed invention to incorporate the signal to the controller as taught by Van Baarsen in the system of Zhou in order to save time and space in the memory (para. 0080).
Regarding claim 11, Zhou discloses an image processing device (300, fig. 3,
para. 0040),, comprising:
a controller (330, para. 0040) configured to provide an image data (image, para.
0040) and a plurality of waveform data (voltage waveform, para. 0009), wherein the
image data comprises a plurality of pixel values of a plurality of frame periods (FT), and
the plurality of waveform data corresponds to the plurality of frame periods (FT); and
a driver (100) coupled to the controller (330) and a display circuit (310), and
configured to receive the image data and a first part (DR1, fig. 10, paras. 0066-0067) of
the plurality of waveform data from the controller, the driver receives a second part (DR2, fig. 10, paras. 0066-0067) of the waveform data from the controller.
Zhou does not specifically disclose the driver encodes the first part of the plurality of waveform data to generate a plurality of voltage data.
In a similar field of endeavor of display controller, Van Baarsen discloses driver encodes the first part of the plurality of waveform data to generate a plurality of voltage data (in the first frame of the waveform, the update pipe sequencer 223 may obtain the current and next state values from the buffer 800, para. 0079).
Therefore, it would have been obvious to one of ordinary skill in the art before effective filling date of the claimed invention to incorporate the data as taught by Van Baarsen in the system of Zhou in order to save time and space in the memory (para. 0080).
Regarding claim 12, the combination of Zhou and Van Baarsen discloses after the driver drives the display circuit according to the first part of the plurality of waveform data, the driver transmits a preparation signal to the controller to obtain a third part (such as subsequent frames) of the waveform data from the controller (paras. 0078-0079 of Van Baarsen).
Regarding claim 13, Zhou discloses the driver is configured to apply voltage to
the display circuit according to the plurality of waveform data, and the first part (DR1) of
the plurality of waveform data corresponds to one or more of the plurality of frame
periods (FT, fig. 10).
Regarding claim 14, Zhou discloses the display circuit is an electrophoretic
display device, and is configured to adjust a plurality of positions of a plurality of
electrophoretic particles in an electronic ink layer according to the plurality of voltage
data (paras. 0038-0039).
Regarding claim 15, Zhou discloses the electronic ink layer includes a plurality of electrophoretic particles, and the plurality of electrophoretic particles belongs to different types (paras. 0038-0039).
Response to Arguments
Applicant’s arguments with respect to claims 1-6 and 8-15 have been considered but are moot because the new ground of rejection does not rely on at least one reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENNIFER T NGUYEN whose telephone number is (571)272-7696. The examiner can normally be reached Mon-Fri 7:00-5:00.
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/JENNIFER T NGUYEN/ Primary Examiner, Art Unit 2629