Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
2. This office action is in response to communication filed on 02/15/2025. Claims 1-20 are pending on this application.
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 1-2, 4, 6-12, 14, 16-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Veldhoven Pub. No. 2022/0019883.
Fig. 1 and Fig. 4 of Velhoven discloses a method for providing analog-to-digital conversion (101, 103) using a first analog-to-digital converter (103) and a second ADC (102), the method (Fig. 1 and Fig. 4) comprising: executing iterated operation (paragraph 0025) including: generating ground truth (Target Signal D) by the first ADC (103) ;training a machine learning (ML) model (102) at each of the iterated operations (paragraph 0025) using the ground truth (Target signal D) and an uncorrected output (Output Signal D) from the second ADC (101) to learn to predict errors (predicted error in Fig. 4)) of the second ADC (101) at sampling points that the first ADC (101) and the second ADC have in common (Fig. 10 and Fig. 11) ; and modifying the uncorrected output (output signal D) based on the errors predicted (Error) by the ML model (102) to produce a corrected output (Corrected output signal D).
Regarding claim 2. The method of claim 1, Fig. 4 of Velhoven further discloses wherein modifying (202) the uncorrected output (output signal D) comprises: computing a difference (Subtraction) between the errors (Error) and the uncorrected output (output signal D).
Regarding claim 4. The method of claim 1, Fig. 1 and Fig. 4 further discloses wherein learning to predict errors comprises minimizing a loss function (paragraph 0030).
Regarding claim 6. The method of claim 1, Fig. 1 further discloses wherein the ML model (102) comprises: a hidden layer; and an output layer (paragraph 0027).
Regarding claim 7. The method of claim 6, Fig. 1 further discloses wherein the output layer (output layer of 102) comprises: one neuron performing linear regression (paragraph 0052).
Regarding claim 8. The method of claim 6, wherein the hidden layer comprises: up to ten neurons (paragraph 0052 discloses 20 neurons); and an activation function (paragraph 0027 discloses “a biological brain, can transmit a signal to other neurons. An artificial neuron that receives a signal then processes it and can signal neurons connected to it. In neural network implementations, the “signal” at a connection is a real number, and the output of each neuron is computed by some non-linear function of the sum of its inputs (e.g., sigmoid activation)”).
Regarding claim 9. The method of claim 8, Fig. 1 further discloses wherein the activation function comprises: tanh, ReLU, leaky ReLU, or Softmax (paragraph 0052 discloses “each neuron is computed by some non-linear function of the sum of its inputs (e.g., sigmoid activation.)
Regarding claim 10. The method of claim 1, Fig. 1 further discloses wherein the second (101) ADC comprises: successive approximation register (SAR) logic (paragraph 0008).
Regarding claim 11. Fig. 1 and Fig. 4 of Velhoven An analog-to-digital converter (ADC) system executing iterated operations (102; (paragraph 0025), the ADC system comprising: a first ADC (102) generating ground truth (Target signal D); a second ADC producing a corrected output (Corrected output Signal D) ; and a machine learning (ML) model (102) trained at each of the iterated operations (paragraph 0025) using the ground truth (Target Signal D) and an uncorrected output (output signal D) from the second ADC (101) , the trained ML model (102) configured to predict errors (Error) of the second ADC (101) at sampling points that the first ADC and the second ADC have in common (common (Fig. 10 and Fig. 11),wherein the second ADC (101) modifies the uncorrected output( output signal D) based on the errors predicted (Error) by the ML model (102) to produce the corrected output (Corrected output signal D).
Regarding claim 12. The system of claim 11, Fig .4 further discloses wherein the corrected output (Corrected output signal D) comprises: a difference (subtraction) between the errors (Error) and the uncorrected output (output signal D).
Regarding claim 14. The ADC system of claim 11, Fig. 1 further discloses wherein the training comprises: minimizing a loss function (paragraph 0030).
Regarding claim 16. The ADC system of claim 11, Fig. 1 further discloses wherein the ML model (102) comprises: a hidden layer; and an output layer (paragraph 0027).
Regarding claim 17. The ADC system of claim 16, Fig. 1 further discloses wherein the output layer comprises: one neuron performing linear regression (paragraph 0052).
Regarding claim 18. The ADC system of claim 16, Fig. 1 further discloses wherein the hidden layer comprises: up to ten neurons (paragraph 0052 discloses 20 neurons); and an activation function (paragraph 0027 discloses “a biological brain, can transmit a signal to other neurons. An artificial neuron that receives a signal then processes it and can signal neurons connected to it. In neural network implementations, the “signal” at a connection is a real number, and the output of each neuron is computed by some non-linear function of the sum of its inputs (e.g., sigmoid activation)”).
Regarding claim 19. The ADC system of claim 18, wherein the activation function comprises: tanh, ReLU, leaky ReLU, or Softmax (paragraph 0052 discloses “each neuron is computed by some non-linear function of the sum of its inputs (e.g., sigmoid activation.)
Regarding claim 20. The system of claim 11, Fig. 1 further discloses wherein the second ADC comprises: successive approximation register (SAR) logic (paragraph 0008).
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. Claims 3 and 13 is rejected under 35 U.S.C. 103 as being unpatentable over Veldhoven applied to claims 1 and 11 above, respectively,i n view of Terwilliger U.S. patent No. 8,193,962.
Veldhoven applied to claims 1 and 13 above does not disclose wherein the first ADC (103) comprises: a low speed (< 5MHz), high resolution (>11 bits) ADC.
Fig. 1 of Terwilliger disclose ADC comprising a low speed (< 5MHz), high resolution (>11 bits) ADC (Col. 1 lines 37-41).
Veldhoven and Terwilliger are common subject matter of ADC; therefore, it would have been obvious before the effective filing date of claimed invention to one ordinary skill in the art to which the claimed invention pertains to incorporate Terwilliger into Veldhoven for the purpose of proving high resolution ADC (Col. 1 lines 37-41 of Terwilliger).
7. Claims 5 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Veldhoven applied to claims 4 and 14 above, in view of AIT AOUDIA et al. Pub. No. 2021/0211163.
Veldhoven applied to claim 4 above does not disclose minimizing the loss function comprises: squaring a difference between the uncorrected output and the ground truth; and dividing the squared difference by two.
Fig. 2 of AIT AOUDIA et al. discloses a machine learning for ADC comprising: minimizing the loss function (paragraph 0079) comprises: squaring a difference between the uncorrected output and the ground truth; and dividing the squared difference by two (paragraphs 0074-0075).
Veldhoven and AIT AOUDIA et al. are common subject matter of lost function of ADC; therefore, it would have been obvious before the effective filing date of claimed invention to one ordinary skill in the art to which the claimed invention pertains to incorporate AIT AOUDIA et al. into Veldhoven for the purpose to proving the loss function may be a mean squared error (MSE) function or a normalized mean squared error (NMSE) function (paragraph 0075 AIT AOUDIA et al.) for machine learning to training of a neural network (paragraph 0034 AIT AOUDIA et al.).
Contact Information
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Linh Van Nguyen whose telephone number is (571) 272-1810. The examiner can normally be reached from 8:30 – 5:00 Monday-Friday.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mr. Dameon E. Levi can be reached at (571) 272-2105. The fax phone numbers for the organization where this application or proceeding is assigned are (571-273-8300) for regular communications and (571-273-8300) for After Final communications.
08/17/2026
/LINH V NGUYEN/Primary Examiner, Art Unit 2845
