DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 02/12/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: DISPLAY CIRCUIT AND IMAGE DISPLAY SYSTEM CAPABLE OF REDUCING ABNORMAL DISPLAY DUE TO INCORRECT DISPLAY CONTROL DATA
Claim Objections
Claims 1 and 5 are objected to because of the following informalities:
As per claim 1, the limitation “a first register circuit, holding display control data used for controlling display of the display data on a display panel and outputting the display control data at a predetermined timing” should be “a first register circuit, holding display control data used for controlling display of the display data on [[a]] the display panel and outputting the display control data at a predetermined timing”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3-4 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sugimoto (US 20190237033).
As per claim 1, Sugimoto discloses a driver circuit (Fig. 1, #200) that displays received display data on a display panel (#300; [0030]), the driver circuit comprising:
a first register circuit (#4), holding display control data used for controlling display of the display data on a display panel and outputting the display control data at a predetermined timing ([0034]-[0035]);
a plurality of second register circuits (i.e., plurality of data flip-flops), holding decision data with predetermined logic ([0047]-[0049]);
a decision circuit (#21), outputting a decision result indicating no abnormality has occurred in response to a logic of decision data held in the plurality of second register circuits being a predetermined logic, respectively, and display control data held in the first register circuit being active ([0047]-[0049]; [0066]-[0068]); and
a mask control circuit (#35), controlling so that display control data held in the first register circuit is output to a circuit that performs display control of the display panel in response to a decision result output from the decision circuit indicating that no abnormality has occurred ([0066]-[0068]; where a mask control circuit is inherently present).
As per claim 3, Sugimoto discloses the driver circuit according to claim 1, wherein the decision data is data comprising at least one of both high level logic and low level logic ([0047]-[0049]).
As per claim 4, Sugimoto discloses the driver circuit according to claim 1, wherein the plurality of second register circuits are configured near the first register circuit ([0034]-[0035]; [0047]-[0048]).
As per claim 7, Sugimoto discloses an image display system, comprising:
the driver circuit (#200) according to claim 1 ([0030]); and
a control circuit (#100), transmitting the display data to the driver circuit (#200; [0030]).
Allowable Subject Matter
Claims 2 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of a driver circuit that displays received display data on a display panel, the driver circuit comprising a first register circuit, holding display control data used for controlling display of the display data on a display panel and outputting the display control data at a predetermined timing; a plurality of second register circuits, holding decision data with predetermined logic does not teach or fairly suggest the mask control circuit controls so that display control data held in the first register circuit is output to a circuit that performs display control of the display panel by allowing a clock signal to be supplied to an output flip-flop circuit for outputting display control data held in the first register circuit in response to a decision result output from the decision circuit indicating that no abnormality has occurred.
Claims 5 and 6 are allowed.
The following is an examiner’s statement of reasons for allowance: The prior art of a driver circuit that displays received display data on a display panel, the driver circuit comprising a first register circuit, holding display control data used for controlling display of the display data on a display panel and outputting the display control data at a predetermined timing; a plurality of second register circuits, holding decision data with predetermined logic does not teach or fairly suggest a plurality of third register circuits, holding decision data with predetermined logic different from decision data held in the plurality of second register circuits; a selection circuit, selecting either decision data held in the plurality of second register circuits or decision data held in the plurality of third register circuits according to a logic of a control signal that controls a timing at which a logic of the display control data switches; a decision circuit, outputting a decision result indicating no abnormality has occurred in response to a combination of a logic of decision data selected by the selection circuit and a logic of display control data held in the first register circuit matching any of predetermined combinations; a mask control circuit, controlling so that display control data held in the first register circuit is output to a circuit that performs display control of the display panel in response to a decision result output from the decision circuit indicating that no abnormality has occurred.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Lam whose telephone number is (571)272-8044. The examiner can normally be reached 1pm-9pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571 272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Nelson Lam/Examiner, Art Unit 2627
/KE XIAO/Supervisory Patent Examiner, Art Unit 2627