Prosecution Insights
Last updated: April 19, 2026
Application No. 19/054,784

System for Video Data Recording with Compact Image Sensor Array

Non-Final OA §103
Filed
Feb 15, 2025
Examiner
BILLAH, MASUM
Art Unit
2486
Tech Center
2400 — Computer Networks
Assignee
Ramona Optics Inc.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
335 granted / 419 resolved
+22.0% vs TC avg
Strong +21% interview lift
Without
With
+21.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
31 currently pending
Career history
450
Total Applications
across all art units

Statute-Specific Performance

§101
3.9%
-36.1% vs TC avg
§103
60.5%
+20.5% vs TC avg
§102
14.2%
-25.8% vs TC avg
§112
11.2%
-28.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 419 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This Office Action is in response to the application 19/054,784 filed on 02/15/2025. Claims 1 – 15 have been examined and are pending in this application. Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 1 – 5, 8 – 11, 14, 15 are rejected under 35 U.S.C. 103 as being unpatentable over Olsen et al. (US 2012/0104526 A1) in view of Toda et al. (JP-2012075179-A). Regarding claim 1, Olsen discloses: “a digital imaging system [see abstract: An imager apparatus and methods are described], the system comprising: a) an array of more than one digital image sensor arranged [see para: 0065; FIG. 13 is an isometric view of an imaging module 1300 including an optics frame 1200 assembled with three lens group assemblies, under an embodiment. The view of FIG. 13 is toward the bottom of the optics frame 1201A looking through lenses of the three assembled optics channels shown. Part of the optics frame 1201B is visible at the top of the module 1300] on a single printed circuit board (PCB) at a tight inter-sensor spacing, wherein the inter-sensor spacing is less than a width of two adjacent image sensors [see para: 0072; FIG. 18 is a block diagram of a digital camera subsystem that employs separate arrays, e.g., arrays 1804A-1804D, on one image sensor, in contrast to the prior art. For example, typical prior art approaches employ a Bayer pattern (or variations thereof), perform operations across the array (a pixel at a time), and integrate each set of four pixels (for example, red/green/blue/green or variation thereof) from the array into a single full color pixel] and wherein each digital image sensor comprises an array of light sensitive pixels [see para: 0103; In some embodiments, one of the optical channels 2206 detects red light, one of the optical channels 2206 detects green light, and one of the optical channels 2206 detects blue light. In some of such embodiments, one of the optical channels 2206 detects infrared light, cyan light, or emerald light. In some other embodiments, one of the optical channels 2206 detects cyan light, one of the optical channels 2206 detects yellow light, one of the optical channels 2206 detects magenta light and one of the optical channels 2206 detects clear light (black and white). Any other wavelength or band of wavelengths (whether visible or invisible) combinations can also be used] configured to: b) detect incident electromagnetic radiation [see para: 0045; Aspects of the imager module are directed toward packaging microelectronic imagers that are responsive to radiation in the visible light spectrum, or radiation in other spectrums, to provide a small imager module size suitable for automated manufacture at low cost while providing improved imaging performance, but are not so limited]; and c) convert the detected electromagnetic radiation into a digital signal [see para: 0120; The sensor array sensor array 2404 captures light and converts it into one or more signals, such as electrical signals, which are supplied to one or more of the circuits 2470, 2472, and 2474. The sensor array 2404 includes a plurality of sensor elements such as for example, a plurality of identical photo detectors (sometimes referred to as “picture elements” or “pixels”), e.g., pixels 2480 1,1-2480 n,m. The photo detectors 2480 1,1-2480 n,m, are an array, for example a matrix-type array. The number of pixels in the array may be, for example, in a range from hundreds of thousands to millions]; d) a first digital processing unit [see para: 0033; FIG. 20 is a block diagram of processing circuitry of a digital camera subsystem] operatively connected to the plurality of electrical traces, wherein the first digital processing unit is positioned at a finite distance from the digital image sensors to mitigate heat transfer therebetween [implicit or considering as design choice wherein these processing unit placed in at specific distance] and wherein the first digital processing unit is configured to: e) receive the digital signals from the digital image sensors [see para: 0106; As will be further described hereinafter, the processor may include one or more channel processors, each of which is coupled to a respective one (or more) of the optical channels and generates an image based at least in part on the signal(s) received from the respective optical channel, although this is not required]; f) aggregate the received digital signals into a set of digital image data [see para: 0072; For example, typical prior art approaches employ a Bayer pattern (or variations thereof), perform operations across the array (a pixel at a time), and integrate each set of four pixels (for example, red/green/blue/green or variation thereof) from the array into a single full color pixel]; and Olsen does not explicitly disclose: “g) pre-process the set of digital image data; and h) a second digital processing unit configured to receive the pre-processed digital image data from the first digital processing unit for further processing and digital storage”. However, Toda, from the same or similar field of endeavor teaches: “g) pre-process the set of digital image data [see page: 7; A pre-processing unit 332 that performs image processing]; and h) a second digital processing unit configured to receive the pre-processed digital image data from the first digital processing unit for further processing and digital storage [see page: 7; an AD conversion unit 334 that converts an analog signal output from the pre-processing unit 332 into a digital signal, and correction processing that corrects shading generated in the photographing lens 302, pixel defects of the solid-state image sensor 314, and the like A unit 336 and an image signal processing unit 340. And see page:10; Each image generated in this manner is sent to a display unit (not shown) and presented to the operator as a visible image, or stored and stored in a storage device such as a hard disk device as it is, or to other functional units. Sent as processed data]. It would have been obvious to the person of ordinary skill in the art before the effective filing date of the claimed invention to modify optical device disclosed by Olsen to add the teachings of Toda as above, in order to provide a means for improving digital imaging system, image signal processing unit can pre-process the set of image data and receive the pre-processed image data from one of the digital processing unit for further processing and storing in the memory [Toda see para: 7]. Regarding claim 2, Olsen and Toda disclose all the limitation of claim 1 and are analyzed as previously discussed with respect to that claim. Furthermore, Olsen discloses: “wherein the printed circuit board comprises a plurality of electrical traces patterned thereon, wherein the plurality of electrical traces is electrically coupled to each of the digital image sensors and wherein each electrical trace is configured to carry the digital signals representing the detected electromagnetic radiation and one or more digital control signals that define operating properties of the digital image sensors [see para: 0007; The integrated circuit die 10 includes an image sensor region and associated circuitry 12 and a number of bond-pads 14 electrically coupled to the electrical circuitry 12. The interposer substrate 20 has a plurality of wire bond-pads 22, a plurality of bump/solder-pads 24, and traces 26 electrically coupling bond-pads 22 to corresponding bump/solder-pads 24. The bump/solder-pads 24 are arranged in an array for surface mounting the imager 1 to a board or module of another device. The wire bond-pads 14 on the die 10 are electrically coupled to the wire bond-pads 22 on the interposer substrate 20 by wire-bonds 28 to provide electrical pathways between the wire bond-pads 14 and the bump/solder-pads 24]. Regarding claim 3, Olsen and Toda disclose all the limitation of claim 1 and are analyzed as previously discussed with respect to that claim. Furthermore, Olsen discloses: “wherein each digital image sensor is configured to detect incident electromagnetic radiation associated with visible, ultraviolet, near-infrared or infrared portions of electromagnetic spectrum [see para: 0045; Aspects of the imager module are directed toward packaging microelectronic imagers that are responsive to radiation in the visible light spectrum, or radiation in other spectrums, to provide a small imager module size suitable for automated manufacture at low cost while providing improved imaging performance]. Regarding claim 4, Olsen and Toda disclose all the limitation of claim 1 and are analyzed as previously discussed with respect to that claim. Furthermore, Olsen discloses: “wherein at least one digital image sensor is coated with a filter selected from the group consisting of: a fluorescence emission filter and a color filter arranged in a Bayer pattern and wherein the filter selectively passes a predetermined spectral component of the incident electromagnetic radiation [see para: 0072; FIG. 18 is a block diagram of a digital camera subsystem that employs separate arrays, e.g., arrays 1804A-1804D, on one image sensor, in contrast to the prior art. For example, typical prior art approaches employ a Bayer pattern (or variations thereof), perform operations across the array (a pixel at a time), and integrate each set of four pixels (for example, red/green/blue/green or variation thereof) from the array into a single full color pixel. And see para: 0095; Further, due to the focused bandwidth for each lens, each of the lenses may be dyed during the manufacturing process for its respective bandwidth (e.g., red for the array targeting the red band of visible spectrum). Alternatively, a single color filter may be applied across each lens. This process eliminates the traditional color filters (such as the sheet of individual pixel filters) thereby reducing cost, improving signal strength and eliminating the pixel reduction barrier]. Regarding claims 5, “wherein at least one digital image sensor is coated with a homogeneous or inhomogeneous filter material covering the entire image sensor and wherein the homogeneous or inhomogeneous filter material filters the incident electromagnetic radiation in a spectral manner, a polarimetric manner or both” is only a matter of design choice because it only requires mere selection of specific types coating as per requirement to coat digital sensors for efficient works. Regarding claims 8, “wherein the printed circuit board comprises a multi-layer stackup having a plurality of high-speed electrical traces distributed over the layers and wherein each layer is sandwiched between ground planes that serve as heat sinks to reduce temperature rise in the digital image sensors” is only a matter of design choice because it only requires how these multiple layers will be stackup and having connection with electrical wires making it as sandwiched between planes that produce greater amount of heat and as per requirement, it can reduce greater amount of temperature to avoid damaging parts. Regarding claim 9, Olsen and Toda disclose all the limitation of claim 1 and are analyzed as previously discussed with respect to that claim. Olsen does not explicitly disclose: “wherein the aggregated set of digital image data comprises multiple image frames acquired as a function of time and wherein the multiple image frames acquired as the function of time constitute one or more video streams”. However, Toda, from the same or similar field of endeavor teaches: “wherein the aggregated set of digital image data comprises multiple image frames acquired as a function of time and wherein the multiple image frames acquired as the function of time constitute one or more video streams [see page:8; With such a configuration, the imaging apparatus 300 captures an optical image representing the subject Z including the infrared light IR by the photographing lens 302, and an infrared light image (near infrared light optical image) and a visible light image (visible light optics). Image) without being separated, the image signal processing unit 330 converts these infrared light image and visible light image into video signals, and then performs predetermined signal processing (for example, R, G, B components). Color signal separation into a color image signal, an infrared light image signal, or a mixed image signal obtained by combining the two]. It would have been obvious to the person of ordinary skill in the art before the effective filing date of the claimed invention to modify optical device disclosed by Olsen to add the teachings of Toda as above, in order to provide a means for improving digital imaging system, multiple image frames captured at a specific time and can generate video streams based on multiple frames using image processing algorithm [Toda see page: 8]. Regarding claim 10, Olsen and Toda disclose all the limitation of claim 1 and are analyzed as previously discussed with respect to that claim. Furthermore, Olsen discloses: “wherein the first digital processing unit is further configured to perform digital image processing selected from a group consisting of: noise reduction, lossless image compression, lossy image compression, region-of-interest selection, feature selection, image comparison and image stitching [see para: 0106; Further, the gain, noise reduction, dynamic range, linearity and/or any other characteristic of the processor, or combinations of such characteristics, may be adapted to improve and/or optimize the processor to such wavelength or color (or band of wavelengths or colors)]. Regarding claims 11, “wherein the first digital processing unit is further configured to send one or more digital control signals to the digital image sensors to define operating properties thereof and wherein the second digital processing unit is further configured to send digital instructions to the first digital processing unit for forming programmable logical blocks therein” is only a matter of design choice because it only requires set of instructions to transmit commands to the digital processing units so that it control the system. Regarding claims 14, “the system further comprising a thermal management mechanism configured to mitigate heat accumulation at the digital image sensors and along the electrical traces and wherein the thermal management mechanism comprises at least one of a group consisting of: multiple ground planes, exposed copper regions, heat sinks, forced air cooling and an array of heat pipes” is only a matter of design choice because it only requires mere selection of thermal management mechanism from one of a group consisting of multiple ground planes, exposed copper regions, heat sinks, forced air cooling and an array of heat pipes as per requirement. Regarding claim 15, claim 15 is rejected under the same art and evidentiary limitations as determined for the method of claim 1. Claim 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Olsen et al. (US 2012/0104526 A1) in view of Toda et al. (JP-2012075179-A) and further in view of Weller et al. (WO-2022164991-A1). Regarding claim 6, Olsen and Toda disclose all the limitation of claim 1 and are analyzed as previously discussed with respect to that claim. Olsen and Toda does not explicitly disclose: “wherein at least one digital image sensor is coated with a scintillator material configured to convert incident X-ray radiation into fluorescence emission that is subsequently detected by the digital image sensor”. However, Weller, from the same or similar field of endeavor teaches: “wherein at least one digital image sensor is coated with a scintillator material configured to convert incident X-ray radiation into fluorescence emission that is subsequently detected by the digital image sensor [see para: 0045; The image sensor 100 that may be implemented within the substrate 102 may be mounted onto, connected to, and/or the like a printed circuit board (PCB) assembly 104, another processor, a Field Programmable Gate Array (FPGA), and/or the like. In aspects, the image sensor 100 implemented together with the printed circuit board (PCB) assembly 104 and/or the like may form a module 140. The module 140 may be configured as a self-contained module, an imaging module, a self-contained imaging module, a housing, and/or the like. In aspects, the image sensor 100 may be implemented with and/or responsive to a scintillator. The scintillator may include a material that exhibits scintillation, a property of luminescence, when excited by ionizing radiation. In this regard, when the image sensor 100 is implemented with the scintillator, the image sensor 100 may acquire X-ray image data, computed tomography image data, and/or the like]. Therefore, It would have been obvious to the person of ordinary skill in the art before the effective filing date of the claimed invention to modify the system by Olsen to add the teachings of Toda as above, to further incorporate the teachings of Weller to provide a means for improving digital imaging system, digital image sensor can be coated with a scintillator material or based on the requirement, any other suitable materials can be used to coat and convert X-ray radiation into fluorescence emission that is subsequently detected by the digital image sensor [Weller see para: 0045]. Regarding claim 7, Olsen and Toda disclose all the limitation of claim 1 and are analyzed as previously discussed with respect to that claim. Olsen and Toda does not explicitly disclose: “, wherein the first digital processing unit comprises one or more field-programmable gate arrays (FPGAs) mounted on a secondary printed circuit board that is electrically connected via high-speed electrical connectors to the PCB bearing the array of more than one digital image sensor”. However, Weller, from the same or similar field of endeavor teaches: “wherein the first digital processing unit comprises one or more field-programmable gate arrays (FPGAs) mounted on a secondary printed circuit board that is electrically connected via high-speed electrical connectors to the PCB bearing the array of more than one digital image sensor [see para: 0045; The image sensor 100 that may be implemented within the substrate 102 may be mounted onto, connected to, and/or the like a printed circuit board (PCB) assembly 104, another processor, a Field Programmable Gate Array (FPGA), and/or the like. In aspects, the image sensor 100 implemented together with the printed circuit board (PCB) assembly 104 and/or the like may form a module 140. The module 140 may be configured as a self-contained module, an imaging module, a self-contained imaging module, a housing, and/or the like. In aspects, the image sensor 100 may be implemented with and/or responsive to a scintillator]. Therefore, It would have been obvious to the person of ordinary skill in the art before the effective filing date of the claimed invention to modify the system by Olsen to add the teachings of Toda as above, to further incorporate the teachings of Weller to provide a means for improving digital imaging system, processing unit such as field-programmable gate arrays (FPGAs) will be mounted on a printed circuit board so that image processing will be executed efficiently and effectively [Weller see para: 0045]. Allowable Subject Matter Claims 12 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Sparks et al (US 7855786 B2). Any inquiry concerning this communication or earlier communications from the examiner should be directed to Masum Billah whose telephone number is (571)270-0701. The examiner can normally be reached Mon - Friday 9 - 5 PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jamie J. Atala can be reached at (571) 272-7384. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MASUM BILLAH/Primary Patent Examiner, Art Unit 2486
Read full office action

Prosecution Timeline

Feb 15, 2025
Application Filed
Mar 07, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
99%
With Interview (+21.4%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 419 resolved cases by this examiner. Grant probability derived from career allow rate.

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