Prosecution Insights
Last updated: July 17, 2026
Application No. 19/055,102

ELECTRONIC DEVICE

Non-Final OA §102
Filed
Feb 17, 2025
Priority
Sep 01, 2022 — JP 2022-139401 +1 more
Examiner
PERVAN, MICHAEL
Art Unit
Tech Center
Assignee
Panasonic Holdings Corporation
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
752 granted / 928 resolved
+21.0% vs TC avg
Moderate +7% lift
Without
With
+7.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
14 currently pending
Career history
940
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
73.1%
+33.1% vs TC avg
§102
14.8%
-25.2% vs TC avg
§112
1.3%
-38.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 928 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim 1 is rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Shimoda et al (US 2016/0337488; submitted by Applicant). In regards to claim 1, Shimoda discloses an electronic device comprising: a panel (translucent panel 50) (Figs. 3-8 and paragraphs 18-23); a housing (casing 20) having a quadrangular annular shape, the housing facing an outer edge portion of a back surface of the panel and being provided along the outer edge portion (Figs. 3-8 and paragraphs 34-37); and a sheet (connecting part 38) positioned between the outer edge portion and the housing (Figs. 3-8 and paragraphs 38-47), wherein the outer edge portion and the sheet are bonded via a double-sided tape (double faced tape) (Figs. 3-8 and paragraphs 38, 44-47), the housing and the sheet are bonded via an adhesive (adhesive 82) (Figs. 3-8 and paragraphs 38, 46-57), and the sheet has an extending portion extending to an inner side than the housing as viewed from an orthogonal direction orthogonal to the back surface of the panel (Figs. 3-8 and paragraphs 37-47). Allowable Subject Matter Claims 2-5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Morioka et al (US 9,405,318) discloses a translucent panel attachment structure according to an embodiment of the present invention includes a translucent panel, a casing, and a silicone resin layer. The casing has an opening into which the translucent panel is fitted. The opening has an inner wall surface which faces a peripheral surface of the translucent panel and an inner bottom surface which inwardly extends from the inner wall surface so as to face a peripheral edge of a back surface of the translucent panel. The silicone resin layer is formed by filling a silicone resin between the peripheral surface of the translucent panel and the inner wall surface of the casing and between the peripheral edge of the back surface of the translucent panel and the inner bottom surface of the casing. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michael Pervan whose telephone number is (571)272-0910. The examiner can normally be reached Mon - Fri between 7:00am - 4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin Lee can be reached at (571) 272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL PERVAN/Primary Examiner, Art Unit 2629 June 23, 2026
Read full office action

Prosecution Timeline

Feb 17, 2025
Application Filed
Jun 26, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12682796
SYSTEMS AND METHODS FOR MONITORING LIGHT EMISSIONS OF ELECTRONIC DEVICES
2y 0m to grant Granted Jul 14, 2026
Patent 12681591
PEN STATE DETECTION CIRCUIT AND METHOD, AND INPUT SYSTEM
1y 4m to grant Granted Jul 14, 2026
Patent 12681587
ATTENTION AWARE VIRTUAL ASSISTANT DISMISSAL
1y 0m to grant Granted Jul 14, 2026
Patent 12675174
STYLUS AND ELECTRONIC DEVICE ASSEMBLY
2y 9m to grant Granted Jul 07, 2026
Patent 12675198
Input Device
1y 3m to grant Granted Jul 07, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
88%
With Interview (+7.1%)
2y 6m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 928 resolved cases by this examiner. Grant probability derived from career allowance rate.

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