Prosecution Insights
Last updated: July 05, 2026
Application No. 19/056,683

TRANSPORT CONTAINER FOR SEMICONDUCTOR WAFER AND METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT

Non-Final OA §102§103
Filed
Feb 18, 2025
Priority
Apr 16, 2024 — JP 2024-066361
Examiner
CHEUNG, CHUN HOI
Art Unit
3736
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Mitsubishi Electric Corporation
OA Round
1 (Non-Final)
62%
Grant Probability
Moderate
1-2
OA Rounds
1y 2m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allowance Rate
655 granted / 1054 resolved
-7.9% vs TC avg
Strong +39% interview lift
Without
With
+39.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
36 currently pending
Career history
1084
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
86.5%
+46.5% vs TC avg
§102
3.9%
-36.1% vs TC avg
§112
6.2%
-33.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1054 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 2/18/2025 is being considered by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2 and 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wiseman (20100307957). As to claim 1, Wiseman discloses a transport container (Figure 1) for a semiconductor wafer, comprising: a housing (24) having an opening (top opening through which a semiconductor wafer is configured to be taken in and out from a first direction; a pair of thresholds (32 and 34, pair of spaced apart substate or wafer support) disposed in the housing, the pair of thresholds configured to support a back surface of a circumferential edge portion of the semiconductor wafer in a second direction intersecting the first direction and a third direction opposite to the second direction (the spaced apart support 32 and 34 support the circumference of the wafer at the second and third direction perpendicular to the first direction);a lid (26) configured to open and close the opening (Figure 1); and a retainer (62) fixed to an inner surface of the lid, the retainer configured to hold an end face of the semiconductor wafer in the first direction (Figure 6), wherein the retainer includes a fixing portion fixed to the inner surface of the lid (the center mounting structure 64 is considered as fixing portion with comprises snap-on connector member 74 engages and snapes over end wall 112 of recess [0035]), and a left-wing portion (102) and a right-wing portion (100) respectively extending to left and right from the fixing portion (as shown in Figure 4, the left and right wing portion extend from the center fixing member 64) and having elastic force (as the lid close onto the wafer, the wafer receiving portion deflect toward cover portion 26 by a force and the lateral compression spring 106 compressed to hold the wafer, and as removing the lid, the wafer receiving portion spring back to its original form), and the left-wing portion and the right-wing portion hold the end face of the semiconductor wafer by the elastic force. PNG media_image1.png 522 486 media_image1.png Greyscale As to claim 2, Wiseman further discloses an angle formed between a perpendicular line extending from a center of the semiconductor wafer to the fixing portion and a line from a contact point at which the retainer is in contact with the semiconductor wafer toward the center of the semiconductor wafer is 80 degrees or less (as shown in Figure 6 as annotated above, the angle is clearly less than 80 degrees). As to claim 4, Wiseman further discloses the retainer is detachable from the lid (via the snap-on connector member 74 and the securing tab 98). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Wiseman (20100307957). As to claim 3, Wiseman does not disclose the angle formed between the perpendicular line extending from the center of the semiconductor wafer to the fixing portion and the line from the contact point at which the retainer is in contact with the semiconductor wafer toward the center of the semiconductor wafer is 45 degrees. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the length of the left and right wing portion of the cushion member of Wiseman so that the angle formed between the perpendicular line extending from the center of the semiconductor wafer to the fixing portion and the line from the contact point at which the retainer is in contact with the semiconductor wafer toward the center of the semiconductor wafer is 45 degrees because the selection of the specific angle such as the angle as disclosed by wiseman or as claimed would have been an obvious matter of design choice inasmuch as the resultant structures will work equally well. Furthermore, it would have been an obvious matter of design choice to extend the length of the left and right wing portion to cover a greater angle of the periphery of the semiconductor wafer and since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. 2144.04(IV)(A). Claims 5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Wiseman (20100307957) in view of Ogawa et al (12,451,384). As to claim 5, Wiseman does not disclose a holding force when the semiconductor wafer is held in the left-wing portion and the right- wing portion is larger than 0 N and 2 N or less. Nevertheless Ogawa discloses a substrate storage container (1) comprises a housing 10) and a door (20), the door comprises a recess for housing a retainer (50), the retainer comprises a left and right wing portion (52), the left and right wing portion supports the wafer portion that the semiconductor wafer is held in the left-wing portion and the right- wing portion is larger than 0 N and 2 N or less (column 9 teaches that the range of the holding force of the left and right wing portion is in the range of 0.15N to 10N. Part of the range as discloses falls into the applicant’s claim range between 0N to 2N. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the right and left wing with holding force adjustable form between 0 N and 2 N as taught by Ogawa to provide sufficient folding force to the wafer substrate but not over which might damage the edge of the wafer substrate. As to claim 7, Wiseman further discloses the left-wing portion and the right-wing portion hold a plurality of the semiconductor wafers arranged along a vertical direction (Figure 4 shows that the elongated portion of the cushion 62), but does not disclose both the left-wing portion and the right-wing portion have a structure in which a vertical portion and an inclined portion inclined toward a center side of the semiconductor wafer with respect to the vertical portion are repeated along the vertical direction. Nevertheless, Ogawa et al discloses the semiconductor wafer holding member (52) comprises a left-wing portion and the right-wing portion have a structure in which a vertical portion (55) and an inclined portion (56) inclined toward a center side of the semiconductor wafer with respect to the vertical portion are repeated along the vertical direction. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the right and left wing with a channel portion having a horizontal surface/vertical surface as taught by Ogawa in order to provide a flat surface to sit flush with the end edge of the semiconductor wafer. Claims 6 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Wiseman (20100307957) in view of Kanai (11735480). As to claim 6, Wiseman does not disclose a surface on a side holding the semiconductor wafer in each of the left-wing portion and the right-wing portion is provided with a cushion material having conductivity, or is coated with a coating having the conductivity. Nevertheless, Kanai discloses a substrate storage container comprises a front door retainer (4), the front door retainer is made of material synthetic resin with an antistatic agent, a conductivity-imparting agent such as carbon or metal fiber added to the molding material in an appropriate amount. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the right and left wing cushion material made of molded synthetic resin with conductivity agent such as carbon or metal fiber as taught by Kanai in order to discharge any buildup static electricity in the wafer that leads to harmful side effect. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Wiseman (20100307957) in view of Li et al (2023/0197491). As to claim 1, Wiseman does not specifically disclose a method comprising: a wafer preparation step of placing the semiconductor wafer on the pair of thresholds, and then closing the lid to hold the end face of the semiconductor wafer with the retainer to store the semiconductor wafer in the transport container; and a wafer processing step of processing the semiconductor wafer in a state where the semiconductor wafer is stored in the transport container to form the semiconductor element. Nevertheless, Li discloses a semiconductor wafer container comprises a method and system comprises a wafer preparation step of placing the semiconductor wafer on the pair of thresholds [0032] teaches to loaded and/or unloaded the wafer or reticle into the container and rest on the shelves, and then closing the lid to hold the end face of the semiconductor wafer with the retainer to store the semiconductor wafer in the transport container [0040]; and a wafer processing step of processing the semiconductor wafer in a state where the semiconductor wafer is stored in the transport container to form the semiconductor element (the container further comprises purge ports so the plurality of inlet purge port and outlet purge port can be connected to a purge flow distribution system for purging and discharging a purge gas while the semiconductor wafer is inside the container). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify semiconductor wafer container with purging ports install on the semiconductor wafer container in order to process the semiconductor wafer in the container as taught by Li in order to reduce the contamination and main wafer integrity. Allowable Subject Matter Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Examiner has cited particular paragraphs and/or columns and line numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested of the applicant, in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or prior art(s) disclosed by the Examiner (in the attached PTO-892 form). Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHUN HOI CHEUNG whose telephone number is (571)270-5702. The examiner can normally be reached Monday to Friday 9AM-5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Orlando E Aviles can be reached at (571)270-5531. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHUN HOI CHEUNG/Primary Examiner, Art Unit 3736
Read full office action

Prosecution Timeline

Feb 18, 2025
Application Filed
Apr 01, 2026
Non-Final Rejection mailed — §102, §103
Jun 06, 2026
Interview Requested
Jun 10, 2026
Applicant Interview (Telephonic)
Jun 10, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
62%
Grant Probability
99%
With Interview (+39.2%)
2y 7m (~1y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1054 resolved cases by this examiner. Grant probability derived from career allowance rate.

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