Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-17 are currently under review.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on February 19, 2025 and September 2, 2025 is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Objections
Claims 4-5, 9-10, and 15 are objected to because of the following informalities: typographic errors. Appropriate correction is required. The following is suggested:
Claim 4, lines 5-8: “the flexible circuit board further comprises a connection line, wherein the at least first pin electrically connected to the at least third pin to be electrically connected to the at least second pin electrically connected to the at least fourth pin”
Claim 4, lines 10-13: “electrically connected to the at least first pin and a second bonding terminal electrically connected to the at least second pin are disposed in the bonding region; and the at least third pin is electrically connected to the first bonding terminal, and the at least fourth pin is
electrically connected to the second bonding terminal.”
Claim 5, lines 6-7: “electrically connected to the at least third pin, and a second terminal of the second connection segment is electrically connected to the at least fourth pin.”
Claim 9, line 5: “the at least one first pin is electrically connected to at least one of the third bonding terminals.”
Claim 10, line 1: “wherein the at least first pin is
Claim 15, lines 1-3: “wherein when a plurality of first pins comprises the at least first pin are electrically connected to a plurality of second pins which comprise the at least second pin, the plurality of second pins are electrically connected to different first pins are different.”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 8, and 12-17 are rejected under 35 U.S.C. 103 as being unpatentable over Zou (Pub. No.: US 2021/0335163 A1) in view of Baek et al. (Pub. No.: US 2009/0225092 A1) hereinafter referred to as Baek.
With respect to Claim 1, Zou teaches a display module (fig. 4; ¶19), comprising: a display screen (fig. 1, display screen = display panel: items 11 and 10; ¶20) and a driver chip (fig. 4, item 20; ¶21); wherein the display screen comprises a display region (fig. 4, item 11; ¶20) and a non-display region (fig. 4, non-display region = area surrounding item 11 on item 10); the driver chip is disposed in the non-display region of the display screen (fig. 4) and configured to at least generate a drive signal that drives the display screen (¶21); the driver chip comprises at least one first pin (fig. 5, first pin is centrally located amongst all the pins) and at least one second pin (fig. 5, second pin is not the edge or central ones).
Zou does not explicitly mention the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin; and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin.
Baek teaches a display module (fig. 1; ¶24), comprising: a display screen (fig. 1, display screen = item 50; ¶30) and a driver chip (fig. 4A, item 51; ¶32); the driver chip is configured to at least generate a drive signal that drives the display screen (¶32; ¶40); the driver chip comprises at least one first pin (fig. 5A, item 51a) and at least one second pin (fig. 5A, item 51b), the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin (fig. 5A; ¶32, “The driver IC 51 includes several tens of pins used for its operation, and only a few of them are used for testing an operation of the driver IC itself”); and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin (fig. 5A, item 51a is connected to item 51b).
Therefore it would have been obvious to a person of ordinary skill in the art before the effective filing date to modify the display module of Zou, such that the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin; and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin, as taught by Baek so as to implement using universal parts to distinguish types of display units made by different suppliers and apply proper settings without adding separate RAM or pins (¶5-6; ¶9).
With respect to Claim 2, claim 1 is incorporated, Zou does not mention wherein the at least one second pin is a non-enabled pin reserved on the driver chip.
Baek teaches a display module (fig. 1; ¶24), comprising: a display screen (fig. 1, display screen = item 50; ¶30) and a driver chip (fig. 4A, item 51; ¶32); the driver chip is configured to at least generate a drive signal that drives the display screen (¶32; ¶40); the driver chip comprises at least one first pin (fig. 5A, item 51a) and at least one second pin (fig. 5A, item 51b), the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin (fig. 5A; ¶32, “The driver IC 51 includes several tens of pins used for its operation, and only a few of them are used for testing an operation of the driver IC itself”); and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin (fig. 5A, item 51a is connected to item 51b); wherein the at least one second pin is a non-enabled pin reserved on the driver chip (fig. 5A, items 51b and 51c are used for testing and not for display and are therefore non-enabled pins reserved for testing an operation of the driver IC itself; ¶32).
Therefore it would have been obvious to a person of ordinary skill in the art before the effective filing date to modify the display module of Zou, wherein the at least one second pin is a non-enabled pin reserved on the driver chip, as taught by Baek so as to implement using universal parts to distinguish types of display units made by different suppliers and apply proper settings without adding separate RAM or pins (¶5-6; ¶9).
With respect to Claim 8, claim 1 is incorporated, Zou teaches wherein the driver chip comprises a plurality of electrostatic protection circuits (fig. 4, item 40: electrostatic protection module comprises a plurality of adjustment units 41, see figs. 6-8; ¶25), and each of the at least one first pin and the at least one second pin is connected to a corresponding electrostatic protection circuit among the plurality of electrostatic protection circuits, respectively (figs. 5-8; ¶25).
With respect to Claim 12, claim 1 is incorporated, Zou teaches wherein the at least one first pin is disposed in a first region of the driver chip (fig. 5, at least one first pin is centrally located amongst all the pins, the central location is a first location), and the at least one second pin is disposed in a second region of the driver chip (fig. 5, at least one second pin is not the edge region or central region).
With respect to Claim 13, claim 12 is incorporated, Zou does not mention wherein a direction of a line connecting the first region to the second region is a first direction, the first direction is perpendicular to a second direction, and the second direction is a direction of a line connecting the driver chip to the display screen.
Baek teaches a display module (fig. 1; ¶24), comprising: a display screen (fig. 1, display screen = item 50; ¶30) and a driver chip (fig. 4A, item 51; ¶32); the driver chip is configured to at least generate a drive signal that drives the display screen (¶32; ¶40); the driver chip comprises at least one first pin (fig. 5A, item 51a) and at least one second pin (fig. 5A, item 51b), the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin (fig. 5A; ¶32, “The driver IC 51 includes several tens of pins used for its operation, and only a few of them are used for testing an operation of the driver IC itself”); and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin (fig. 5A, item 51a is connected to item 51b); wherein a direction of a line connecting the first region to the second region is a first direction (fig. 5, the first direction is a horizontal direction), the first direction is perpendicular to a second direction, and the second direction is a direction of a line connecting the driver chip to the display screen (fig. 5, the second direction is the length of the pin extending towards the display panel).
Therefore it would have been obvious to a person of ordinary skill in the art before the effective filing date to modify the display module of Zou, wherein a direction of a line connecting the first region to the second region is a first direction, the first direction is perpendicular to a second direction, and the second direction is a direction of a line connecting the driver chip to the display screen, as taught by Baek so as to provide most direct connection among pins.
With respect to Claim 14, claim 12 is incorporated, Zou teaches wherein the driver chip comprises two second regions (fig. 5, at least one second pin is located on a left side between a left edge and a central region = one of the two second regions, at least one second pin is located on a right side between a right edge and the central region = another one of the two second regions), and the first region is disposed between the two second regions (fig. 5, two centrally located pins = the first region).
With respect to Claim 15, claim 1 is incorporated, Zou does not mention wherein when a plurality of first pins are electrically connected to a plurality of second pins, second pins electrically connected to different first pins are different.
Baek teaches a display module (fig. 1; ¶24), comprising: a display screen (fig. 1, display screen = item 50; ¶30) and a driver chip (fig. 4A, item 51; ¶32); the driver chip is configured to at least generate a drive signal that drives the display screen (¶32; ¶40); the driver chip comprises at least one first pin (fig. 5A, item 51a) and at least one second pin (fig. 5A, item 51b), the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin (fig. 5A; ¶32, “The driver IC 51 includes several tens of pins used for its operation, and only a few of them are used for testing an operation of the driver IC itself”); and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin (fig. 5A, item 51a is connected to item 51b); wherein when a plurality of first pins (fig. 5A, item 51d/Vss and item 51a/VDO: a plurality of first pins) are electrically connected to a plurality of second pins (fig. 5A, item 51c and 51b: a plurality of second pins), second pins electrically connected to different first pins are different (fig. 5A; ¶32).
Therefore it would have been obvious to a person of ordinary skill in the art before the effective filing date to modify the display module of Zou, wherein when a plurality of first pins are electrically connected to a plurality of second pins, second pins electrically connected to different first pins are different, as taught by Baek so as to implement using universal parts to distinguish types of display units made by different suppliers and apply proper settings without adding separate RAM or pins (¶5-6; ¶9).
With respect to Claim 16, claim 1 is incorporated, Zou does not mention wherein the at least one first pin is electrically connected to a plurality of second pins.
Baek teaches a display module (fig. 1; ¶24), comprising: a display screen (fig. 1, display screen = item 50; ¶30) and a driver chip (fig. 4A, item 51; ¶32); the driver chip is configured to at least generate a drive signal that drives the display screen (¶32; ¶40); the driver chip comprises at least one first pin (fig. 5A, item 51a) and at least one second pin (fig. 5A, item 51b), the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin (fig. 5A; ¶32, “The driver IC 51 includes several tens of pins used for its operation, and only a few of them are used for testing an operation of the driver IC itself”); and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin (fig. 5A, item 51a is connected to item 51b); wherein the at least one first pin (fig. 6A, item 51a: at least one first pin) is electrically connected to a plurality of second pins (fig. 6A, item 51b and 51c: a plurality of second pins; ¶34).
Therefore it would have been obvious to a person of ordinary skill in the art before the effective filing date to modify the display module of Zou, wherein the at least one first pin is electrically connected to a plurality of second pins, as taught by Baek so as to implement using universal parts to distinguish types of display units made by different suppliers and apply proper settings without adding separate RAM or pins (¶5-6; ¶9).
With respect to Claim 17, Zou teaches a display device (claim 10; ¶33-34), comprising: a display module (fig. 4; ¶19), comprising: a display screen (fig. 1, display screen = display panel: items 11 and 10; ¶20) and a driver chip (fig. 4, item 20; ¶21); wherein the display screen comprises a display region (fig. 4, item 11; ¶20) and a non-display region (fig. 4, non-display region = area surrounding item 11 on item 10); the driver chip is disposed in the non-display region of the display screen (fig. 4) and configured to at least generate a drive signal that drives the display screen (¶21); the driver chip comprises at least one first pin (fig. 5, first pin is centrally located amongst all the pins) and at least one second pin (fig. 5, second pin is not the edge or central ones).
Zou does not explicitly mention the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin; and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin.
Baek teaches a display module (fig. 1; ¶24), comprising: a display screen (fig. 1, display screen = item 50; ¶30) and a driver chip (fig. 4A, item 51; ¶32); the driver chip is configured to at least generate a drive signal that drives the display screen (¶32; ¶40); the driver chip comprises at least one first pin (fig. 5A, item 51a) and at least one second pin (fig. 5A, item 51b), the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin (fig. 5A; ¶32, “The driver IC 51 includes several tens of pins used for its operation, and only a few of them are used for testing an operation of the driver IC itself”); and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin (fig. 5A, item 51a is connected to item 51b).
Therefore it would have been obvious to a person of ordinary skill in the art before the effective filing date to modify the display device of Zou, such that the drive signal generated by the driver chip is related to a signal transmitted by the at least one first pin, and the drive signal generated by the driver chip is unrelated to a signal transmitted by the at least one second pin; and at least one of the at least one first pin is electrically connected to at least one of the at least one second pin, as taught by Baek so as to implement using universal parts to distinguish types of display units made by different suppliers and apply proper settings without adding separate RAM or pins (¶5-6; ¶9).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Zou and Baek as applied to claim 2 above, and further in view of Chen et al. (Pub. No.: US 2022/0036848 A1) hereinafter referred to as Chen.
With respect to Claim 3, claim 2 is incorporated, Zou and Baek combined do not mention wherein the at least one second pin is a pin applied to another display screen.
Chen teaches a display module (fig. 7, item 200; ¶47), comprising: a display screen (fig. 7, item 201; ¶38) and a driver chip (fig. 7, item 241; ¶38); the driver chip comprises at least one first pin (fig. 7, item 242; ¶38) and at least one second pin (fig. 7, item 243; ¶38), wherein the at least one second pin is non-enabled pin reserved on the driver chip (fig. 7, item 243 is non-enabled when nothing is connected to it); wherein the at least one second pin is a pin applied to another display screen (¶38, “The source electrode chip on film 241 is shared, the source electrode chip on film 241 is provided with a. source electrode driving chip, which can also be shared, and then a first output binding pin 242 and a second output binding pin 243 from the same source electrode chip on film 241 are bound and connected to the two display panels respectively”).
Therefore it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the combined display module of Zou and Baek, wherein the at least one second pin is a pin applied to another display screen, as taught by Chen so as to share resources so that the space occupation can be saved and the space utilization rate can be improved (¶37).
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Zou and Baek as applied to claim 1 above, and further in view of Liu et al. (Pub. No.: CN113160729A) hereinafter referred to as Liu.
With respect to Claim 9, claim 1 is incorporated, Zou teaches wherein the non-display region comprises a bonding region (¶20, “a display panel including a display area 11 and a binding area (not shown). The binding area is positioned below the display area 11”).
Zou and Baek combined do not mention wherein third bonding terminals are disposed in the bonding region, the third bonding terminals are test pins of a display screen test circuit on the display screen, and the test pins are configured to receive test data signals when the display screen is tested; and at least one first pin is electrically connected to at least one of the third bonding terminals.
Liu teaches a display module (fig. 3; ¶45), comprising: a display screen (fig. 3, item 10; ¶46) and a driver chip (fig. 3, item 20; ¶46); wherein the display screen comprises a display region (fig. 3, item AA; ¶46) and a non-display region (fig. 3, item BA; ¶46); the driver chip is disposed in the non-display region of the display screen (fig. 3) and configured to at least generate a drive signal that drives the display screen (¶46); the driver chip comprises at least one first pin and at least one second pin (fig. 3, any of the pins 22 on item 20 can be the at least one first pin and the at least one second pin);
wherein third bonding terminals (fig. 3, items 32 and 33) are disposed in the bonding region (fig. 3, bonding region is where items 31-33 are located), the third bonding terminals are test pins of a display screen test circuit on the display screen (¶52), and the test pins are configured to receive test data signals when the display screen is tested (¶52); and at least one first pin is electrically connected to at least one of the third bonding terminals (fig. 3).
Therefore it would have been obvious to a person of ordinary skill in the art before the effective filing date to modify the combined display module of Zou and Baek, wherein third bonding terminals are disposed in the bonding region, the third bonding terminals are test pins of a display screen test circuit on the display screen, and the test pins are configured to receive test data signals when the display screen is tested; and at least one first pin is electrically connected to at least one of the third bonding terminals, as taught by Liu so as to easily detect abnormalities at bonding connections between the driver chip and the display panel (¶6).
With respect to Claim 10, claim 9 is incorporated, Zou and Baek combined do not mention wherein first pins are electrically connected to the third bonding terminals in a one-to-one correspondence.
Liu teaches a display module (fig. 3; ¶45), comprising: a display screen (fig. 3, item 10; ¶46) and a driver chip (fig. 3, item 20; ¶46); wherein the display screen comprises a display region (fig. 3, item AA; ¶46) and a non-display region (fig. 3, item BA; ¶46); the driver chip is disposed in the non-display region of the display screen (fig. 3) and configured to at least generate a drive signal that drives the display screen (¶46); the driver chip comprises at least one first pin and at least one second pin (fig. 3, any of the pins 22 on item 20 can be the at least one first pin and the at least one second pin);
wherein third bonding terminals (fig. 3, items 32 and 33) are disposed in the bonding region (fig. 3, bonding region is where items 31-33 are located), the third bonding terminals are test pins of a display screen test circuit on the display screen (¶52), and the test pins are configured to receive test data signals when the display screen is tested (¶52); and at least one first pin is electrically connected to at least one of the third bonding terminals (fig. 3); wherein first pins are electrically connected to the third bonding terminals in a one-to-one correspondence (fig. 3).
Therefore it would have been obvious to a person of ordinary skill in the art before the effective filing date to modify the combined display module of Zou and Baek, wherein first pins are electrically connected to the third bonding terminals in a one-to-one correspondence, as taught by Liu so as to easily detect abnormalities at bonding connections between the driver chip and the display panel (¶6).
Allowable Subject Matter
Claims 4-7 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: With respect to claim 4, none of the prior art teaches the display module further comprises a flexible circuit board comprising at least one third pin and at least one fourth pin, wherein the at least one third pin is electrically connected to the at least one first pin, and the at least one fourth pin is electrically connected to the at least one second pin; the flexible circuit board further comprises a connection line, wherein a third pin of the at least one third pin is electrically connected to a fourth pin of the at least one fourth pin through the connection line to cause a first pin electrically connected to the third pin to be electrically connected to a second pin electrically connected to the fourth pin including all the base limitations.
With respect to Claim 11, Hu et al. (Pub. No.: US 2021/0012691 A1) teaches in figure 2 the display screen comprises control switches (fig. 2, item 3: control switches) electrically connected to the test pins (fig. 2, item 10: test pins) in a one-to-one correspondence, however none of the prior art teaches wherein control terminals of the control switches are electrically connected to the driver chip, first terminals of the control switches are electrically connected to the corresponding test pins, second terminals of the control switches are connected to drive signal lines in the display screen, and the driver chip is configured to control the control switches to be off when the display panel works including all the base limitations.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hu et al. (Pub. No.: US 2021/0012691 A1) – see fig. 2 and paragraph 37.
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/DONNA V Bocar/ Examiner, Art Unit 2621