DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “301” has been used to designate a reference flash cell array 301, the diode-connected reference array 301, and the reference array system 301; reference character “303” has been used to designate a bit-line voltage control unit (reference array bit-line driver system) 303 and bit-line driver system 303. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities: it appears “diode connected flash cell” in [0032] was meant to be --diode connected reference flash cell--.
Appropriate correction is required.
Claim Objections
The claim(s) is/are objected to because of the following informalities:
Claim 1: it appears that “a flash cell array” in line(s) 3 was meant to be -- the flash cell array --; it appears that “and or” instances were meant to be -- and/or --.
Claims 9, 10: it appears that “due to PVT or ageing issue” in line(s) 3 was meant to be -- due to the PVT or the ageing issue --.
Claim 11: it appears that “comprises “N” number ” in line(s) 1 was meant to be -- comprises the “N” number --
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites limitations having inconsistencies: it appears that “reference system” (line 4) is inconsistent throughout the claim, i.e. “reference array system” (line 11); “cell characteristic change and or local variation issue” (line 3) is inconsistent throughout the claim, i.e. “flash cell characteristics and or local variation” (line 8), “characteristic changes and/or local variation” (lines 11-12). For purposes of examination, all variations will be construed as initially presented.
Further, it is unclear whether “a flash-cell current receiving, and bit-line voltage maintaining unit” (line 15) was meant to be separate or a common unit configured to receive both current and voltage.
Claim 4 recites the limitation “a CG_ref voltage” (line 5), which is unclear whether the limitation refers to the same “reference voltage (CG_ref)” (line 7) as presented in claim 1, or a compensated reference voltage.
Claim 4 recites the limitation “the programmed threshold voltage” (line 2). There is insufficient antecedent basis for this limitation in the claim.
Claim 5 recites the limitation “the characteristic change and or location variation issue” (lines 1-2). There is insufficient antecedent basis for this limitation in the claim.
Claim 6 recites the limitation “the threshold voltage” (lines 1-2). There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation “the diode-connected reference array” (line 1), “the CG_ref level” (line 2). There is insufficient antecedent basis for this limitation in the claim.
Claims 9-10 recites the limitation “produces the same amount of current as before” (line 2), in which “as before” renders the claim indefinite because it is not defined by the claim, the specification does not provide a standard for ascertaining the requisite “as before,” and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
Claim 12 recites the limitation “N*[lowest current of an operating range of the flash cell array]” (lines 1-2), in which the term “N*” renders the claim indefinite because it is not defined by the claim, the specification does not provide a standard for ascertaining the requisite “N*” and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Further, it is unclear whether “N*” refers to “N” number of claim 1.
Claim 13 recites the limitation “the reference array bit-line” (lines 1-2), “the diode-connected reference array system” (lines 2-3). There is insufficient antecedent basis for this limitation in the claim.
All dependent claims are similarly rejected based on respective dependencies.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bill et al. (US 5,754,475 “Bill”) in view of Kubo et al. (US 2009/0213667 “Kubo”).
Regarding claim 1, Bill discloses a system configured for managing changes in characteristics of a flash cell array, comprising:
a flash cell array (memory core array 12; fig. 1, further 112; fig. 3) subject to a cell characteristic change and or local variation issue (“variations presented by the memory cells,” such as process variations and temperature changes; column/line(s): 2/62-67, 3/26-27);
a reference system comprising:
a reference flash cell array (reference cell array 22; fig. 1, further 122a-c; fig. 3) comprising an "N" number of flash cells (“reference cell array includes a plurality of reference core cells”) configured to overcome the characteristic changes and or local variation issue (the reference cell array “closely tracks and makes adjustments for the variations presented by the memory cells” column/line(s): 2/62-67) by generating a reference voltage (CG ref) (“generating selectively one of a plurality of reference cell voltages defining reference cell thresholds” column/line(s): 3/65-67) that is applied to track and compensate (i.e. tracks and makes adjustments) for changes in flash cell characteristics and or local variation of the flash cell array (column/line(s): 2/62-67);
a reference current (Iref) (“set of reference currents in the reference cells” column/line(s): 3-5) that is injected into the reference flash cell array (122a-c) to enable the reference array system to track and compensate (i.e. tracks and makes adjustments) for characteristic changes and/or local variation of the flash cell array (i.e. during a read operation; column/line(s): 2/62-67, 3/1-5); and
a reference array bit-line driver system (36; fig. 1) that maintains (i.e. during precharge) a same bit-line voltage (blref) (i.e. BL voltage) for both the flash cell array and the reference flash cell array (the same BL voltage is shown maintained during precharge; fig. 4, further “a bit line pre-charge circuit 36 is used to precharge the selected array bit line via the Y-pass gate circuit 20 and the associated reference bit line via the reference Y-select circuit 24 to the same potential [i.e. to the same BL voltage]” column/line(s): 8/28-32); and
bit-line voltage maintaining unit (110a; fig. 3) coupled with the flash cell array (112) and configured to receive the same bit-line voltage (bl ref) of both the flash cell array and the reference flash cell array (the same BL voltage corresponding to “bit line paths [i.e. of the flash cell array and reference flash cell array] are designed to be identical with respect to their resistance and capacitance” is received at 110a; fig. 3, column/line(s): 8/49-50).
Bill does not expressly disclose a flash-cell current receiving.
Kubo discloses a flash-cell current receiving (40; fig. 20).
Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Bill is modifiable as taught by Kubo for the purpose of achieving precision and higher accuracy in data accessing schemes by selectively providing constant biasing to access circuits [0186 of Kubo], which is consistent with known practices in the prior art.
Regarding claim 2, Bill discloses the system of claim 1, wherein the reference system comprises a control gate (CG) reference system (fig. 3).
Regarding claim 3, Kubo discloses the system of claim 1, wherein memory array select gate (SG) of the reference system is connected to a logic high state when memory cells are enabled to be read; and is connected to a logic low state when the memory cells are disabled to be in an off state (fig. 11-13).
Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Bill is modifiable as taught by Kubo for the purpose of achieving precision and higher accuracy in data accessing schemes by selectively providing constant biasing to access circuits [0186 of Kubo], which is consistent with known practices in the prior art.
Regarding claim 4, Bill discloses the system of claim 1, wherein when due to changes in the cell characteristics and or local variations, as the programmed threshold voltage on each flash cell of the flash cell array shifts, the reference flash cell array also undergoes the same shift and is configured to generate a buffered CGref voltage which tracks the change and generates a CGref voltage to compensate for the changes (fig. 3).
Bill does not expressly disclose keep cell currents of the flash memory array constant.
Kubo discloses keep cell currents of the flash memory array constant (fig. 20).
Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Bill is modifiable as taught by Kubo for the purpose of achieving precision and higher accuracy in data accessing schemes by selectively providing constant biasing to access circuits [0186 of Kubo], which is consistent with known practices in the prior art.
Regarding claim 5, Bill discloses the system of claim 1, wherein the characteristic change and or location variation issue comprises a process, voltage and temperature (PVT) issue or an aging issue (column/line(s): 3/24-27).
Regarding claim 6, Bill discloses the system of claim 5, wherein due to the PVT issue or the aging issue the threshold voltage shifts up or down (column/line(s): 2/42-65, 3/1-5).
Bill does not expressly disclose the current from the flash cell array reduces or increases respectively.
Kubo discloses the current from the flash cell array reduces or increases respectively (fig. 12-17).
Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Bill is modifiable as taught by Kubo for the purpose of achieving precision and higher accuracy in data accessing schemes by selectively providing constant biasing to access circuits [0186 of Kubo], which is consistent with known practices in the prior art.
Regarding claim 7, Bill discloses the system of claim 6, wherein when the diode-connected reference array (claim 13) faces a higher threshold voltage, the CGref level also increases, and when the diode-connected reference array faces a lower threshold voltage, the CGref level also decreases (fig. 26, 27).
Regarding claim 8, Bill discloses the system of claim 7, wherein the CGref is applied to a CG terminal of each flash cell in the flash cell array [fig. 22].
Regarding claim 9, Bill discloses the system of claim 8, wherein a flash cell with a higher threshold voltage and higher control gate voltage to result in compensation for cell characteristics change due to PVT or ageing issue; and or compensates for local variations (fig. 3.
Bill does not expressly disclose produces the same amount of current as before.
Kubo discloses produces the same amount of current as before (fig. 20).
Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Bill is modifiable as taught by Kubo for the purpose of achieving precision and higher accuracy in data accessing schemes by selectively providing constant biasing to access circuits [0186 of Kubo], which is consistent with known practices in the prior art.
Regarding claim 10, Bill discloses the system of claim 8, wherein a flash cell with a lowered threshold voltage and lowered control gate voltage to result in compensation for cell characteristics change due to PVT or ageing issue; and or compensates for local variations (fig. 3).
Bill does not expressly disclose produces the same amount of current as before.
Kubo discloses produces the same amount of current as before (fig. 20).
Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Bill is modifiable as taught by Kubo for the purpose of achieving precision and higher accuracy in data accessing schemes by selectively providing constant biasing to access circuits [0186 of Kubo], which is consistent with known practices in the prior art.
Regarding claim 11, Bill discloses the system of claim 1, wherein the reference flash cell array comprises "N" number of flash cells connected in parallel (fig. 3).
Regarding claim 12, Kubo discloses the system of claim 1, wherein the I_ref comprises a value higher than N*[lowest current of an operating range of the flash cell array] [0070+].
Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Bill is modifiable as taught by Kubo for the purpose of achieving precision and higher accuracy in data accessing schemes by selectively providing constant biasing to access circuits [0186 of Kubo], which is consistent with known practices in the prior art.
Regarding claim 13, Bill discloses the system of claim 1, wherein circuit to maintain the bl_ref voltage at the reference array bit-line, and bit line current drive system is used inside the diode-connected reference array system (claim 13).
Regarding claim 14, Bill discloses the system of claim 1, wherein the cell characteristic change and or local variation comprises one or more variations with process, voltage, and temperature (PVT) of flash cells (fig. 3).
Regarding claim 15, Bill discloses the system of claim 1, wherein the characteristic change and or local variation issue comprises one or more mechanisms of threshold voltage drift and aging compensation of flash cells (fig. 3).
Conclusion
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/UYEN SMET/
Primary Examiner, Art Unit 2824
