DETAILED ACTION
This action is responsive to 02/20/2025.
Claims 1-30 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Objections
Claim 28 is objected to because of the following informalities: In line 1, change “the plurality of low-potential lines include” to “the plurality of low-potential lines includes”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 4, 6-7, and 18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US Pub. 2020/0211449), hereinafter Kim.
Regarding claim 1, Kim discloses a display device (see fig. 1) comprising: a display panel (display panel 100-see fig. 1 and [0046]) including a display area on which a plurality of sub-pixels are disposed (see figs. 1 and 3), and a low-potential voltage supply circuit supplying a first low-potential voltage and a second low-potential voltage to the plurality of sub-pixels (power voltage generator 600 may generate a low power voltage of each light emitting element of the display panel 100 (see fig. 1 and [0062] … the power voltage generator 600 generates a first low power voltage ELVSS1 and a second low power voltage ELVSS2-see fig. 3 and [0076]), wherein each of the plurality of sub-pixels includes a first light emitting part including a first light emitting device (first light emitting element OL1-see fig. 3 and [0074]) and a second light emitting part including a second light emitting device (second light emitting element OL2-see fig. 3 and [0074]), wherein the first light emitting device and the second light emitting device share a pixel circuit (see fig. 3), and the first light emitting device configured to receive the first low-potential voltage through a first low-potential voltage line (i.e., the power voltage generator 600 applies the first low power voltage ELVSS1 to a second electrode of the first light emitting element OL1-see fig. 3 and [0076]), and the second light emitting device configured to receive the second low-potential voltage through a second low-potential voltage line (i.e., the power voltage generator 600 applies the second low power voltage ELVSS2 to a second electrode of the second light emitting element OL2-see fig. 3 and [0076]).
Regarding claim 2, Kim discloses wherein the first low-potential voltage line and the second low-potential voltage line are alternately disposed (see figs. 2-3 with description in [0075]-OL1 (connected to ELVSS1) is a red or a blue subpixel in a column direction, and OL2 (connected to ELVSS2) is a green subpixel, and the arrangement alternates in a row direction).
Regarding claim 4, Kim discloses wherein each of the plurality of sub-pixels overlaps any one of the first low-potential voltage line and the second low-potential voltage line, and is non-overlapping with the other of the first low-potential voltage line and the second low-potential voltage line (see figs. 2-3 with description in [0073]-[0076]).
Regarding claim 6, Kim discloses wherein the first light emitting device includes a first cathode overlapping the first low-potential voltage line (see fig. 3-ELVSS1 is coupled to (and therefore overlaps) cathode of OL1), and the second light emitting device includes a second cathode overlapping the second low-potential voltage line (see fig. 3-ELVSS2 is coupled to (and therefore overlaps) cathode of OL2).
Regarding claim 7, Kim discloses wherein the first light emitting device includes a first cathode electrically connected with the first low-potential voltage line (cathode of OL1 is coupled to ELVSS1-see fig. 3), and the second light emitting device includes a second cathode electrically connected with the second low-potential voltage line (cathode of OL2 is coupled to ELVSS2-see fig. 3).
Regarding claim 18, Kim discloses wherein the first low-potential voltage and the second low-potential voltage is configured to have the same voltage value or different voltage values (see figs. 3 and 5 with description in [0082]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of OH et al. (US Pub. 2017/0125496), hereinafter OH.
Regarding claim 3, Kim does not appear to expressly disclose wherein each of the plurality of sub-pixels further includes an opening between the first light emitting part and the second light emitting part.
OH is relied upon to teach wherein each of the plurality of sub-pixels further includes an opening between the first light emitting part and the second light emitting part (see figs. 5-7, which illustrates an opening 140 between first and second light emitting diodes E1 and E2).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of OH with the invention of Kim such that each of the plurality of sub-pixels further include an opening between the first light emitting part and the second light emitting part, as taught by OH, in order to allow for connection of second electrode 225 to an auxiliary electrode 114 for compensating or reducing sheet resistance (see [0078]).
Regarding claim 19, OH is further relied upon to teach wherein the first light emitting part and second light emitting part are configured to emit light of the same color (see figs. 4-5 and, for example, claim 17).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of OH with the invention of Kim such that the first and the second light emitting parts emit a same color, as taught by OH, therefore, the light emitting parts can be driven according to a same driving signal by the driving unit 150 (see [0042]).
Claims 8, and 14-16, 23-25, and 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Shim et al. (US Pub. 2022/0149128), hereinafter Shim.
Regarding claim 8, Kim does not appear to expressly disclose wherein each of the plurality of sub-pixels further includes an opening between the first light emitting part and the second light emitting part, and the first cathode and the second cathode are spaced apart from each other with the opening interposed therebetween.
Shim is relied upon to teach wherein each of the plurality of sub-pixels further includes an opening between the first light emitting part and the second light emitting part (see, for example, figs. 4-8 and 13-14, which illustrate a first light emitting element EL_a and a second light emitting element EL_b disposed on an overcoat layer OC having an opening (e.g., through hole 400) therebetween), and the first cathode and the second cathode are spaced apart from each other with the opening interposed therebetween (see figs. 5-6).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Shim with the invention of Kim to include an opening between the first and the second light emitting parts, wherein cathodes of the first and the second light emitting parts are spaced apart, as taught by Shim, in order to provide a light emitting display device having a repair structure for a short defect between an anode electrode and a cathode electrode (see [0009]).
Regarding claim 14, Shim is further relied upon to teach wherein each of the plurality of sub-pixels includes a first sub-electrode and a second sub-electrode, wherein one side of the first sub-electrode is connected to the first light emitting device and another other side of the first sub-electrode is connected to the pixel circuit, and wherein one side of the second sub-electrode is connected to the second light emitting device and another side of the second sub-electrode is connected to the pixel circuit (see, for example, figs. 4 and 14 with description in [0070], wherein, a pixel electrode 210 may include a first electrode connection portion 310 connected between the first pixel electrode and a circuit contact portion, and a second electrode portion 320 connected between a second pixel electrode portion and the circuit contact portion).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Shim with the invention of Kim to include sub-electrodes for connecting anodes of the light emitting devices to respective pixel circuits, as taught by Shim, which constitutes combining prior art elements according to known methods to yield predictable results.
Regarding claim 15, Shim is further relied upon to teach wherein each of the plurality of sub-pixels includes a first sub-contact hole and a second sub-contact hole, wherein the first sub-electrode is connected to a first electrode of the first light emitting device through the first sub-contact hole, and the second sub-electrode is connected to the first electrode of the second light emitting device through the second sub-contact hole (see contact holes CNT for connecting portions (240a, 240b) to connect to anodes (pixel electrodes) 210 of each light emitting element (see figs. 5-6)).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Shim with the invention of Kim to include contact holes for connecting anodes of each light emitting device to the pixel circuit, as taught by Shim, which constitutes combining prior art elements according to known methods to yield predictable results.
Regarding claim 16, Shim is further relied upon to teach wherein each of the plurality of sub-pixels further includes a third sub-contact hole and a fourth sub-contact hole, and the pixel circuit includes a thin film transistor, wherein the first sub-electrode is connected to a source/drain electrode of the thin film transistor through the third sub-contact hole, and the second sub-electrode is connected to the source/drain electrode of the thin film transistor through the fourth sub-contact hole (see contact hole DR_CNT, wherein the first and second electrode connection patterns (240a, 240b) may contact a source/drain electrode DR_SD of a driving thin film transistor DR (see fig. 5, [0069], and [0073]), or may contact through first and second connecting portions (310b and 320b), as illustrated in fig. 10. Having two contact holes constitute mere duplication of parts, which has no patentable significance, unless a new and unexpected result is produced (see MPEP 2144.04 (VI)(B)).
Regarding claim 23, Kim discloses a display device (see fig. 1) comprising: a substrate (display apparatus of fig. 1 necessarily has a substrate) including a plurality of low-potential lines (ELVSS1, ELVSS2-see fig. 3) and a plurality of sub-pixels (see fig. 2), wherein each of the plurality of sub-pixels includes: a thin film transistor on the substrate (T1-see fig. 3), and a first light emitting device and a second light emitting device (OL1, OL2-see fig. 3), wherein a first electrode of the first light emitting device and a first electrode of the second light emitting device are connected to a same thin film transistor (anodes of OL1 and OL2 are connected to T1-see fig. 3), and a second electrode of the first light emitting device and a second electrode of the second light emitting device are spaced apart from each other (cathodes of OL1 and OL2 are necessarily spaced apart because they are each connected to a different low power voltage).
Kim does not appear to expressly disclose a planarization layer on the thin film transistor, the planarization layer having an opening, and a first light emitting device and a second light emitting device on the planarization layer.
Shim is relied upon to teach a planarization layer on the thin film transistor, the planarization layer having an opening, and a first light emitting device and a second light emitting device on the planarization layer (see, for example, figs. 4-8 and 13-14, which illustrate a first light emitting element EL_a and a second light emitting element EL_b disposed on an overcoat layer OC having an opening (e.g., through hole 400) therebetween).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Shim with the invention of Kim to include a planarization layer having an opening, and first and second light emitting devices formed on the planarization layer, as taught by Shim, which constitutes combining prior art elements to yield predictable results (i.e., forming display components on dielectric layers).
Regarding claim 24, Shim is further relied upon to teach wherein the planarization layer includes a first planarization layer and a second planarization layer that are spaced apart from each other by the opening, wherein the first light emitting device is on the first planarization layer, and the second light emitting device is on the second planarization layer (first and second light emitting elements (as represented by pixel electrodes 210a and 210b) are disposed on the overcoat layer OC-see figs. 5-6).
Regarding claim 25, Shim is further relied upon to teach wherein a side surface of the first planarization layer and a side surface of the second planarization layer adjacent to the opening have an undercut shape (undercut structures 430a and 430b-see [0077], [0080] and figs. 5-7).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Shim with the invention of Kim such that side surfaces of the planarization layer adjacent to the opening have an undercut shape, as taught by Shim, in order to allow common electrode structures to be formed spaced apart (see [0080]).
Regarding claim 28, Kim discloses wherein the plurality of low-potential lines includes a first low-potential line and a second low-potential line (ELVSS1 and ELVSS2-see fig. 3), wherein the second electrode of the first light emitting device is connected to the first low-potential line (see, for example, fig. 3-cathode of OL1 is connected to ELVSS1), and a second electrode of the second light emitting device is connected to the second low-potential line (i.e., cathode of OL2 is connected to ELVSS2-see fig. 3).
Claims 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Shin et al. (US Pub. 2021/0202680), hereinafter Shin.
Regarding claim 12, Kim does not appear to expressly disclose wherein the low-potential voltage supply circuit comprises: a plurality of flexible circuit boards on which a driving integrated circuit is mounted, respectively, a first shorting bar connected to the first low-potential voltage line, and a second shorting bar connected to the second low-potential voltage line.
Shin is relied upon to teach wherein the low-potential voltage supply circuit comprises: a plurality of flexible circuit boards on which a driving integrated circuit is mounted, respectively, a first shorting bar connected to the first low-potential voltage line, and a second shorting bar connected to the second low-potential voltage line (see fig. 2-first and second common power lines (shorting bars) VSS1 and VSS2 are disposed in a non-display area (NDA) and connected to power pads (e.g., VSSP). Lines connect the power pads to drive ICs (IC 210) and flexible circuit board 230-see figs. 1-2 and [0049]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of such that the low-potential voltage supply circuit comprises a plurality of flexible circuit boards on which driving circuits are mounted, and a shorting bar for the low-potential voltage line, as taught by Shin, in order to provide a display device that reduces resistance of power lines (see [0008]). Having shorting bars for a first and a second low-potential voltage line simply amounts to mere duplication of parts, which has not patentable significance unless a new and unexpected result is produced.
Regarding claim 13, Shin is further relied upon to teach wherein the first shorting bar includes a plurality of first connection parts connected to the plurality of flexible circuit boards and a second connection part connected to the first low-potential voltage line, and the second shorting bar includes a plurality of first connection parts connected to the plurality of flexible circuit boards and a second connection part connected to the second low- potential voltage line (see, for example, [0049]- Lines connect the power pads to drive ICs (IC 210) and flexible circuit board 230).
Claim 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Shim as in claim 16 above, and further in view of OH.
Regarding claim 17, Kim in view of Shim does not appear to expressly teach wherein each of the plurality of sub-pixels further includes an opening disposed between the first and second light emitting parts, and wherein the source/drain electrode overlaps the opening.
OH is further relied upon to teach wherein each of the plurality of sub-pixels further includes an opening disposed between the first and second light emitting parts (see figs. 5-7, which illustrates an opening 140 between first and second light emitting diodes E1 and E2), and wherein the source/drain electrode overlaps the opening (a driving unit 150 (see fig. 7) for driving the subpixels is formed in the driving region DA, which overlaps the opening 140).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of OH with the inventions of Kim and Shim such that each of the plurality of sub-pixels further include an opening between the first light emitting part and the second light emitting part, and wherein the source/drain electrode overlaps the opening, as taught by OH, in order to allow for connection of second electrode 225 to an auxiliary electrode 114 for compensating or reducing sheet resistance (see [0078]).
Claims 20-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of OH, and further in view of Shim.
Regarding claim 20, Kim in view of OH does not appear to expressly teach wherein each of the plurality of sub-pixels further includes a planarization layer on which the first light emitting device and the second light emitting device are disposed, the planarization layer being divided by the opening, and wherein the planarization layer has an undercut in a side surface thereof facing the opening.
Shim is further relied upon to teach wherein each of the plurality of sub-pixels further includes a planarization layer on which the first light emitting device and the second light emitting device are disposed, the planarization layer being divided by the opening (see Shim et al. 2022/0149128-see, for example, figs. 4-8 and 13-14, which illustrate a first light emitting element EL_a and a second light emitting element EL_b disposed on an overcoat layer OC having an opening (e.g., through hole 400) therebetween), and wherein the planarization layer has an undercut in a side surface thereof facing the opening (undercut structures 430a and 430b-see [0077], [0080] and figs. 5-7).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Shim with the inventions of Kim and OH to include a planarization layer on which each light emitting device is disposed, wherein the planarization layer has an undercut structure in a side surface thereof facing the opening, as taught by Shim, in order to allow common electrode structures to be formed spaced apart (see [0080]).
Regarding claim 21, Shim is further relied upon to teach wherein the planarization layer includes a lower layer and an upper layer protrudes from the lower layer toward the opening, and a side surface of the lower layer facing the opening has a reverse tapered shape, and aside surface of the upper layer facing the opening has a tapered shape (see, for examples, figs. 5 and 7-undercut structure 430 (430a, 430b) has an upper protruding portion and a tapered lower side surface 410).
Claim 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Hsu et al. (US Pub. 2020/0193902), hereinafter Hsu.
Regarding claim 22, Kim does not appear to expressly disclose further comprising repair detector configured to apply the first low-potential voltage and the second low-potential voltage, respectively, to cathodes of the first light emitting device and the second light emitting device, and measure a voltage transferred to a common node between anodes of the first light emitting device and the second light emitting device.
Hsu, in for example, fig. 6A with description in [0060]-[0071], teaches a controller 610 configured to apply electrical signal ECP3 to cathodes of LED61 and LED62, determine damaged states of LED61 and LED62 according to measured voltages on the anodes of the LED61 and LED62, and respectively provide control signals U61-U64 to transistors T61-T64 according to the damage states of the LED61 and LED62 (see [0061]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the damage detection circuit and method for determining damage states of LED61 and LED62, taught by Hsu, with the invention of Kim, so as to perform compensation operation on dark spots on pixels (see [0061]). Applying different voltages to the cathodes of the light emitting diodes is an obvious design choice and simply amounts to common sense or ordinary routine practice in view of the teachings of Hsu.
Claims 26-27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Shim, and further in view of Lee et al. (US Pub. 2024/0138198), hereinafter Lee.
Regarding claim 26, Kim in view of Shim does not appear to expressly teach wherein a first dummy layer and a second dummy layer are in the opening, the second dummy layer on the first dummy layer, wherein a light emitting layer of the first light emitting device, a light emitting layer of the second light emitting device, and the first dummy layer include a same material, and wherein the second electrode of the first light emitting device, the second electrode of the second light emitting device, and the second dummy layer include a same material.
Lee is relied upon to teach wherein a first dummy layer and a second dummy layer are in the opening, the second dummy layer on the first dummy layer, wherein a light emitting layer of the first light emitting device, a light emitting layer of the second light emitting device, and the first dummy layer include a same material, and wherein the second electrode of the first light emitting device, the second electrode of the second light emitting device, and the second dummy layer include a same material (see LEE et al. 2024/0138198-see, for example, fig. 3B, wherein first and second dummy patterns (D1 and D2) may be formed in a groove (GR) between light emitting elements (EMD_R, EMD_G, and EMD_B), wherein, material for D1 may include a first deposition layer L1 (same material or similar material as first organic layer-see [0111]), and material for D2 may include a second deposition layer L2, which may include same or similar material as for cathodes of the light emitting elements (see [0112])).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Lee with the inventions of Kim and Shim to include a dummy multi-layer in the opening, wherein the dummy multi-layer is formed using same materials as that of a light emitting layer and a cathode of the light emitting device, as taught by Lee, in order to provide a display panel include an organic light-emitting element formed without using a metal mask (see [0006]).
Regarding claim 27, Lee is further relied upon to teach wherein the first dummy layer and the second dummy layer are spaced apart from the first light emitting device, and are spaced apart from the second light emitting device (see fig. 3B, wherein, the dummy layers are in a groove between two light emitting elements).
Claims 29-30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Shim, and further in view of Choi et al. (US Pub. 2023/0207735), hereinafter Choi.
Regarding claim 29, Kim in view of Shim does not appear to expressly teach further comprising: a first passivation layer covering the first low-potential line; a connection electrode on the first passivation layer; and a second passivation layer on the connection electrode, wherein the connection electrode and the first low-potential line contact with each other through a contact hole in the first passivation layer.
Choi is relied upon to teach further comprising: a first passivation layer covering the first low-potential line (see, for example, figs. 3 and 4B, wherein, a buffer layer BUF (first passivation layer) covers common power line EVSS); a connection electrode on the first passivation layer (auxiliary power electrode 210-see figs. 3 and 4B); and a second passivation layer on the connection electrode (passivation (or second protective) layer PAS-see figs. 3 and 4B, and [0091]), wherein the connection electrode and the first low-potential line contact with each other through a contact hole in the first passivation layer (the auxiliary power electrode 210 may be electrically connected to the auxiliary power line EVSS through a contact hole CH-see fig. 4B and [0088]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the layering structure of Choi with the inventions of Kim and Shim, which includes first and second passivation layers which allow a connection pattern to contact a low-potential voltage line via a contact hole, as taught by Choi, in order to provide a light emitting display device capable of uniformly increasing a cathode area and preventing a bursting phenomenon from occurring in the cathode contact area (see [0010]).
Regarding claim 30, Choi is further relied upon to teach wherein the second passivation layer includes a first contact portion exposing a part of an upper surface of the connection electrode, and the connection electrode and the second electrode of the first light emitting device are in contact with each other through the first contact portion (see fig. 4B-common electrode COM contacts an upper surface of the auxiliary power electrode 210, which is exposed in a periphery of an undercut structure OC_P and PAS_P having an undercut region UC-see fig. 4B and [0096]-[0097]).
Allowable Subject Matter
Claims 5 and 9-11, are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: limitations recited in the aforementioned claims are not taught or suggested by the references of record.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lee et al. (US Patent 9,754,538)-entire document.
Ren et al. (US Pub. 2015/0332628)-fig. 6
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/SARDIS F AZONGHA/Primary Examiner, Art Unit 2627