CTNF 19/059,117 CTNF 86258 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1, 2 and 7 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Yamashita (United States Patent Application Publication 2013/0194471) . Regarding claim 1, Yamashita discloses a pixel array device, comprising: a silicon substrate (figure 7 shows a silicon substrate 321 as disclosed at paragraph 201); an array of pixel structures arranged in the substrate (figure 7 shows a portion of an array of pixels arranged in the substrate), the array being configured to generate signals based on photoelectrons accumulated by the pixels when exposed to light (paragraph 201 teaches that the array includes photoelectric conversion units, therefore the array generates signals based on photoelectrons), wherein the pixel structures are square-shaped pixel structures having photodiodes formed in the substrate (figure 4 shows different sized square-shaped pixel structures as shown in annotated figure 4 below), the square-shaped pixel structures including: a first set of pixel structures of a first type, wherein the first type of pixel structures include one photodiode formed in the substrate per square-shaped pixel structure (figure 4 shows that the ordinary pixels 200 include one photodiode per square-shaped structure); and a second set of pixel structures of a second type, wherein the second type of pixel structures include two photodiodes formed in the substrate per square-shaped pixel structure (figure 4 shows that the 2x2 set of AF pixels includes a total of 4 photodiodes per square-shaped structure, by having 4 photodiodes, the structure includes 2 photodiodes); a first signal output circuit coupled to the first set of pixel structures, wherein the first signal output circuit is configured to receive readout signals from the one photodiodes in the first set of pixel structures (figure 5 exhibits amplification transistor 214, selection transistor 215 and output line VSL1 which receives readout signals from the photodiode 211-1 from pixels 200A-1 and 200A-2; and a second signal output circuit coupled to the second set of pixel structures, wherein the second signal output circuit is configured to receive readout signals from the two photodiodes in the second set of pixel structures (figure 5 exhibits amplification transistor 314, selection transistor 315 and VSL2 which receives readout signals from two photodiodes in the second set of pixel structures). PNG media_image1.png 585 576 media_image1.png Greyscale Regarding claim 2, Yamashita discloses the pixel array device of claim 1, in addition, Yamashita discloses wherein the first type of pixel structures are square photodiode pixel structures (figure 4 shows that the ordinary pixels 200 include one photodiode per square-shaped structure). Regarding claim 7, Yamashita discloses the pixel array device of claim 1, in addition, Yamashita discloses wherein the array includes the first set of pixel structures and the second set of pixel structures arranged in a repeating regular pattern (figure 19 shows an array pattern in which pixels are repeated as disclosed at paragraph 257) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Yamashita in view of Meynants (United States Patent Application Publication 2014/0145068) . Regarding claim 3, Yamashita discloses the pixel array device of claim 1, however, Yamashita fails to disclose wherein the second type of pixel structures are split photodiode pixel structures. Yamashita teaches a type of focusing pixel in which half the pixel is shield (as shown in figure 4). Meynants teaches that a split photodiode pixel structure can be used in place of a half light shielded pixel (figure 4 shows a half shielded pixel which in figure 9 is replaced with a split photodiode pixel structure as disclosed at paragraph 76). Because both Yamashita and Meynants teach pixels which can be used for focusing, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to substitute the pixels with a split photodiode pixel structure taught by Meynants for the light shielded pixels taught by Yamashita to achieve the predictable result of determining a focus value which can be used to focus a lens. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention. Regarding claim 4, Yamashita discloses the pixel array device of claim 1, in addition, Yamashita discloses a first analog-to-digital converter (ADC) circuit coupled to the first signal output circuit (paragraph 174 teaches that the column read circuit includes an ADC). However, Yamashita fails to disclose a second ADC circuit coupled to the second signal output circuit. Yamashita discloses an image sensor with a single ADC per sensor (paragraph 174 teaches that the column read circuit includes an ADC). Meynants teaches that an image sensor can instead of an ADC per each column (paragraph 84). Because both Yamashita and Meynants teach ADC circuits for an image sensor, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to substitute the ADC per each column of an image sensor taught by Meynants for the single ADC taught by Yamashita to achieve the predictable result of converting analog pixel signals to digital pixel signals such that the combination teaches a second ADC circuit coupled to the second signal output circuit. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention. Regarding claim 5, Yamashita discloses the pixel array device of claim 4, in addition, Meynants discloses wherein the first ADC circuit and the second ADC circuit are configured to receive the readout signals from the first signal output circuit and the second signal output circuit, respectively, in parallel (paragraph 84 teaches that each ADC is connected to a column readout line, therefore each column readout line provides signals to each ADC in parallel) . 07-21-aia AIA Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Yamashita in view of Uchida (United States Patent Application Publication 2015/0156428) . Regarding claim 6, Yamashita discloses the pixel array device of claim 1, further comprising: a first row addressing circuit coupled to inputs of the one photodiodes in the first set of pixel structures (figure 1 exhibits a row selection circuit 120 as disclosed at paragraph 172). However, Yamashita fails to disclose a second row addressing circuit coupled to inputs of the two photodiodes in the second set of pixel structures. Uchida is a similar or analogous system to the claimed invention as evidenced Uchida teaches an imaging device with shielded and unshielded pixels wherein the motivation of being able to better control integration times for different types of pixels would have prompted a predictable variation of Yamashita by applying Uchida’s known principal of providing first and second row addressing circuits for different types of pixels (figure 2 exhibits vertical scanning circuit 201b for controlling pixels which are half light shielded as disclosed at paragraph 34; figures 3C and 3D show that the pixels controlled by vertical scanning circuit 201b are half light shielded; and scanning circuit 201a for controlling the unshielded pixels as disclosed at paragraph 34). When applying this known technique to Yamashita, it would have been obvious to a person having ordinary skill in the art to control the first pixel structures with one vertical scanning unit and control the second pixel structures with a second vertical scanning unit in order to better control integration times of the different types of pixels. In view of the motivations such as being able to better control integration times for different types of pixels one of ordinary skill in the art would have implemented the claimed variation of the prior art system of Yamashita. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention . 07-21-aia AIA Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Yamashita in view of Li et al. (United States Patent Application Publication 2023/0090827), hereinafter referenced as Li . Regarding claim 8, Yamashita disclose the pixel array device of claim 1, however, Yamashita fails to disclose wherein the array is a color filter array, and wherein the first type of pixel structures are configured to accumulate photoelectrons when exposed to green light, and wherein the second type of pixel structures are configured to accumulate photoelectrons when exposed to blue light or red light. Li is a similar or analogous system to the claimed invention as evidenced Li teaches an imaging device wherein the motivation of improving image resolution and SNR while still obtaining phase difference information would have prompted a predictable variation of Yamashita by applying Li’s known principal of wherein the array is a color filter array, and wherein the first type of pixel structures are configured to accumulate photoelectrons when exposed to green light, and wherein the second type of pixel structures are configured to accumulate photoelectrons when exposed to blue light or red light (figures 8A and 8B show that green pixels have a single photodiode per microlens while the red and blue pixels work together with respective red or blue pixel to obtain phase data as disclosed at paragraph 88). In view of the motivations such as improving image resolution and SNR while still obtaining phase difference information one of ordinary skill in the art would have implemented the claimed variation of the prior art system of Yamashita. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention . 07-21-aia AIA Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Yamashita in view of Yang et al. (United States Patent Application Publication 2021/0126033), hereinafter referenced as Yang . Regarding claim 9, Yamashita disclose the pixel array device of claim 1, however, Yamashita fails to disclose micro-lens structures positioned over the pixel structures with one micro-lens structure per pixel structure. Yang is a similar or analogous system to the claimed invention as evidenced Yang teaches an imaging device wherein the motivation of focusing light on a pixel for more accurate phase difference detection would have prompted a predictable variation of Yamashita by applying Yang’s known principal of providing micro-lens structures positioned over the pixel structures with one micro-lens structure per pixel structure (figure 1A exhibits a structure with a single microlens 107 per photodiode and other photodiodes that share a microlens 109 as disclosed at paragraphs 19 and 21). In view of the motivations such as focusing light on a pixel for more accurate phase difference detection one of ordinary skill in the art would have implemented the claimed variation of the prior art system of Yamashita. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention . 07-21-aia AIA Claim s 12-15 are rejected under 35 U.S.C. 103 as being unpatentable over Yamashita in view of Meynants and further in view of Uchida . Regarding claim 12, Yamashita discloses an image sensor device, comprising: a silicon substrate (figure 7 shows a silicon substrate 321 as disclosed at paragraph 201); a plurality of square-shaped pixel structures formed in the substrate (figure 4 shows different sized square-shaped pixel structures as shown in annotated figure 4 below; (figure 7 shows a portion of an array of pixels arranged in the substrate)), the pixel structures being configured to generate signals based on photoelectrons accumulated by the pixel structures when exposed to light (paragraph 201 teaches that the array includes photoelectric conversion units, therefore the array generates signals based on photoelectrons), wherein the pixel structures include: a set of square photodiode pixel structures having one photodiode formed in the substrate per square-shaped pixel structure (figure 4 shows that the ordinary pixels 200 include one photodiode per square-shaped structure); and a set of photodiode pixel structures (figure 4 shows AF pixels); a first row addressing circuit coupled to the set of square photodiode pixel structures, wherein the first row addressing circuit is configured to provide a first control signal to the one photodiode in the set of square photodiode pixel structures (figure 1 exhibits a row selection circuit 120 as disclosed at paragraph 172); and an image signal processing circuit coupled to signal outputs of the set of square photodiode pixel structures and signal outputs of the set of split photodiode pixel structures (figure 27 shows image processor 440 as disclosed at paragraph 307), wherein the image signal processing circuit is configured to generate digital images based on output signals from the pixel structures (paragraph 307 discloses generating images based on the output signals). However, Yamashita fails to disclose the set of photodiode pixel structures are split photodiode pixel structures having two photodiodes formed in the substrate per square-shaped pixel structure; and a second row addressing circuit coupled to the set of split photodiode pixel structures, wherein the second row addressing circuit is configured to provide a second control signal to the two photodiodes in the set of split photodiode pixel structures, and wherein the image signal processing circuit is configured to generate digital images based on a combination of output signals from the set of square photodiode pixel structures and output signals from the set of split photodiode pixel structures. Yamashita teaches a type of focusing pixel in which half the pixel is shield (as shown in figure 4). Meynants teaches that a split photodiode pixel structure can be used in place of a half light shielded pixel (figure 4 shows a half shielded pixel which in figure 9 is replaced with a split photodiode pixel structure as disclosed at paragraph 76) and wherein the image signal processing circuit is configured to generate digital images based on a combination of output signals from the set of square photodiode pixel structures and output signals from the set of split photodiode pixel structures (paragraph 91 teaches combining split pixel data to generate pixel data for images). Because both Yamashita and Meynants teach pixels which can be used for focusing, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to substitute the pixels with a split photodiode pixel structure taught by Meynants for the light shielded pixels taught by Yamashita to achieve the predictable result of determining a focus value which can be used to focus a lens. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention. Yamashita in view of Meynants fails to disclose a second row addressing circuit coupled to the set of split photodiode pixel structures, wherein the second row addressing circuit is configured to provide a second control signal to the two photodiodes in the set of split photodiode pixel structures. Uchida is a similar or analogous system to the claimed invention as evidenced Uchida teaches an imaging device with shielded and unshielded pixels wherein the motivation of being able to better control integration times for different types of pixels would have prompted a predictable variation of Yamashita by applying Uchida’s known principal of providing first and second row addressing circuits for different types of pixels (figure 2 exhibits vertical scanning circuit 201b for controlling pixels which are half light shielded as disclosed at paragraph 34; figures 3C and 3D show that the pixels controlled by vertical scanning circuit 201b are half light shielded; and scanning circuit 201a for controlling the unshielded pixels as disclosed at paragraph 34). When applying this known technique to Yamashita, it would have been obvious to a person having ordinary skill in the art to control the first pixel structures with one vertical scanning unit and control the second pixel structures with a second vertical scanning unit in order to better control integration times of the different types of pixels. In view of the motivations such as being able to better control integration times for different types of pixels one of ordinary skill in the art would have implemented the claimed variation of the prior art system of Yamashita. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention. Regarding claim 13, Yamashita in view of Meynants and further in view of Uchida discloses the image sensor device of claim 12, in addition, Yamashita discloses a first analog-to-digital converter (ADC) circuit coupled to the signal outputs of the set of square photodiode pixel structures, the first ADC circuit being configured to generate a first digital signal output corresponding to analog signal outputs from the set of square photodiode pixel structures (paragraph 174 teaches that the column read circuit includes an ADC for generating digital signals from the pixel structures). However, Yamashita fails to disclose a second ADC circuit coupled to the signal outputs of the set of split photodiode pixel structures, the second ADC circuit being configured to generate a second digital signal output corresponding to analog signal outputs from the set of split photodiode pixel structures. Yamashita discloses an image sensor with a single ADC per sensor (paragraph 174 teaches that the column read circuit includes an ADC). Meynants teaches that an image sensor can instead of an ADC per each column (paragraph 84). Because both Yamashita and Meynants teach ADC circuits for an image sensor, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to substitute the ADC per each column of an image sensor taught by Meynants for the single ADC taught by Yamashita to achieve the predictable result of converting analog pixel signals to digital pixel signals such that the combination teaches a second ADC circuit coupled to the signal outputs of the set of split photodiode pixel structures, the second ADC circuit being configured to generate a second digital signal output corresponding to analog signal outputs from the set of split photodiode pixel structures. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention. Regarding claim 14, Yamashita in view of Meynants and further in view of Uchida discloses the image sensor device of claim 13, in addition, Meynants discloses wherein the image signal processing circuit is configured to generate digital images based on a combination of the first digital signal output and the second digital signal output paragraph 91 teaches combining split pixel data to generate pixel data for images along with the normal pixel data). Regarding claim 15, Yamashita in view of Meynants and further in view of Uchida discloses the image sensor device of claim 12, in addition, Yamashita discloses wherein the set of square photodiode pixel structures and the set of split photodiode pixel structures are arranged in an alternating regular pattern of pixel structures in the substrate (figure 24 exhibits an array with square pixels and focus detection pixels arranged in an alternating manner as disclosed at paragraph 281) . 07-21-aia AIA Claim s 1, 3 and 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Jeong et al. (United States Patent Application Publication 2022/0190023), hereinafter referenced as Jeong in view of Yamashita . Regarding claim 1, Jeong discloses a pixel array device, comprising: a substrate (figure 4 exhibits a substrate in which pixels are formed as disclosed at paragraph 57); an array of pixel structures arranged in the substrate (figure 4 shows pixel structures arranged in the substrate), the array being configured to generate signals based on photoelectrons accumulated by the pixels when exposed to light (the pixels include photodiodes and therefore generate signals based on photoelectrons), wherein the pixel structures are square-shaped pixel structures having photodiodes formed in the substrate (figures 3 and 4 show that the pixels are square shaped and have photodiodes formed in the substrate), the square-shaped pixel structures including: a first set of pixel structures of a first type, wherein the first type of pixel structures include one photodiode formed in the substrate per square-shaped pixel structure (figure 14 exhibits a first pixel type in PX1 and PX2 which includes a light shield film on two photodiodes, by having two photodiodes, the first type include one photodiode); and a second set of pixel structures of a second type, wherein the second type of pixel structures include two photodiodes formed in the substrate per square-shaped pixel structure (figure 10 exhibits pixels PX3 and PX4 which have two photodiodes per square shaped pixel); a first signal output circuit coupled to the first set of pixel structures, wherein the first signal output circuit is configured to receive readout signals from the one photodiodes in the first set of pixel structures (figure 2 exhibits a signal output circuit comprising two sets of TX1, TX2, RX, DX and SX which are connected to the same vertical signal line which receive the photodiode signal for each metal shielded pixel and output the readout photodiode signals); and a second signal output circuit coupled to the second set of pixel structures, wherein the second signal output circuit is configured to receive readout signals from the two photodiodes in the second set of pixel structures (figure 2 exhibits a signal output circuit comprising two sets of TX1, TX2, RX, DX and SX which are connected to the same vertical signal line which receive the photodiode signal for each pixel in the second column and output the readout photodiode signals). However, Jeong fails to disclose wherein the substrate is silicon. Jeong teaches a substrate (figure 2 elements 110 as disclosed at paragraph 57). Yamashita discloses a silicon substrate (figure 7 shows a silicon substrate 321 as disclosed at paragraph 201). Because both Jeong and Yamashita teach substrates for forming pixels, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to substitute the silicon substrate taught by Yamashita for the substrate taught by Jeong to achieve the predictable result of providing a substrate which can be used to form an image sensor. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention. Regarding claim 3, Jeong in view of Yamashita discloses the pixel array device of claim 1, in addition, Jeong discloses wherein the second type of pixel structures are split photodiode pixel structures (figure 14 shows that PX3 and PX4 have two photodiodes per pixel). Regarding claim 9, Jeong in view of Yamashita discloses the pixel array device of claim 1, in addition, Jeong discloses micro-lens structures positioned over the pixel structures with one micro-lens structure per pixel structure (figure 14 shows microlenses ML1 and a corresponding microlens over the metal-shielded pixels as disclosed at paragraph 87). Regarding claim 10, Jeong in view of Yamashita discloses the pixel array device of claim 1, in addition, Jeong discloses optical shields positioned in at least some of the first set of pixel structures, wherein an optical shield is positioned in half of a corresponding pixel structure (figure 14 exhibits metal shields MS placed over the top and bottom halves of two pixels, respectively as disclosed at paragraph 90). Regarding claim 11, Jeong in view of Yamashita discloses the pixel array device of claim 10, however, Jeong fails to disclose wherein some of the optical shields are positioned in left halves of the corresponding pixel structures and some of the optical shields are positioned in right halves of the corresponding pixel structures. At the time of filing, there was a recognized problem or need in the art to obtain both vertical and horizontal phase difference signals for autofocusing (as evidence by Jeong). There were a finite number of identified and predictable potential solutions to the recognized need or problem which were: Arrange photodiode pairs on the left and right halves and metal shields on the top and bottom halves (as shown in figure 14 of Jeong); or Arrange photodiode pairs on the top and bottom halves and metal shields on the left and right halves (this would correspond to rotating the arrange taught by Jeong by 90 degrees within each pixel). One of ordinary skill in the art could have pursued the known potential solutions with a reasonable expectation of success since all the solutions obtain both vertical and horizontal phase difference signals for autofocusing. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention . 07-21-aia AIA Claim s 16-19 are rejected under 35 U.S.C. 103 as being unpatentable over Jeong in view of Hwang et al. (United States Patent Application Publication 2018/0352199), hereinafter referenced as Hwang . Regarding claim 16, Jeong discloses a system, comprising: a camera (figure 34 exhibits camera module 1100a as disclosed at paragraph 133), comprising: one or more lenses (figure 34 shows a lens, not labeled); and an image sensor configured to receive light that has passed through the lenses to reach the image sensor (figure 1 exhibits an image sensor as disclosed at paragraph 27), comprising: a plurality of square-shaped pixel structures formed in a substrate (figure 4 shows pixel structures arranged in the substrate; figure 21 shows that the pixel structures are square), the pixel structures being configured to generate signals based on photoelectrons accumulated by the pixel structures when exposed to light (the pixels include photodiodes and therefore generate signals based on photoelectrons), wherein the pixel structures include: a set of square photodiode pixel structures having one photodiode formed in the substrate per pixel structure (figure 21 exhibits a first pixel type in PX1 and PX2 which includes a light shield film on two photodiodes, by having two photodiodes, the first type include one photodiode); and a set of split photodiode pixel structures having two photodiodes formed in the substrate per square-shaped pixel structure (figure 14 exhibits pixels under red and blue color filters which have two photodiodes per square shaped pixel); and a first signal output circuit coupled to the set of square photodiode pixel structures, wherein the first signal output circuit is configured to receive readout signals from the one photodiodes in the set of square photodiode pixel structures (figure 2 exhibits a signal output circuit comprising two sets of TX1, TX2, RX, DX and SX which are connected to the same vertical signal line which receive the photodiode signal for each metal shielded pixel and output the readout photodiode signals); a second signal output circuit coupled to the set of split photodiode pixel structures, wherein the second signal output circuit is configured to receive readout signals from the two photodiodes in the set of split photodiode pixel structures (figure 2 exhibits a signal output circuit comprising two sets of TX1, TX2, RX, DX and SX which are connected to the same vertical signal line which receive the photodiode signal for each pixel in the second column and output the readout photodiode signals); and an image signal processor configured to process the readout signals from the first signal output circuit and the second signal output circuit to generate one or more images (figure 34 exhibits image processing device 1210 as disclosed at paragraph 152). However, Jeong fails to disclose wherein the photodiode pixel structures are square photodiode pixel structures having one photodiode formed in the substrate per pixel structure. Jeong teaches using a pixel structure with two vertically arranged photodiodes beneath a metal shield to generate vertical phase difference data (paragraph 50). Hwang teaches that a square photodiode can be half covered with a light shield to obtain phase data (figures 4B and 5 exhibit a single square photodiode being half covered with a light shield 111_3 and 111_4 as disclosed at paragraph 66). Because both Jeong and Hwang teach pixels which can obtain vertical phase difference data, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to substitute the single square photodiode taught by Hwang for the split photodiode taught by Jeong to achieve the predictable result of obtaining vertical phase difference data. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention. Regarding claim 17, Jeong in view of Hwang discloses the system of claim 16, in addition, Jeong discloses wherein the set of split photodiode pixel structures are configured to generate readout signals when exposed to blue light or red light (figure 22 shows that the set of split photodiode pixel structures generate signals when exposed to blue or red light). However, this embodiment of Jeong fails to disclose wherein the set of square photodiode pixel structures are configured to generate readout signals when exposed to green light. Figure 22 of Jeong shows that the set of square photodiode pixel structures are configured to generate readout signals when exposed to white light. Paragraph 81 teaches that in place of a white color filter another color, such as green may be used for light shielded pixels. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to substitute a green color filter as disclosed at paragraph 81 of Jeong for the white filters exhibited in figure 22 of Jeong to achieve the predictable result of obtaining vertical phase difference data. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention. Regarding claim 18, Jeong in view of Hwang discloses the system of claim 16, in addition, Jeong discloses wherein the first signal output circuit is configured to output a first signal to the image signal processor and the second signal output circuit is configured to output a second signal to the image signal processor, the image signal processor being configured to generate the one or more images by processing both the first signal and the second signal (paragraph 157 teaches that the signals from the pixels are provided to the image generator portion 1214 of the image processor 1210 to generate images). Regarding claim 19, Jeong in view of Hwang discloses the system of claim 18, in addition, Jeong discloses wherein the first signal output circuit is configured to output the first signal synchronously with the second signal output by the second signal output circuit (figure 14 shows that at least one pixel of the first type is in a row with a pixel of the second type, paragraph 36 teaches that pixels in the same row are controlled by the row driver to simultaneously output signals) . 07-21-aia AIA Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Jeong in view of Hwang and further in view of Uchida . Regarding claim 20, Jeong in view of Hwang discloses the system of claim 16, in addition, Jeong discloses a first row addressing circuit coupled to inputs of the one photodiodes in the set of square photodiode pixel structures (figure 1 exhibits row driver 21). However, Jeong fails to disclose a second row addressing circuit coupled to inputs of the two photodiodes in the set of split photodiode pixel structures. Uchida is a similar or analogous system to the claimed invention as evidenced Uchida teaches an imaging device with shielded and unshielded pixels wherein the motivation of being able to better control integration times for different types of pixels would have prompted a predictable variation of Jeong by applying Uchida’s known principal of providing first and second row addressing circuits for different types of pixels (figure 2 exhibits vertical scanning circuit 201b for controlling pixels which are half light shielded as disclosed at paragraph 34; figures 3C and 3D show that the pixels controlled by vertical scanning circuit 201b are half light shielded; and scanning circuit 201a for controlling the unshielded pixels as disclosed at paragraph 34). When applying this known technique to Jeong, it would have been obvious to a person having ordinary skill in the art to control the first pixel structures with one vertical scanning unit and control the second pixel structures with a second vertical scanning unit in order to better control integration times of the different types of pixels. In view of the motivations such as being able to better control integration times for different types of pixels one of ordinary skill in the art would have implemented the claimed variation of the prior art system of Jeong. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention. Citation of Pertinent Art 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yang et al. (United States Patent Application Publication 2023/0395626) teaches an image sensor. Powell (United States Patent 11,523,071) teaches an image sensor with different types of pixels. Hoshino (United States Patent 11,258,993) teaches an image sensor with shared pixels. Fujii (United States Patent Application Publication 2020/0169704) teaches an image sensor with different types of pixels. Goden et al. (United States Patent Application Publication 2019/0238780) teaches an image sensor with different types of pixels. Tanaka et al. (United States Patent Application Publication 2019/0019835) teaches an image sensor with shared pixel structures. Shikina (United States Patent Application Publication 2018/0220096) teaches a row driver structure for an image sensor . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON A FLOHRE whose telephone number is (571)270-7238. The examiner can normally be reached Mon-Fri 8:00-3:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sinh Tran can be reached at 571-272-7564. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. JASON A. FLOHRE Patent Examiner Art Unit 2637 /JASON A FLOHRE/ Patent Examiner, Art Unit 2637 Application/Control Number: 19/059,117 Page 2 Art Unit: 2637 Application/Control Number: 19/059,117 Page 3 Art Unit: 2637 Application/Control Number: 19/059,117 Page 4 Art Unit: 2637 Application/Control Number: 19/059,117 Page 5 Art Unit: 2637 Application/Control Number: 19/059,117 Page 6 Art Unit: 2637 Application/Control Number: 19/059,117 Page 7 Art Unit: 2637 Application/Control Number: 19/059,117 Page 8 Art Unit: 2637 Application/Control Number: 19/059,117 Page 9 Art Unit: 2637 Application/Control Number: 19/059,117 Page 10 Art Unit: 2637 Application/Control Number: 19/059,117 Page 11 Art Unit: 2637 Application/Control Number: 19/059,117 Page 12 Art Unit: 2637 Application/Control Number: 19/059,117 Page 13 Art Unit: 2637 Application/Control Number: 19/059,117 Page 14 Art Unit: 2637 Application/Control Number: 19/059,117 Page 15 Art Unit: 2637 Application/Control Number: 19/059,117 Page 16 Art Unit: 2637 Application/Control Number: 19/059,117 Page 17 Art Unit: 2637 Application/Control Number: 19/059,117 Page 18 Art Unit: 2637 Application/Control Number: 19/059,117 Page 19 Art Unit: 2637 Application/Control Number: 19/059,117 Page 20 Art Unit: 2637
Prosecution Insights