DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
2. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
3. The information disclosure statement (IDS) submitted on 02/20/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
4. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
5. Claims 1-20 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claims 1, 3-8, 10-13 and 15-20 of Patent No. 11,842,462. Although the conflicting claims are not identical, they are not patentably distinct from each other because they are essentially the same except that claims 1-20 of the instant application recites “tile-based”, “tile”, “a rendering space divided into regions, each region comprising a group of tiles” and “a common anti-aliasing setting”. However, Patent No. 11,842,462 teaches these limitations, as discussed below. Thus, claims 1-20 of the instant application is obvious in view of claims 1-1, 3-8, 10-13 and 15-20 of Patent No. 11,842,462.
6. Regarding claim 1, the application claim discloses A tile-based graphics processing system, the tile-based graphics processing system being configured to use a rendering space divided into regions, each region comprising a group of tiles, wherein the graphics processing system comprises: determination logic configured to determine a common anti-aliasing setting for a subset of the tiles in a region based on an assessment regarding the presence of primitive edges in each tile of the region. Claim 1 of Patent No. 11,842,462 discloses A graphics processing system configured to render a scene using a rendering space that is sub-divided into sections, wherein the graphics processing system comprises: assessment logic configured to make an assessment regarding the presence of primitive edges in a section; and determination logic configured to determine an anti-aliasing setting for the section based on the assessment. Claim 4 discloses The graphics processing system according to claim 1, wherein the rendering space is divided into regions, each region comprising a group of sections, and wherein the determination logic is configured to determine a common anti-aliasing setting for a subset of the sections within the region. Regarding claim 1, the only difference is that claim 1 of the instant application recites “tile-based”, “tile” “a rendering space divided into regions, each region comprising a group of tiles” “a common anti-aliasing setting” and does not recite “render a scene … that is sub-divided into sections,” “assessment logic configured to make an assessment” “section”; while claims 1 and 4 of Patent No. 11,842,462 recites. Some graphics processing systems (which may be referred to as “tile-based” graphics processing systems) use a rendering space which is subdivided into a plurality of tiles. The “tiles” are sections of the rendering space. (Patent No. 11,842,462: col. 1, lines 22-25) Regarding claim 10, the analysis is similar to that of claim 1, the rationale of claim 1 rejection is applied in rejecting claim 10. Therefore, the claims in the present application disclosing similar limitations with the claims in the Patent No. 11,842,462 recite.
7. The following table shows the claims of the current application being examined and the conflicting claims of Patent No. 11,842,462.
Current Application No.
19/059,137
Patent No.
11,842,462
1
1+4
2+3
3
4
6
5+6
5
7-9
6-8
10+11
13+16
12
15
13
18
14-16
17-19
17
10
18
20
19
11
20
12
The following table shows an example of the corresponding conflicting claims of the current application and Patent No. 11,842,462.
Current Application No.
19/059,137
Claim 1
Patent No.
11,842,462
Claims 1+4
A tile-based graphics processing system, the tile-based graphics processing system being configured to use a rendering space divided into regions, each region comprising a group of tiles, wherein the graphics processing system comprises:
A graphics processing system configured to render a scene using a rendering space that is sub-divided into sections, wherein the graphics processing system comprises: (claim 1)
wherein the rendering space is divided into regions, each region comprising a group of sections, (claim 4)
determination logic configured to determine a common anti-aliasing setting for a subset of the tiles in a region based on an assessment regarding the presence of primitive edges in each tile of the region.
assessment logic configured to make an assessment regarding the presence of primitive edges in a section; and determination logic configured to determine an anti-aliasing setting for the section based on the assessment. (claim 1)
and wherein the determination logic is configured to determine a common anti-aliasing setting for a subset of the sections within the region. (claim 4)
8. Claims 1-20 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claims 1, 3-8, 10-13 and 15-20 of Patent No. 12,260,528. Although the conflicting claims are not identical, they are not patentably distinct from each other because they are essentially the same except that claims 1-20 of the instant application recites “use a rendering space divided into regions, each region comprising a group of tiles” and “a common anti-aliasing setting for a subset of the tiles in a region”. However, Patent No. 12,260,528 teaches these limitations, as discussed below. Thus, claims 1-20 of the instant application is obvious in view of claims 1-1, 3-8, 10-13 and 15-20 of Patent No. 12,260,528.
9. Regarding claim 1, the application claim discloses A tile-based graphics processing system, the tile-based graphics processing system being configured to use a rendering space divided into regions, each region comprising a group of tiles, wherein the graphics processing system comprises: determination logic configured to determine a common anti-aliasing setting for a subset of the tiles in a region based on an assessment regarding the presence of primitive edges in each tile of the region. Claim 1 of Patent No. 12,260,528 discloses A tile-based graphics processing system, wherein the graphics processing system comprises: determination logic configured to determine, for each tile, an anti-aliasing setting for the tile based on an assessment regarding the presence of primitive edges in the tile. Claim 5 discloses The tile-based graphics processing system according to claim 1, wherein the tile-based graphics processing system is configured to use a rendering space divided into regions, each region comprising a group of tiles, and wherein the determination logic is configured to determine a common anti-aliasing setting for a subset of the tiles within a region. Regarding claim 1, the only difference is that claim 1 of the instant application recites “use a rendering space divided into regions, each region comprising a group of tiles” and “a common anti-aliasing setting for a subset of the tiles in a region” and does not recite “for each tile, an anti-aliasing setting for the tile”; while claims 1 and 5 of Patent No. 12,260,528 recites. Regarding claim 10, the analysis is similar to that of claim 1, the rationale of claim 1 rejection is applied in rejecting claim 10. Therefore, the claims in the present application disclosing similar limitations with the claims in the Patent No. 12,260,528 recite.
10. The following table shows the claims of the current application being examined and the conflicting claims of Patent No. 12,260,528.
Current Application No.
19/059,137
Patent No.
12,260,528
1
1+5
2+3
3
4
7
5+6
6
7
7
8
8
9
4
10
13+16
11+12
15
13
17
14
19
15
17
16
18
17
10
18
20
19
11
20
12
The following table shows an example of the corresponding conflicting claims of the current application and Patent No. 11,842,462.
Current Application No.
19/059,137
Claim 1
Patent No.
12,260,528
Claims 1+5
A tile-based graphics processing system, the tile-based graphics processing system being configured to use a rendering space divided into regions, each region comprising a group of tiles, wherein the graphics processing system comprises:
A tile-based graphics processing system, wherein the graphics processing system comprises: (claim 1)
wherein the tile-based graphics processing system is configured to use a rendering space divided into regions, each region comprising a group of tiles, (claim 5)
determination logic configured to determine a common anti-aliasing setting for a subset of the tiles in a region based on an assessment regarding the presence of primitive edges in each tile of the region.
determination logic configured to determine, for each tile, an anti-aliasing setting for the tile based on an assessment regarding the presence of primitive edges in the tile. (claim 1)
and wherein the determination logic is configured to determine a common anti-aliasing setting for a subset of the tiles within a region. (claim 5)
Conclusion
11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michelle Chin whose telephone number is (571)270-3697. The examiner can normally be reached on Monday-Friday 8:00 AM-4:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http:/Awww.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Kent Chang can be reached on (571)272-7667. The fax phone number for the organization where this application or proceeding is assigned is (571)273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https:/Awww.uspto.gov/patents/apply/patent- center for more information about Patent Center and https:/Awww.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHELLE CHIN/
Primary Examiner, Art Unit 2614
Prosecution Insights