DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 5, 7-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shimada (US Publication 2022/0172900).
In re claim 1, Shimada discloses a multilayer ceramic electronic component, comprising:
a multilayer body (2 – Figure 1, ¶58) including multiple laminated ceramic layers (4 – Figure 1, Figure 2, ¶66), a first main surface (2T – Figure 1, Figure 2, ¶59) and a second main surface (2W – Figure 1, Figure 2, ¶66) opposed to each other in a height direction (DS direction – Figure 1, Figure 2), a first end surface and a second end surface (2P, 2Q – Figure 2A, ¶59) opposed to each other in a length direction (DL direction – Figure 1, Figure 2) orthogonal to the height direction (Figure 1, Figure 2), and a first side surface and a second side surface (2F, 2R – Figure 1, ¶59) opposed to each other in a width direction (DW – Figure 1) orthogonal to the height direction and the length direction (Figure 1);
multiple first inner electrode layers (3A – Figure 1, Figure 2, ¶59) on the multiple ceramic layers (4 – Figure 1, Figure 2)and extended to the first end surface (2P – Figure 1, Figure 2);
multiple second inner electrode layers (3B – Figure 1, Figure 2, ¶59) on the multiple ceramic layers (4 – Figure 1, Figure 2) and extended to the second end surface (2Q – Figure 1, Figure 2);
a first outer electrode (6A – Figure 1, ¶61) on the first end surface (2P – Figure 1), extending from the first end surface (2P – Figure 1, Figure 2) to be located on a portion of the second main surface (2W – Figure 1, Figure 2), and coupled to the first inner electrode layers (6A – Figure 1, Figure 2); and
a second outer electrode (6B – Figure 1, ¶61) on the second end surface (2Q – Figure 1, Figure 2), extending from the second end surface to be located on a portion of the second main surface (2W – Figure 1, Figure 2), and coupled to the second inner electrode layers (6B – Figure 1, Figure 2);
wherein each of the first outer electrode and the second outer electrode (6A, 6B – Figure 1, Figure 2) includes a thin film layer (7 – Figure 1, Figure 2, ¶70) and a plating layer (9 – Figure 1, Figure 2, ¶75) on the thin film layer (Figure 1, Figure 2);
the thin film layer of each of the first outer electrode (7 of 6A , 7 of 6B– Figure 1, Figure 2) and the second outer electrode includes:
a main surface thin film layer (7 on 2W – Figure 1, Figure 2) on at least a portion of the second main surface of the multilayer body (Figure 1, Figure 2);
an end surface thin film layer (7 on 2P, 7 on 2Q excluding 7R – Figure 1, Figure 2, ¶75) on at least a portion of a corresponding one of the first end surface and the second end surface of the multilayer body (Figure 1, Figure 2); and
a continuous thin film layer (7R – Figure 2) extending continuously with the end surface thin film layer in the height direction (DS – Figure 2); and
a thickness of the continuous thin film layer (7R – Figure 2) in the length direction is smaller than a thickness of the end surface thin film layer (7 excluding 7R – Figure 2) in the length direction (Figure 2, ¶75).
In re claim 2, Shimada discloses the multilayer ceramic electronic component according to Claim 1, as explained above. Shimada further discloses wherein the main surface thin film layer of each of the first outer electrode and the second outer electrode (7 on 2W – Figure 1, Figure 2) continuously extends from the second main surface (2W – Figure 1, Figure 2) to a portion of the first end surface and a portion of the second end surface (2P, 2Q – Figure 1, Figure 2), respectively (Figure 1, Figure 2).
In re claim 3, Shimada discloses the multilayer ceramic electronic component according to Claim 1, as explained above. Shimada further discloses wherein the continuous thin film layer (7R – Figure 1, Figure 2) is closer to the first main surface of the multilayer body (2T – Figure 1, Figure 2) than the first inner electrode layers and the second inner electrode layers (6A, 6B – Figure 2).
In re claim 5, Shimada discloses the multilayer ceramic electronic component according to Claim 1, as explained above. Shimada further discloses wherein the thickness of the continuous thin film layer (7R – Figure 1, Figure 2) in the length direction (DL – Figure 1, Figure 2) decreases toward the first main surface (2T – Figure 2; Note that the curved surface of 7R results in a reduction in thickness towards the top surface of the multilayer component.).
In re claim 7, Shimada discloses the multilayer ceramic electronic component according to Claim 1, as explained above. Shimada further discloses wherein the plating layer (9 – Figure 1, Figure 2) includes a lower plating layer on the thin film layer, an intermediate plating layer on the lower plating layer, and an upper plating layer on the intermediate plating layer (¶81);
the lower plating layer is a Cu plating layer (¶81);
the intermediate plating layer is a Ni plating layer (¶81);
and the upper plating layer is a Sn plating layer (¶81).
In re claim 8, Shimada discloses the multilayer ceramic electronic component according to Claim 1, as explained above. Shimada further discloses wherein the main surface thin film layer (7 on 2W – Figure 2) includes at least either one of Cr and Ti (¶78).
In re claim 9, Shimada discloses the multilayer ceramic electronic component according to Claim 1, as explained above. Shimada further discloses wherein the end surface thin film layer (7 on 2P, 7 on 2Q excluding 7R – Figure 2) includes at least either one of Ni and Cu (¶77).
In re claim 10, Shimada discloses the multilayer ceramic electronic component according to Claim 1, as explained above. Shimada further discloses wherein the continuous thin film layer (7R – Figure 2) includes at least either one of Ni and Cu (¶77).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4 and 6 is/are rejected under 35 U.S.C. 102(a) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Shimada (US Publication 2022/0172900).
In re claim 4, Shimada discloses the multilayer ceramic electronic component according to Claim 1, as explained above. Shimada further discloses wherein a length of the continuous thin film layer (7R – Figure 1, Figure 2) in the height direction (DS – Figure 1, Figure 2) is about twice or more and about five times or less a thickness of the end surface thin film layer (7 excluding 7R – Figure 1, Figure 2) in the length direction (DL – Figure 1, Figure 2). Note that, claim 1 requires the continuous thin film layer to have ‘a thickness’ that is less than ‘a thickness’ of the end surface thin film layer. Therefore, the continuous thin film layer can have an arbitrary height that meets the limitation of claim 4.
In re claim 6, Shimada discloses the multilayer ceramic electronic component according to Claim 1, as explained above. Shimada further discloses wherein the thickness of the continuous thin film layer (7R – Figure 1, Figure 2) in the length direction (DL – Figure 1, Figure 2) is about 20 nm or more and about 100 nm or less (Figure 2). Note that, claim 1 requires the continuous thin film layer to have ‘a thickness’ that is less than ‘a thickness’ of the end surface thin film layer. Therefore, there exists a thickness within 7R of Shimada that meets this thickness limitation.
Claim(s) 11-19 is/are rejected under 35 U.S.C. 102(a) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Fuji (US Publication 2016/0240314) in view of Shimada (US Publication 2022/0172900).
In re claim 11, Fuji discloses a multilayer ceramic electronic component, comprising:
a multilayer body (10A4 – Figure 26, Figure 27, ¶182) including a first main surface (M1 – Figure 26, Figure 27, ¶184) and a second main surface (M2 – Figure 26, 27, ¶184) opposed to each other in a height direction (‘H’ direction – Figure 26, Figure 27), a first side surface (S1 – Figure 26, Figure 27, ¶183) and a second side surface (S2 – Figure 26, Figure 27, ¶184) opposed to each other in a width direction (‘L’ direction – Figure 1, Figure 3) orthogonal or substantially orthogonal to the height direction (Figure 1, Figure 3), and a third side surface and a fourth side surface (S3, S4 – Figure 26, Figure 28, ¶183-184) opposed to each other in a length direction (‘W’ direction – Figure 26, Figure 28) orthogonal or substantially orthogonal to the height direction and the width direction (Figure 26, Figure 27, Figure 28);
a first outer electrode (21 – Figure 26, ¶183) on the first side surface and the third side surface (S1, S3 – Figure 26), and extending from the first side surface (S1 – Figure 26) to a portion of the second main surface (M2 – Figure 26, Figure 27);
a second outer electrode (22 – Figure 26, Figure 27) on the second side surface and the fourth side surface (S2, S4 – Figure 26, Figure 27), and extending from the second side surface (S2 – Figure 26, Figure 27) to a portion of the second main surface (M2 – Figure 26, Figure 27);
a third outer electrode (23 – Figure 26, Figure 28, ¶182) on the first side surface and the fourth side surface (S2, S4 – Figure 26), and extending from the first side surface (S1 – Figure 26, Figure 28) to a portion of the second main surface (M2 – Figure 26, Figure 28);
a fourth outer electrode (24 – Figure 26, Figure 28, ¶182) on the second side surface (S2 – Figure 26, Figure 28) and the third side surface (S3 – Figure 26, Figure 28), and extending from the second side surface (S2 – Figure 26, Figure 28) to be located on a portion of the second main surface (M2 – Figure 26, Figure 28) ;
wherein a measurement of multilayer ceramic electronic component in the length direction (‘W’ – Figure 26) and a measurement of multilayer ceramic electronic component in the width direction (‘L’ – Figure 26) are the same or substantially same (Figure 12: Verification Example 13).
Fuji does not disclose each of the first outer electrode and the second outer electrode includes a thin film layer and a plating layer on the thin film layer;
the thin film layer of each of the first outer electrode and the second outer electrode includes:
a main surface thin film layer on at least a portion of the second main surface of the multilayer body;
an end surface thin film layer on at least a portion of a corresponding one of the first side surface and the second side surface of the multilayer body; and
a continuous thin film layer extending continuously with the end surface thin film layer in the height direction; and
a thickness of the continuous thin film layer in the length direction is smaller than a thickness of the end surface thin film layer in the length direction.
Lee discloses wherein each of the first outer electrode and the second outer electrode (6A, 6B – Figure 1, Figure 2) includes a thin film layer (7 – Figure 1, Figure 2, ¶70) and a plating layer (9 – Figure 1, Figure 2, ¶75) on the thin film layer (Figure 1, Figure 2);
the thin film layer of each of the first outer electrode (7 of 6A , 7 of 6B– Figure 1, Figure 2) and the second outer electrode includes:
a main surface thin film layer (7 on 2W – Figure 1, Figure 2) on at least a portion of the second main surface of the multilayer body (Figure 1, Figure 2);
an end surface thin film layer (7 on 2P, 7 on 2Q excluding 7R – Figure 1, Figure 2, ¶75) on at least a portion of a corresponding one of the first end surface and the second end surface of the multilayer body (Figure 1, Figure 2); and
a continuous thin film layer (7R – Figure 2) extending continuously with the end surface thin film layer in the height direction (DS – Figure 2); and
a thickness of the continuous thin film layer (7R – Figure 2) in the length direction is smaller than a thickness of the end surface thin film layer (7 excluding 7R – Figure 2) in the length direction (Figure 2, ¶75).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the outer electrode structure as described by Lee to provide for a low profile electronic component.
In re claim 12, Fuji in view of Lee discloses the multilayer ceramic electronic component according to Claim 11, as explained above. Fuji does not disclose wherein the main surface thin film layer of each of the first outer electrode and the second outer electrode continuously extends from the second main surface to a portion of the first side surface and a portion of the second side surface, respectively.
Shimada discloses wherein the main surface thin film layer of each of the first outer electrode and the second outer electrode (7 on 2W – Figure 1, Figure 2) continuously extends from the second main surface (2W – Figure 1, Figure 2) to a portion of the first end surface and a portion of the second end surface (2P, 2Q – Figure 1, Figure 2), respectively (Figure 1, Figure 2).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the outer electrode structure as described by Lee to provide for a low profile electronic component.
In re claim 13, Fuji in view of Lee discloses the multilayer ceramic electronic component according to Claim 11, as explained above. Fuji does not disclose wherein the continuous thin film layer is closer to the first main surface of the multilayer body than a first inner electrode layers and a second inner electrode layers.
Shimada discloses wherein the continuous thin film layer (7R – Figure 1, Figure 2) is closer to the first main surface of the multilayer body (2T – Figure 1, Figure 2) than the first inner electrode layers and the second inner electrode layers (6A, 6B – Figure 2).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the outer electrode structure as described by Lee to provide for a low profile electronic component.
In re claim 14, Fuji in view of Lee discloses the multilayer ceramic electronic component according to Claim 11, as explained above. Fuji does not disclose wherein a length of the continuous thin film layer in the height direction is about twice or more and about five times or less a thickness of the end surface thin film layer in the width direction.
Shimada discloses wherein a length of the continuous thin film layer (7R – Figure 1, Figure 2) in the height direction (DS – Figure 1, Figure 2) is about twice or more and about five times or less a thickness of the end surface thin film layer (7 excluding 7R – Figure 1, Figure 2) in the length direction (DL – Figure 1, Figure 2). Note that, claim 1 requires the continuous thin film layer to have ‘a thickness’ that is less than ‘a thickness’ of the end surface thin film layer. Therefore, the continuous thin film layer can have an arbitrary height that meets the limitation of claim 14.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the outer electrode structure as described by Lee to provide for a low profile electronic component.
In re claim 15, Fuji in view of Lee discloses the multilayer ceramic electronic component according to Claim 11, as explained above. Fuji does not disclose wherein the thickness of the continuous thin film layer in the width direction decreases toward the first main surface.
Shimada discloses wherein the thickness of the continuous thin film layer (7R – Figure 2A, Figure 2C) in the width direction (DW – Figure 2C) decreases toward the first main surface (2T – Figure 2C).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the outer electrode structure as described by Lee to provide for a low profile electronic component.
In re claim 16, Fuji in view of Lee discloses the multilayer ceramic electronic component according to Claim 11, as explained above. Fuji does not disclose wherein the thickness of the continuous thin film layer in the width direction is about 20 nm or more and about 100 nm or less.
Shimada discloses wherein the thickness of the continuous thin film layer (7R – Figure 1, Figure 2) in the length direction (DL – Figure 1, Figure 2) is about 20 nm or more and about 100 nm or less (Figure 2). Note that, claim 1 requires the continuous thin film layer to have ‘a thickness’ that is less than ‘a thickness’ of the end surface thin film layer. Therefore, there exists a thickness within 7R of Shimada that meets this thickness limitation.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the outer electrode structure as described by Lee to provide for a low profile electronic component.
In re claim 17, Fuji in view of Lee discloses the multilayer ceramic electronic component according to Claim 11, as explained above. Fuji does not disclose wherein the main surface thin film layer includes at least one of Cr or Ti.
Shimada discloses wherein the main surface thin film layer (7 on 2W – Figure 2) includes at least either one of Cr and Ti (¶78).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the outer electrode structure as described by Lee to provide for a low profile electronic component.
In re claim 18, Fuji in view of Lee discloses the multilayer ceramic electronic component according to Claim 11, as explained above. Fuji does not disclose wherein the end surface thin film layer includes at least one of Ni or Cu.
Shimada discloses wherein the end surface thin film layer (7 on 2P, 7 on 2Q excluding 7R – Figure 2) includes at least either one of Ni and Cu (¶77).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the outer electrode structure as described by Lee to provide for a low profile electronic component.
In re claim 19, Fuji in view of Lee discloses the multilayer ceramic electronic component according to Claim 11, as explained above. Fuji does not disclose wherein the continuous thin film layer includes at least one of Ni or Cu.
Shimada discloses wherein the continuous thin film layer (7R – Figure 2) includes at least either one of Ni and Cu (¶77).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the outer electrode structure as described by Lee to provide for a low profile electronic component.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Mori et al. (US Publication 2019/0287720) Figure 2, Figure 3A, [¶49]
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/ARUN RAMASWAMY/ Primary Examiner, Art Unit 2847
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