DETAILED ACTION
This Office action is in response to the application filed on 21 February 2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Simon Brule (US20190317542A1; hereafter “Simon”).
-Regarding claim 1:
Simon discloses:
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A reference voltage generation circuit (Fig. 2; 102) that outputs a reference voltage (Fig. 2; VREF), comprising: a constant current source that generates a constant current (Fig. 2; 220); a constant voltage generation circuit having a Zener diode (Fig. 2; 202) to which the constant current is supplied from the constant current source (Fig. 2; I1 from 220), and generating a constant voltage based on a Zener voltage generated by the Zener diode (Fig. 2; 202, and V1, paragraph 0014; “The Zener diode 202 is coupled at node V1. The Zener diode 202 includes a first terminal (e.g., cathode) coupled at node V1”); a current generation circuit that generates a PTAT current having a positive temperature characteristic with respect to absolute temperature based on the constant voltage without including an operational amplifier (Fig. 2; no amplifier in 102, Fig. 4, paragraph 0017; “compensating for Zener voltage variation over temperature”, paragraph 0025; “In this example, plot 402 shows VREF voltage output from a known Zener diode reference voltage generator without PTAT current compensation varying by more than 2 millivolts (mV) with temperature. In contrast, plot 404 shows VREF voltage output from exemplary voltage reference circuit 102 varying by less than 0.1 mV with temperature. Because the voltage reference circuit 102 includes PTAT current compensation circuitry to provide bias current for the PTAT circuit, the Zener diode bias current remains stable allowing for the VREF voltage output to have a substantially flat, constant relationship with temperature.”); and a temperature characteristic adjustment circuit including a temperature characteristic adjustment resistor (Fig. 2; 218, 214) through which the PTAT current generated by the current generation circuit flows (paragraph 0017; “The PTAT current I4 establishes a PTAT voltage across resistor 218, compensating for Zener voltage variation over temperature and resulting in a stable voltage at node V2.”), wherein: a voltage acquired by subtracting a voltage drop in the temperature characteristic adjustment circuit (paragraph 0013; “ The output voltage divider includes resistors 214-216 configured to provide a reference voltage of approximately 1.25 volts at the VREF output terminal”) when the PTAT current flows from the constant voltage is output as the reference voltage (Fig. 2; VREF).
-Regarding claim 7:
Simon discloses:
The reference voltage generation circuit according to claim 1, wherein: the temperature characteristic adjustment circuit includes a trimming resisto in addition to a temperature characteristic adjustment resistor (Fig. 2; 218, 214); a voltage drop in the temperature characteristic adjustment circuit when the PTAT current flows is a voltage drop in the temperature characteristic adjustment circuit when the PTAT current flows through the temperature characteristic adjustment resistor and the trimming resistor (paragraph 0017; “The PTAT current I4 establishes a PTAT voltage across resistor 218, compensating for Zener voltage variation over temperature and resulting in a stable voltage at node V2.”); and a voltage obtained by subtracting the voltage drop from the constant voltage is output as the reference voltage (paragraph 0013; “ The output voltage divider includes resistors 214-216 configured to provide a reference voltage of approximately 1.25 volts at the VREF output terminal”).
Allowable Subject Matter
Claims 2-6, 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim.
The following is a statement of reasons for the indication of allowable subject matter:
-with respect to claim 2:
the prior art in Simon discloses the claimed invention in basic claims but do not further disclose about “……having a current density different from that of the one transistor, and a current adjustment resistor through which the PTAT current flows; the constant current is supplied from the constant current source between a collector and an emitter of the one transistor; a collector of the other transistor is connected to the temperature characteristic adjustment circuit, an emitter of the other transistor is connected to the current adjustment resistor, and a base of the other transistor is connected to the collector of the one transistor…….”.
-with respect to claim 3:
the prior art in Simon discloses the claimed invention in basic claims but do not further disclose about “…….one transistor and an other transistor having a current density different from that of the one transistor…….. a collector of the other transistor included in the transistor group and disposed on a highest side is connected to the temperature characteristic adjustment circuit, and an emitter of the other transistor included in the transistor group and disposed on a lowest side is connected to the current adjustment resistor;…….. between the collector and the emitter of the other transistor in each set of transistors in the transistor group, and through the current adjustment resistor based on the constant current supplied from the constant current source; and a voltage obtained by integrating a differential voltage between a base-emitter voltage of the one transistor and a base-emitter voltage of the other transistor in each set of transistors in the transistor group is generated as a voltage difference between 2/4 both ends of the current adjustment resistor.”.
-with respect to claim 8:
the prior art in Simon discloses the claimed invention in basic claims but do not further disclose about “……the constant voltage generation circuit has a first voltage division resistor and a second voltage division resistor connected in parallel to the Zener diode; and a voltage divided by the first voltage division resistor and the second voltage division resistor is formed as the constant voltage.”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEUNG HO CHOI whose telephone number is (571)272-8188. The examiner can normally be reached Monday-Thursday, 7:30 AM - 5:30 PM ET.
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/SEUNG HO CHOI/Examiner, Art Unit 2838
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
