DETAILED ACTION
1. This office action is in response to the Application No. 19060794 filed on 12/18/2025. Claims 1-18 are presented for examination and are currently pending. Applicant’s arguments have been carefully and respectfully considered.
Response to Arguments
2. On page 5 of the remarks the Applicant argued that “First, the claims recite specific technological implementations, notably hierarchical supervisory systems with multi-level monitoring, meta-supervisory pattern tracking and learning, dynamic
sparsity detection with adaptive thresholds, and signal transmission pathways with temporal coordination, that improve neural network efficiency and computer functionality. Under the August 2025 Kim Memorandum, Al inventions integrating specific architectures and technical implementations that solve technical problems are not abstract ideas at Step 2A, Prong 1”.
The above argument is not persuasive because the claims recited are so broad that the details in the specification are not reflected in the claims to be apparent to a person of ordinary skill in the art to recognize that the claimed invention leads to an improvement in technology. If the specification sets forth an improvement in technology, the claim should be evaluated to ensure that the claim itself reflects the disclosed improvement. That is, the claim includes the components or steps of the invention that provide the improvement described in the specification, 2106.04(d)(1). However, the instant claim discloses no details about what the monitoring or pattern tracking or sparsity detection etc. is actually doing to lead to an alleged improvement.
Additionally, a conclusory statement that “the claims recite specific technological implementations, notably hierarchical supervisory systems with multi-level monitoring, meta-supervisory pattern tracking and learning, dynamic sparsity detection with adaptive thresholds, and signal transmission pathways with temporal coordination, that improve neural network efficiency and computer functionality” cannot be construed to be an improvement to the technological field.
Furthermore, the detailed 101 rejection in this office action is inline with the August 2024 Memorandum.
Furthermore on page 5, the Applicant argued that “Second, even if abstract, the claims are not "directed to" abstract ideas because they focus on specific technological improvements to computer capabilities, namely, dynamic neural network optimization through real-time pruning coordination and multi-level supervisory control. …, claims "directed to a specific technological approach to solving a specific technical problem" are not directed to abstract ideas”.
The above argument is not persuasive because the technological improvement argued above, for example, the “dynamic neural network optimization through real-time pruning coordination” is not recited in the claims. The real-time pruning is not recited in the claims. Also, the argument is broad that there is no details of how the improvements can be achieved.
On page 5 of the remarks the Applicant argued that “Third, even if directed to abstract ideas, the claims integrate them into practical applications at Step 2A, Prong 2 by improving how neural network systems operate through dynamic pruning, sparsity detection, and resource management …., claims integrate abstract ideas into practical applications when the specification identifies concrete improvements to computer technology, specific claim limitations reflect those improvements, and the improvements are to how the computer system itself operates, all of which are present here”.
The above argument is not persuasive because the claims recited are so broad that there are no details in the specification that describes the claimed invention such that it would be apparent to a person of ordinary skill in the art to recognize the claimed invention leads to an improvement in technology. A conclusory statement that the claimed invention integrate into practical application is not persuasive.
On page 5-6 of the remarks the Applicant argued that “Fourth, even at Step 2B, the claims recite an inventive concept because the specific implementations, multi-level hierarchical supervision with real-time pruning coordination, meta- supervisory pattern learning and generalization, adaptive sparsity detection, and signal pathway management with temporal coordination, are not well-understood, routine, or conventional, as evidenced by the Examiner citing separate prior art to teach these elements”.
The above argument is not persuasive because it is noted that the analysis for citing different prior art to teach the claimed invention (i.e., 103 rejection) is distinct from a subject matter eligibility analysis for a 101 rejection, and the findings in the rejections made under 35 U.S.C. 101 do not influence findings in the rejections made under 35 U.S.C. 103, and vice versa. The applicant’s position that the separate prior art was applied to the claimed invention is unsupported by both the MPEP and case law.
On page 6-7 of the remarks the Applicant argued that “When properly construed under this framework, the claims are directed to specific technological implementations that improve neural network efficiency and computer operation, not to abstract mental processes of observation and judgment. The limitations of the independent claims define how the system operates at a technical level. They specify the AI architecture (hierarchical and meta-supervisory systems), the data structures (activation data and behavior patterns), the operational mechanisms (sparsity detection with adaptive thresholds, pruning coordination across supervisory levels), and the signal processing techniques (pathway management with temporal coordination). This technical specificity demonstrates that the claims are directed to particular technological implementations for dynamic neural network optimization, not abstract concepts”.
The above argument is not persuasive because the claims recited are so broad that the details in the specification are not reflected in the claims to be apparent to a person of ordinary skill in the art to recognize that the claimed invention leads to an improvement in technology. If the specification sets forth an improvement in technology, the claim should be evaluated to ensure that the claim itself reflects the disclosed improvement. That is, the claim includes the components or steps of the invention that provide the improvement described in the specification, 2106.04(d)(1). However, the instant claim discloses no details about what the sparsity detection or pruning coordination or temporal coordination etc. is actually doing to lead to an alleged improvement.
Additionally, a conclusory statement that “the AI architecture (hierarchical and meta-supervisory systems), the data structures (activation data and behavior patterns), the operational mechanisms (sparsity detection with adaptive thresholds, pruning coordination across supervisory levels), and the signal processing techniques (pathway management with temporal coordination), demonstrates that the claims are directed to particular technological implementations for dynamic neural network optimization” cannot be construed to be an improvement to the technological field. As a result, the claimed invention do not integrate the abstract ideas into practical application nor amount to significantly more than an exception.
On page 7 of the remarks the Applicant argued that “The invention solves this technical problem through specific technological means: "a system and method for locally supervised pruning of active deep learning cores. The system introduces an innovative approach to neural network optimization by enabling sophisticated real-time pruning operations through multi-level supervision and network sparsity detection" [0006]. The specification repeatedly emphasizes the technological improvement: "The system's hierarchical supervisory system uses thresholds that adapt based on neural network state to detect sparsity and coordinate pruning decisions. The meta-supervisory system maintains network stability while identifying patterns across implemented pruning decisions, and associates context identifiers with stored modification and pruning patterns" [0007]; and "This sophisticated pruning mechanism allows for real-time optimization of the neural network structure through controlled architectural modifications while maintaining operational stability through support pathways and continuous performance validation" [0007]. This focus on improving neural network efficiency and computer operation through specific multi-level supervisory implementations, not on observation and judgment as mental processes, defines what the claims are directed to”.
The above argument is not persuasive because the technical solution argued above, for example, the “The system introduces an innovative approach to neural network optimization by enabling sophisticated real-time pruning operations through multi-level supervision and network sparsity detection” is not recited in the claims. The real-time pruning is not recited in the claims. Also, there is no details of how the improvements argued above can be achieved. As a result, the claimed invention do not integrate the abstract ideas into practical application nor amount to significantly more than an exception.
On page 7-8 of the remarks the Applicant argued that “The Examiner's characterization of the claims as directed to "mental processes" of observation and judgment improperly focuses on over-generalized descriptions rather than the technological means by which neural network optimization is achieved. When the claims are properly construed as an ordered combination, they are focused on implementing hierarchical supervisory systems with multi-level monitoring, implementing meta-supervisory pattern tracking and learning, detecting sparsity with adaptive thresholds, coordinating pruning decisions across supervisory levels, and managing signal pathways with temporal coordination-a technological improvement to neural network operation and computer efficiency. The fact that this implementation involves monitoring and decision-making does not make the claims abstract”.
The above argument is not persuasive because the claims are clearly directed to abstract ideas highlighted in the detailed 101 rejection in the office action. The monitoring, the detecting network sparsity, the pattern tracking and managing signal transmission pathways are all abstract ideas. It is important to note that the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements.
On page 8 of the remarks the Applicant argued that “The Examiner's characterization of the claims as "mental processes" is fundamentally incorrect because the claimed processes cannot be performed mentally, humans cannot implement multi- level hierarchical supervisory systems that monitor neural networks comprising millions of interconnected nodes arranged in layers, cannot detect network sparsity using adaptive thresholds that dynamically adjust based on neural network state across multiple supervisory levels, cannot coordinate pruning decisions by exchanging resource availability and sparsity information across supervisory hierarchies in real-time during network operation, cannot implement meta- supervisory systems that track behavior patterns across implemented pruning decisions and extract generalizable principles for future optimization, and cannot manage signal transmission pathways providing direct connections between non-adjacent network regions with signal modification and temporal coordination during transmission at the millisecond timescales required for neural network operation. claims requiring "specific computer-implemented techniques" are not directed to mental processes, and the specification confirms these operations require sophisticated computing infrastructure operating on neural networks with interconnected nodes, implementing dynamic architectural modifications through pruning, and managing signal pathways with temporal coordination that fundamentally cannot be accomplished through human observation and judgment”.
The above argument is not persuasive. The fact that the claimed invention involves series of calculation or multiples steps does not prevent the claimed invention from being performed in the human mind. As stated, “Nor do the courts distinguish between claims that recite mental processes performed by humans and claims that recite mental processes performed on a computer. As the Federal Circuit has explained, “[c]ourts have examined claims that required the use of a computer and still found that the underlying, patent-ineligible invention could be performed via pen and paper or in a person’s mind”, MPEP 2106.04(a)(2)(III).
Furthermore, the claimed invention do not recite real-time pruning decision making during network operation. As a result, the claimed invention do not integrate the abstract ideas into practical application nor amount to significantly more than an exception.
On page 9 of the remarks the Applicant argued that “Moreover, the claimed invention addresses a problem "specifically arising in the realm of" computer-implemented neural networks, namely, the computational inefficiency and memory requirements of large-scale neural networks with dense representations … Here, the problem of neural network inefficiency and the solution of dynamic multi-level supervised pruning with sparsity detection are necessarily rooted in computer technology and neural network architecture, not in abstract observation or mental processes that could exist independently of computer implementation. For these reasons, the claims are not "directed to" abstract ideas under Step 2A, Prong 1, … the claims are directed to specific technological implementations that improve neural network efficiency and computer operation through hierarchical and meta-supervisory systems, dynamic sparsity detection, coordinated pruning, and signal pathway management with temporal coordination. The claims should therefore be found patent-eligible at Step 2A, Prong 1 itself”.
On page 9-10 of the remarks the Applicant argued that “Even if the claims recite one or more abstract ideas at Prong 1, the claims integrate any such abstract ideas into a practical application under Prong 2.”
The above argument is not persuasive because the claims recited are so broad that the details in the specification are not reflected in the claims to be apparent to a person of ordinary skill in the art to recognize that the claimed invention leads to an improvement in technology. If the specification sets forth an improvement in technology, the claim should be evaluated to ensure that the claim itself reflects the disclosed improvement. That is, the claim includes the components or steps of the invention that provide the improvement described in the specification, 2106.04(d)(1). However, the instant claim discloses no details about what the coordinated pruning or coordinated pruning or sparsity detection etc. is actually doing to lead to an alleged improvement.
Additionally, a conclusory statement that the dynamic multi-level supervised pruning with sparsity detection provides a solution to the problem of neural network inefficiency cannot be construed to be an improvement to the technological field. As a result, the claimed invention do not integrate the abstract ideas into practical application nor amount to significantly more than an exception.
On page 10 of the remarks the Applicant argued that “Claim 1, as presented, provides concrete technological solutions: "a system and method for locally supervised pruning of active deep learning cores. The system introduces an innovative approach to neural network optimization by enabling sophisticated real-time pruning operations through multi-level supervision and network sparsity detection" [[[0006]. Specific claim limitations reflect these improvements to neural network operation and computer efficiency: implementing "a hierarchical supervisory system monitoring the neural network through multiple supervisory levels" that "detects network sparsity" using "thresholds that adapt based on neural network state" [[0002], "coordinates pruning decisions" by "exchanging information about resource availability and network sparsity across the multiple supervisory levels" [0003], and "manages resource redistribution; implementing "a meta-supervisory system that tracks supervisory behavior patterns, stores successful modification and pruning patterns, and extracts generalizable principles" that "maintains network stability while identifying patterns across implemented pruning decisions" [0004] and "associates context identifiers with stored modification and pruning patterns" [0007]; and managing "signal transmission pathways providing direct connections between non-adjacent network regions with signal modification and temporal coordination during transmission" that "modify signal strengths based on observed transmission effectiveness and detected network sparsity" [0006]”.
On page 10-11 of the remarks the Applicant argued that “These limitations improve how neural network systems operate by enabling dynamic optimization through real-time pruning while maintaining operational stability, the specification explains that "by leveraging advanced sparsity detection and resource management techniques, the system can efficiently implement pruning operations while maintaining operational stability" [0006], and "this sophisticated pruning mechanism allows for real-time optimization of the neural network structure through controlled architectural modifications while maintaining operational stability through support pathways and continuous performance validation" [0007]. This is directly analogous to Desjardins, where the Panel found that improvements to "how the machine learning model itself operates" integrated abstract ideas into practical application; here, the improvements to how neural networks operate through multi-level supervised pruning, sparsity detection, and stability maintenance provide the same practical application integration”.
The above argument is not persuasive because the technical solution argued above, for example, the “The system introduces an innovative approach to neural network optimization by enabling sophisticated real-time pruning operations through multi-level supervision and network sparsity detection” is not recited in the claims. Specifically, the real-time pruning is not recited in the claims. In addition, the thresholds adapting based on the neural network state and the exchange of information across the supervisory levels is also not reflected in the claim 1.
Also, there are no details in the specification of how the improvements argued above can be achieved with the broadly claimed limitations recited in claim 1. As a result, the claimed invention do not integrate the abstract ideas into practical application nor amount to significantly more than an exception.
On page 11 of the remarks the Applicant argued that “the proper characterization of what the claims improve is not "observation and judgment generally" but rather "neural network systems that overcome computational inefficiency through hierarchical supervised pruning with sparsity detection, meta-level pattern learning, and signal pathway management," an improvement to computer technology and neural network operation. The specification confirms this technological focus: "The system's hierarchical supervisory system uses thresholds that adapt based on neural network state to detect sparsity and coordinate pruning decisions. The meta-supervisory system maintains network stability while identifying patterns across implemented pruning decisions" [0007], and the system "manages signal transmission pathways that enable direct communication between non-adjacent network regions through signal modification and temporal coordination" [0008] … Claim 1's multi-level supervised pruning with adaptive sparsity detection and meta-supervisory pattern learning improves neural network operation (not merely applies observation processes).”
The above argument is not persuasive because monitoring of the neural network, identifying operation patterns, detecting network sparsity, coordination of pruning decisions, managing resource redistribution and managing signal transmission pathways recited in the claims are clearly mental processes which is an abstract idea that includes concepts that can be performed in the human mind, and examples of mental processes include observations, evaluations, judgments, and opinions, MPEP 2106.04(a)(2)(III). It is important to note that the judicial exception (abstract ideas) alone cannot provide the improvement. The improvement can be provided by one or more additional elements.
Furthermore, the claims recited are so broad that the details in the specification are not reflected in the claims to be apparent to a person of ordinary skill in the art to recognize that the claimed invention leads to an improvement in technology. If the specification sets forth an improvement in technology, the claim should be evaluated to ensure that the claim itself reflects the disclosed improvement. That is, the claim includes the components or steps of the invention that provide the improvement described in the specification. However, the instant claim discloses no details about how the multi-level supervised pruning with adaptive sparsity detection and meta-supervisory pattern learning lead to an alleged improvement in neural network training, 2106.04(d)(1).
On page 11-12 of the remarks the Applicant argued that “The Examiner's characterization of claim elements as "mere instructions to apply a judicial exception" (MPEP 2106.05(f)) or "insignificant extra-solution activity" (MPEP 2106.05(g)) fails to recognize how these elements work together as an integrated system that improves neural network operation. The hierarchical supervisory system is not a "mere instruction," it is a specific multi-level architecture that collects activation data, identifies operation patterns, detects sparsity using adaptive thresholds, coordinates pruning decisions across levels, and manages resource redistribution. The meta-supervisory system is not a "mere instruction," it is a higher- level learning system that tracks patterns across supervisory behavior, stores successful modifications with context identifiers, and extracts generalizable principles to improve future pruning decisions. The signal transmission pathways are not merely "linking to a technological environment" (MPEP 2106.05(h)), they are specific pathway management mechanisms that provide direct connections between non-adjacent network regions with signal modification and temporal coordination based on detected sparsity and transmission effectiveness. These elements, considered together as an ordered combination, constitute a specific technical architecture that improves neural network efficiency and computer operation”.
The above argument is not persuasive because the claimed limitations that includes a hierarchical supervisory system and a meta-supervisory system are broad and there are no details in the claim that describes the hierarchical supervisory system to be a specific multi-level architecture that collects activation data, identifies operation patterns, detects sparsity using adaptive thresholds, coordinates pruning decisions across levels, and manages resource redistribution or the meta-supervisory system has a higher-level learning system that tracks patterns across supervisory behavior, stores successful modifications with context identifiers, and extracts generalizable principles to improve future pruning decisions such that it would be apparent to a person of ordinary skill in the art to recognize that these limitations leads to the improvement in the technological field as argued by the Applicant. As a result, the claimed invention do not integrate the abstract ideas into practical application nor amount to significantly more than an exception.
On page 12 of the remarks the Applicant argued that “The additional elements therefore integrate any abstract ideas into practical application by providing specific improvements to computer technology, dynamic neural network optimization through multi-level supervision, real-time sparsity detection with adaptive thresholds, meta-level pattern learning and generalization, and signal pathway management with temporal coordination, that solve recognized technical problems in neural network efficiency and computational resource utilization. Under MPEP § 2106.04(d)(1) and the framework established in Desjardins, Enfish, and DDR Holdings, claims providing such technological improvements integrate abstract ideas into practical applications and are patent-eligible at Step 2A, Prong 2”.
The above argument is not persuasive because the additional elements detailed in the 101 rejection do not integrate the abstract ideas into practical application because the Applicant has not included detailed description from the specification of how these system i.e., hierarchical supervisory system or the meta-supervisory system work together to arrive at solving the technical problems in neural network efficiency and computational resource utilization.
Furthermore, the claimed invention do not recite real-time sparsity detection with adaptive thresholds. As a result, the claimed invention do not integrate the abstract ideas into practical application nor amount to significantly more than an exception.
On page 12 of the remarks the Applicant argued that “The independent claims are not directed to an abstract idea at Step 2A, Prong 1 because they recite specific technological implementations that improve neural network efficiency and computer operation. Even if the Examiner finds that the independent claims recite an abstract ideas, they integrate such ideas into a practical application at Step 2A, Prong 2 by improving how neural network systems operate through multi-level supervised pruning, sparsity detection, and resource management. Therefore, the independent claims satisfy §101 at every stage of the analysis. Since the independent claims are patentable, any claim dependent upon the independent claims are patentable as well by virtue of its dependency. Therefore, Applicant respectfully requests that the rejection under §101 be withdrawn”.
The above argument is not persuasive because as argued above the claimed invention do not integrate the abstract ideas into practical application nor amount to significantly more than an exception. As a result, the independent claims are ineligible and are not patentable as argued above. Dependent claims that depend from the independent claims are ineligible and not patentable as well. The 101 rejection is therefore maintained.
On page 13 of the remarks the Applicant argued that “Applicant asserts that Yuan et al. does not anticipate all of the claimed limitations of Claim 1 and Claim 10. For simplicity, Applicant's arguments will be directed towards Claim 1, but remain applicable to Claim 10 and each claim's respective dependent claims. At least the following limitations are not anticipated by Yuan: 1. "implement a hierarchical supervisory system monitoring the neural network through multiple supervisory levels" The above limitation is not anticipated by Yuan. The limitation requires a supervisory system that monitors neural network operation through multiple supervisory levels. Yuan does not disclose this limitation. The Examiner cites Yuan's "multi-mode hierarchical data memory" and describes data flow through different hardware components, asserting this constitutes "multiple supervisory levels."
The argument above is not persuasive because Yuan teaches online sparsity adaptor → multi-mode hierarchical data memory → various sparsity-supported convolution PE Arrays which clearly depicts a hierarchical supervisory system in Figure 4 as detailed in the Office Action. The Examiner notes the online sparsity adaptor as the first supervisory level monitors the activations sparsity online and changes the mode of the chip based on activations/weights sparsity (WS), pg. 468, left col., second para.)
This is followed by multi-mode hierarchical data memory which is the second supervisory level which also monitors neural network sparsity because multi-mode hierarchical data memory can be reconfigured for networks with different sparsity modes is designed for higher storage efficiency, abstract)
The third supervisory level is various sparsity-supported convolution PE Arrays which also monitors neural network sparsity because it is designed to efficiently carry out convolution operations under different sparsity modes, especially when both activations and weights are sparse, abstract).
On page 13 of the remarks the Applicant argued that “ Yuan's "hierarchical data memory" refers to a hardware memory architecture with three types of on-chip memory banks optimized for different sparsity modes. As Yuan states: "The multi-mode hierarchical data memory is shown in Fig. 8(a). It contains three different modules: a 3-mode weight memory, an activation ID memory and a 3-mode activation memory" (pg. 469). This is a memory storage hierarchy, not a supervisory system that monitors neural network operation.
The argument above is not persuasive because the claimed limitation of “a hardware memory” was mapped to Yuan’s The hardware hierarchical memory design is first introduced, pg. 469, right col, second para.). in the Office Action.
Furthermore, as detailed above, the claimed limitation of a “hierarchical supervisory system” was mapped using Figure 4 of Yuan. The online sparsity adaptor as the first supervisory level monitors the activations sparsity online and changes the mode of the chip based on activations/weights sparsity (WS), pg. 468, left col., second para.)
This is followed by multi-mode hierarchical data memory which is the second supervisory level which also monitors neural network sparsity because multi-mode hierarchical data memory can be reconfigured for networks with different sparsity modes is designed for higher storage efficiency, abstract)
The third supervisory level is various sparsity-supported convolution PE Arrays which also monitors neural network sparsity because it is designed to efficiently carry out convolution operations under different sparsity modes, especially when both activations and weights are sparse, abstract).
On page 13 of the remarks the Applicant also argued that “The Examiner's citation to data flow, "activations and weights are fetched from off-chip memory to the on-chip multi-mode hierarchical data memory through a direct memory access (DMA). Then, the various sparsity-supported convolution PE arrays fetch activations and weights from the on-chip memory" (pg. 468), describes conventional data movement in hardware accelerators, not supervisory monitoring through multiple levels. Data flow from DRAM ->DMA --on-chip memory --PE arrays is standard hardware architecture, not a hierarchical supervisory system monitoring neural network behavior”.
On page 14 of the remarks the Applicant argued that “Moreover, Yuan's system does not monitor the neural network during operation, it processes networks that have already been pruned offline. Yuan explicitly states: "We get activations mode (AM) from the sparsity adaptor and the weights mode (WM) from the offline analysis" (pg. 468, emphasis added). Weight sparsity is determined offline, not through monitoring. Weight sparsity is determined offline, not through monitoring. The online sparsity adaptor merely detects activation sparsity levels after they are produced and classifies them into pre-defined categories-it does not monitor neural network operation to make supervisory decisions. The claimed hierarchical supervisory system actively monitors the neural network through multiple supervisory levels that coordinate with each other. Yuan's memory hierarchy and data flow components perform no such supervisory monitoring function”.
Firstly, the argument above about “data flow” are not persuasive because there are no limitations directed to “data flow”, so the Applicant is arguing about what is not being claimed. Secondly, operating a neural network depends on among other things, monitoring activations and weights of the neural network, so the claimed monitoring the neural network through multiple supervisory levels is taught by Yuan’s teaching of activations and weights from off-chip memory → on-chip memory → various sparsity-supported convolution PE arrays → online sparsity adaptor. (pg. 468, left col., second para.). Furthermore, the activations and weights received in Yuan’s convolution PE arrays enables convolution operation to occur.
On page 14 of the remarks the Applicant argued that “wherein the hierarchical supervisory system...identifies operation patterns”. The above limitation is not anticipated by Yuan. Yuan's sparsity modes are nine pre-defined hardware operating configurations (three activation modes X three weight modes) that the accelerator switches between based on detected sparsity levels. As Yuan describes: "The whole sparsity adaptive control/data flow shown in Fig. 5 treats different sparsity situations as different modes Then convolutional operations are processed in nine different modes (three AMs X three WMs)" (pg. 468). These modes are fixed hardware configurations designed into the chip-they are not operation patterns identified through monitoring”.
On page 14-15 of the remarks the Applicant argued that “Yuan's system classifies activations into one of three categories using fixed user-specified thresholds: "They are classified into three different modes based on two thresholds given by users (TH1 and TH2)" (pg. 468). Selecting among pre-existing hardware modes based on fixed thresholds is not identifying operation patterns through supervisory monitoring, it is categorizing sparsity levels to select appropriate hardware modes. The claimed limitation requires the hierarchical supervisory system to identify operation patterns through monitoring neural network behavior. Yuan's fixed mode selection based on predetermined thresholds does not teach or suggest this limitation”.
The arguments above are not persuasive because as clearly stated in the Office Action, Yuan monitors the activations and weights that enable convolution operations in the convolution PE arrays which occurs in different sparsity modes which are the identified operation patterns taught by Yuan.
Yuan teaches the limitation identifies operation patterns (Then, the various sparsity-supported convolution PE arrays fetch activations and weights from the on-chip memory and does convolution operations in different sparsity modes, pg. 467, right col., last para.; The Examiner notes the sparsity modes are the operation patterns).
On page 15 of the remarks the Applicant argued that “Yuan does not anticipate
"coordinates pruning decisions". The Examiner cites Yuan's statement that "this article can reduce the DRAM access by 1.81 x-5.18x except the first convolution layer. Although the first layer cannot be efficiently pruned, other convolution layers can benefit from this format" (pg. 471). This citation discusses the benefits of offline pruning that has already been performed-it does not describe a system that coordinates pruning decisions. Yuan is explicit that it processes pre- pruned networks: "After pruning, most convolution layers are sparse" (pg. 474, emphasis added). The paper discusses pruning in past tense because pruning was performed offline before the network was deployed to the STICKER hardware. The cited passage on page 471 appears in a section discussing storage format efficiency. Yuan states: "Compared with the original dense storage format, this article can reduce the DRAM access by 1.81x-5.18x except the first convolution layer" (pg. 471). This discusses the DRAM access benefits of storing already-pruned sparse networks efficiently-it is not coordinating pruning decisions.
Yuan is a hardware accelerator that executes neural networks with existing sparsity patterns. It does not make pruning decisions, coordinate pruning decisions, or implement pruning during operation. The entire contribution of Yuan is efficient hardware architecture for executing sparse networks that were pruned before deployment. The claimed limitation requires the hierarchical supervisory system to coordinate pruning decisions during neural network operation. Yuan's hardware accelerator, which processes pre- pruned networks, does not teach or suggest this limitation”.
The arguments above are not persuasive because as cited in the Office Action, Yuan prunes other convolution layers, but does not efficiently prune the first convolution layer, and this indicates a coordination of pruning decisions since Yuan prunes some convolution layers to reduce the DRAM access by 1.81×–5.18×, but does not efficiently prune the first convolution layer. Furthermore, there is no limitation in the claim that limits the pruning to occur in real-time or offline.
On page 15 of the remarks the Applicant argued that “ Yuan does not anticipate "implement a meta-supervisory system that tracks supervisory behavior patterns, stores successful modification and pruning patterns, and extracts generalizable principles". The Examiner cites Yuan's PE array architecture and adaptive encoder … The PE array is a processing element array that performs convolution operations. As Yuan describes: "As shown in Fig. 11, the 16 X 16 PE array architecture does convolution operations with high memory storage and fetch efficiency" (pg. 471). This is a computational hardware unit-it does not track supervisory behavior patterns because Yuan contains no supervisory behavior to track. The adaptive encoder is a data compression component. ... The encoder compresses activation data by removing zeros for efficient storage-it does not track supervisory behavior patterns. The Examiner's citation that Yuan "stores network layers with a different format based on sparsity" (pg. 474) describes data compression: … This is storing sparse network data efficiently by omitting zeros-not storing successful modification and pruning patterns for learning purposes”.
The arguments above are not persuasive because the supervisory behavior pattern being tracked by Yuan is the different sparsity of activations, and this is why the activations are encoded in different storage formats after being tracked.
The Applicant’s argument continued on page 16-17 that “The Examiner's citations regarding "extract features" and data extraction from simulations fundamentally misapprehend the claimed limitation. The statement "Convolutional layers are used to extract features" (pg. 466) describes what convolutional neural networks do (feature extraction is their function)-not extracting generalizable principles from supervisory behavior. The statement about "data are extracted after post-place and route simulations" (pg. 472) describes hardware design verification data-not extracting principles from pruning patterns… Yuan, which has no supervisory system and makes no pruning decisions, contains no such meta-level learning capability”.
The arguments above are not persuasive because under the broadest reasonable interpretation, the limitation “extracts generalizable principles” is a broad term that is not further limited in the claim.
Furthermore, generalizable principles from data during simulation is extracted from a single PE as shown in Figure 14. The PE is one the various sparsity-supported convolution PE arrays which perform convolution operation using activations and weights.
On page 17 of the remarks the Applicant argued that “Yuan do not anticipate “manage signal transmission pathways providing direct connections between non- adjacent network regions with signal modification and temporal coordination during transmission”. The Examiner cites Yuan's router connecting "MUL (multiplier) and memory bank" as "non-adjacent directly connected by router" and references clock cycle timing as "temporal coordination." Yuan's router is a hardware interconnect within a processing element that routes data between computational units. Yuan describes: "The router is used to dispatch data and control congestion. It is implemented with several MUXs and simple logic to avoid large latency overhead as shown in Fig. 11(b)" (pg. 472). This is a hardware multiplexer routing data between a multiplier unit and memory banks within a PE-it is not managing signal transmission pathways between non- adjacent regions of a neural network”.
Further, on page 17, the Applicant argued that “The claimed limitation requires managing "signal transmission pathways providing direct connections between non-adjacent network regions"-meaning different regions of the neural network topology (e.g., connections that skip layers or connect distant network regions), not hardware buses within a chip. Yuan's router connects hardware components within a single PE; it does not manage connections between non-adjacent neural network regions”.
The argument above is not persuasive because Yuan’s PE which processes a neural network comprises a multiplier, memory bank, and route. As a result, Yuan teaches "signal transmission pathways providing direct connections between non-adjacent network regions" (MUL (multiplier) and memory bank are non-adjacent directly connected by router). Furthermore, the Applicant has not claimed connections that skip layers or connect distant network regions as the meaning of “signal transmission pathways providing direct connections between non-adjacent network regions”. The broadest reasonable interpretation of the claimed limitation is taught by Yuan. In addition, Yuan also teaches We can use CNN sparsity to improve the energy efficiency by skipping unnecessary computation or storage, pg. 466, right col., last para.).
The Applicant’s argument continued on page 17 that “The Examiner's assertion that clock cycles constitute "temporal coordination" mischaracterizes the claimed limitation. The Examiner states: "After all convolutions are finished, a partial sum in ACC buffers in different sets will be summed up in one clock cycle to get the final convolution results" (pg. 472) and notes "a clock cycle is the basic unit of time in a computer's central processing unit." Basic clock cycle timing in digital circuits is not the temporal coordination of signal transmission between network regions based on network behavior. Clock cycles are the fundamental timing mechanism in any digital hardware-they do not constitute coordinated signal transmission management”.
The argument above is not persuasive Yuan teaches temporal coordination during signal transmission because Yuan’s clock cycle involves two operations
which are multiplication and addition. Furthermore, multiplication results are transmitted as signals for addition operation, and transmitting a multiplication result in a single clock cycle reads on the claimed limitation of “temporal coordination during transmission”.
On pages 17-18 of the remarks the Applicant argued that “The claimed limitation requires managing signal transmission pathways between non-adjacent network regions with signal modification and temporal coordination based on network state (a specified in dependent claims, based on "observed transmission effectiveness and detected network sparsity"). Yuan's hardware router with standard clock-cycle timing does not teach or suggest this limitation”.
The argument above is not persuasive Yuan teaches convolutional operations are processed in nine different modes (three AMs × three WMs) which reads on signals being transmitted based on a network state. Different modes of operation indicate different network states.
On pages 18 of the remarks the Applicant argued that “Yuan and the claimed invention are fundamentally different types of systems: Static Hardware Accelerator vs. Dynamic Supervisory System… Claim 1 recites "software instructions stored on nontransitory machine-readable storage media" that implement the hierarchical and meta-supervisory systems. Yuan is specialized hardware for efficiently executing pre-pruned networks. The claimed invention is a supervisory software system for dynamically pruning networks during operation. These are fundamentally different approaches to neural network optimization”.
The argument above is not persuasive because Yuan’s Accelerator for Convolutional Neural Networks is a system that performs the claimed functional limitations of the Applicant, and it is a system that includes instructions which are stored in the instruction memory in the reduced instruction-set computer (RISC) controller, pg. 469, left col., second to the last para.).
Further, the Applicant argued on pages 18-19 that “The Examiner's rejection attempts to map the claimed dynamic supervisory system onto Yuan's static hardware architecture by characterizing: Memory hierarchy as "supervisory levels", sparsity mode selection as "identifying operation patterns", discussion of offline pruning benefits as "coordinating pruning decisions", data compression as "storing successful patterns", hardware interconnects as "signal transmission pathways between network regions". Each characterization is unreasonably broad. Yuan describes hardware architecture for efficient execution; it does not disclose supervisory monitoring, pruning coordination, meta-level learning, or signal pathway management between network regions”.
The arguments above are not persuasive because there are no claim limitations that recite “dynamic”. Furthermore, Yuan actually teaches a dynamic system. Yuan teaches this article adopts a 32-bit storage efficient instruction set as shown in Fig. 7(a). In order to reduce the instruction numbers as much as possible, two optimizations are adopted. First, two types of instructions are designed: dynamic instructions and static instructions…These instructions configure on-chip instruction registers and can be reused by many dynamic instructions. Only these frequently changed control signals are in dynamic instructions. Second, each dynamic instruction is designed to process a block of data and operations instead of a single operation, page 469, left col., last para.).
Furthermore, Yuan’s teachings of the claimed "supervisory levels", "identifying operation patterns", "coordinating pruning decisions", "storing successful patterns", and "signal transmission pathways between network regions" is not unreasonable broad. Also, there are no details in the claims that further narrows the interpretation of "identifying operation patterns", "coordinating pruning decisions", "storing successful patterns", and "signal transmission pathways between network regions". The broadest reasonable interpretation based on the knowledge of a person having ordinary skill in the art of neural networks has been applied to map the instant claims.
On page 19 of the remarks the Applicant argued that “For the foregoing reasons, Claims 1-4, 6-13, and 15-18 are not anticipated by Yuan. Yuan discloses a fundamentally different system-a fixed hardware accelerator for executing pre- pruned networks, and does not teach: 1. A hierarchical supervisory system monitoring neural network operation through multiple supervisory levels (Yuan has memory hierarchy for storage, not supervisory monitoring) 2. Identifying operation patterns through supervisory monitoring (Yuan selects among pre- defined modes using fixed thresholds) 3. Coordinating pruning decisions (Yuan processes pre-pruned networks and makes no pruning decisions) 4. A meta-supervisory system that tracks supervisory behavior patterns, stores successful modifications, and extracts generalizable principles (Yuan has no supervisory behavior to track and no learning capability) 5. Managing signal transmission pathways between non-adjacent network regions with signal modification and temporal coordination (Yuan's hardware router connects components within a PE, not network regions)”.
The arguments are not persuasive as they are repeated arguments which have been responded to above with various explanations about how the claimed limitations are taught by Yuan.
Further, on page 19, the Applicant argued that “The Examiner's rejection relies on unreasonably broad interpretations that equate memory architecture with supervisory systems, mode selection with pattern identification, discussion of pruning benefits with decision coordination, data compression with pattern storage, and hardware interconnects with network pathway management. Under proper claim construction, Yuan does not anticipate the claimed invention. The remaining dependent claims are allowable by virtue of their dependency on allowable base claims. Withdrawal of the rejection is respectfully requested”.
The Applicant’s arguments are not persuasive because the rejections of the instant claims are reasonable interpretations based on the teachings of the prior art of record. As a result, the instant claims have been properly rejected based on the teachings of the prior art, and are therefore not allowable.
On page 20 of the remarks the Applicant argued that “Since independent Claims 1 and 10 are patentable, any claims dependent upon these independent claims are patentable, at least by the virtue of their dependency. Therefore, Claims 4 and 5 are patentable. Accordingly, Applicant respectfully requests that the rejection of Claim 4 and 5 be withdrawn”.
The Applicant’s arguments are not persuasive, and all the independent and dependent claims are already taught by the prior art of record, and are therefore not allowable.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
3. Claims 1-18 are rejected under 35 U.S.C 101 because the claimed invention is directed towards an abstract idea without significantly more.
Step 1
Independent claim 1 is directed to a system, and falls into one of the four statutory categories.
Step 2A, Prong 1
Claim 1 recites the following abstract ideas:
monitoring the neural network through multiple supervisory levels (Mental process directed to the observation of a neural network),
identifies operation patterns (Mental process directed to observing and making a judgement to identify patterns of the network),
detects network sparsity (Mental process directed to observing and making a judgement to detect any network sparsity),
coordinates pruning decisions (Mental process directed to observing and making a judgement on whether to prune or not), and
manages resource redistribution (Mental process directed to observing and making a judgement on the distribution of resources);
manage signal transmission pathways (Mental process directed to observing and making a judgement on when to provide connections between non-adjacent regions of the network).
Step 2A, Prong 2
Claim 1 recites the following additional elements:
operate a neural network comprising interconnected nodes arranged in layers (this limitation is directed to mere instruction to apply a judicial exception. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(f));
implement a hierarchical supervisory system (this limitation is directed to mere instruction to apply a judicial exception. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(f))
wherein the hierarchical supervisory system collects activation data (this limitation is directed to insignificant extra-solution activity of data gathering. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(g)),
implements architectural changes (this limitation is directed to mere instruction to apply a judicial exception. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(f)),
implement a meta-supervisory system that tracks supervisory behavior patterns, stores successful modification and pruning patterns, and extracts generalizable principles (this limitation is directed to mere instruction to apply a judicial exception. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(f)); and
providing direct connections between non-adjacent network regions with signal modification and temporal coordination during transmission (this limitation is directed to linking the use of a judicial exception to a particular technological environment or field of use. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(h)).
Step 2A, Prong 2
Claim 1 recites the following additional elements:
operate a neural network comprising interconnected nodes arranged in layers (this limitation is directed to mere instruction to apply a judicial exception. This does not amount to significantly more than judicial exception. See MPEP 2106.05(f));
implement a hierarchical supervisory system (this limitation is directed to mere instruction to apply a judicial exception. This does not amount to significantly more than judicial exception. See MPEP 2106.05(f))
wherein the hierarchical supervisory system collects activation data (this limitation is directed to insignificant extra-solution activity of data gathering and it is well understood routine and conventional. This does not amount to significantly more than judicial exception. See MPEP 2106.05(d)(II), example i),
implements architectural changes (this limitation is directed to mere instruction to apply a judicial exception. This does not amount to significantly more than judicial exception. See MPEP 2106.05(f)),
implement a meta-supervisory system that tracks supervisory behavior patterns, stores successful modification and pruning patterns, and extracts generalizable principles (this limitation is directed to mere instruction to apply a judicial exception. This does not amount to significantly more than judicial exception. See MPEP 2106.05(f)); and
providing direct connections between non-adjacent network regions with signal modification and temporal coordination during transmission (this limitation is directed to linking the use of a judicial exception to a particular technological environment or field of use. This does not amount to significantly more than judicial exception. See MPEP 2106.05(h)).
4. Dependent claim 2 is directed to a system, and falls into one of the four statutory categories.
Claim 2 recites the following abstract ideas:
detects network sparsity using thresholds that adapt based on neural network state (Mental process directed to observing and making a judgement by using the threshold to detect network sparsity).
Claim 2 recites the following additional elements:
wherein the hierarchical supervisory system (this limitation is directed to mere instruction to apply to a generic computing component. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(f))
Claim 2 recites the following additional elements:
wherein the hierarchical supervisory system (this limitation is directed to mere instruction to apply to a generic computing component. This does not amount to significantly more than judicial exception. See MPEP 2106.05(f))
5. Dependent claim 3 is directed to a system, and falls into one of the four statutory categories.
Claim 3 do not recite any abstract ideas.
Claim 3 recite the following additional elements:
wherein the hierarchical supervisory system exchanges information about resource availability and network sparsity across the multiple supervisory levels (this limitation is directed to insignificant extra-solution activity of data transmission. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(g)).
Claim 3 recite the following additional elements:
wherein the hierarchical supervisory system exchanges information about resource availability and network sparsity across the multiple supervisory levels (this limitation is directed to insignificant extra-solution activity of data transmission and it is well understood routine and conventional. This does not amount to significantly more than judicial exception. See MPEP 2106.05(d)(II), example i).
6. Dependent claim 4 is directed to a system, and falls into one of the four statutory categories.
Claim 4 do not recite any abstract ideas.
Claim 4 recite the following additional elements:
wherein the meta-supervisory system maintains network stability while identifying patterns across implemented pruning decisions (this limitation is directed to mere instructions to implement a judicial exception. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(f)).
Claim 4 recite the following additional elements:
wherein the meta-supervisory system maintains network stability while identifying patterns across implemented pruning decisions (this limitation is directed to mere instructions to implement a judicial exception. This does not amount to significantly more than judicial exception. See MPEP 2106.05(f)).
7. Dependent claim 5 is directed to a system, and falls into one of the four statutory categories.
Claim 5 do not recite any abstract ideas.
Claim 5 recite the following additional elements:
wherein the hierarchical supervisory system establishes support pathways to enable reversal of architectural changes during pruning (this limitation is directed to mere instructions to implement a judicial exception. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(f)).
Claim 5 recite the following additional elements:
wherein the hierarchical supervisory system establishes support pathways to enable reversal of architectural changes during pruning (this limitation is directed to mere instructions to implement a judicial exception. This does not amount to significantly more than judicial exception. See MPEP 2106.05(f)).
8. Dependent claim 6 is directed to a system, and falls into one of the four statutory categories.
Claim 6 recite the following abstract ideas:
wherein the signal transmission pathways modify signal strengths based on observed transmission effectiveness and detected network sparsity (Mental process directed to modifying of signals based on observation of the transmission and the detection of the sparsity of the network).
Claim 6 do not recite ant additional element.
9. Dependent claim 7 is directed to a system, and falls into one of the four statutory categories.
Claim 7 do not recite any abstract ideas.
Claim 7 recites the following additional elements:
wherein the meta-supervisory system associates context identifiers with the stored modification and pruning patterns (this limitation is directed to mere instructions to implement a judicial exception. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(f)).
Claim 7 recites the following additional elements:
wherein the meta-supervisory system associates context identifiers with the stored modification and pruning patterns (this limitation is directed to mere instructions to implement a judicial exception. This does not amount to significantly more than judicial exception. See MPEP 2106.05(f)).
10. Dependent claim 8 is directed to a system, and falls into one of the four statutory categories.
Claim 8 do not recite any abstract ideas.
Claim 8 recites the following additional elements:
wherein the hierarchical supervisory system validates neural network performance during implementation of the architectural changes (this limitation is directed to linking the use of a judicial exception to a particular technological environment or field of use. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(h)).
Claim 8 recites the following additional elements:
wherein the hierarchical supervisory system validates neural network performance during implementation of the architectural changes (this limitation is directed to linking the use of a judicial exception to a particular technological environment or field of use. This does not amount to significantly more than judicial exception. See MPEP 2106.05(h)).
11. Dependent claim 9 is directed to a system, and falls into one of the four statutory categories.
Claim 9 do not recite any abstract ideas.
Claim 9 recites the following additional elements:
wherein the meta-supervisory system adapts future pruning decisions based on outcomes of previous architectural changes (this limitation is directed to mere instructions to implement a judicial exception. This does not integrate the abstract idea into a practical application. See MPEP 2106.05(f))
Claim 9 recites the following additional elements:
wherein the meta-supervisory system adapts future pruning decisions based on outcomes of previous architectural changes (this limitation is directed to mere instructions to implement a judicial exception. This does not amount to significantly more than judicial exception. See MPEP 2106.05(f))
12. Independent claim 10 is directed to a method, and falls into one of the four statutory categories.
With regards to claim 10, it is substantially similar to claim 1, and is rejected in the same manner and reasoning applying.
13. Dependent claim 11 is directed to a method, and falls into one of the four statutory categories.
With regards to claim 11, it is substantially similar to claim 2, and is rejected in the same manner and reasoning applying.
14. Dependent claim 12 is directed to a method, and falls into one of the four statutory categories.
With regards to claim 12, it is substantially similar to claim 3, and is rejected in the same manner and reasoning applying.
15. Dependent claim 13 is directed to a method, and falls into one of the four statutory categories.
With regards to claim 13, it is substantially similar to claim 4, and is rejected in the same manner and reasoning applying.
16. Dependent claim 14 is directed to a method, and falls into one of the four statutory categories.
With regards to claim 14, it is substantially similar to claim 5, and is rejected in the same manner and reasoning applying.
17. Dependent claim 15 is directed to a method, and falls into one of the four statutory categories.
With regards to claim 15, it is substantially similar to claim 6, and is rejected in the same manner and reasoning applying.
18. Dependent claim 16 is directed to a method, and falls into one of the four statutory categories.
With regards to claim 16, it is substantially similar to claim 7, and is rejected in the same manner and reasoning applying.
19. Dependent claim 17 is directed to a method, and falls into one of the four statutory categories.
With regards to claim 17, it is substantially similar to claim 8, and is rejected in the same manner and reasoning applying.
20. Dependent claim 18 is directed to a method, and falls into one of the four statutory categories.
With regards to claim 18, it is substantially similar to claim 9, and is rejected in the same manner and reasoning applying.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
21. Claims 1-4, 6-13 and 15-18 are rejected under 35 U.S.C 102(a)(1) as being anticipated by Yuan et al. ("STICKER: An energy-efficient multi-sparsity compatible accelerator for convolutional neural networks in 65-nm CMOS." IEEE Journal of Solid-State Circuits 55.2 (2019): 465-477)
Regarding claim 1, Yuan teaches a computer system comprising a hardware memory (The hardware hierarchical memory design is first introduced, pg. 469, right col, second para.),
wherein the computer system is configured to execute software instructions stored on nontransitory machine-readable storage media (The instructions are stored in the instruction memory in the reduced instruction-set computer (RISC) controller, pg. 469, left col., second to the last para.) that:
operate a neural network comprising interconnected nodes arranged in layers (In this accelerator, NNs are processed layer by layer, pg. 471, left col., last para.);
implement a hierarchical supervisory system (Fig. 4. High-level architecture overview of STICKER. It contains an online sparsity adaptor, a multi-mode hierarchical data memory, and a various sparsity-supported convolution PE Arrays, pg. 468, left col.) monitoring the neural network (The online sparsity adaptor introduced in Section IV lets STICKER treat different sparsity situations in different modes. It monitors the activations sparsity online and changes the mode of the chip based on activations/weights sparsity (WS), pg. 468, left col., second para.) through multiple supervisory levels (The top-level architecture of the STICKER system is shown in Fig. 4. The activations and weights are fetched from off-chip memory to the on-chip multi-mode hierarchical data memory through a direct memory access (DMA). Then, the various sparsity-supported convolution PE arrays fetch activations and weights from the on-chip memory and does convolution operations in different sparsity modes. Then, the results go through the online sparsity adaptor to be encrypted into different formats and written into the on-chip data memory or off-chip external memory, pg. 468, left col., second para.).
wherein the hierarchical supervisory system collects activation data (The activations and weights are fetched from off-chip memory to the on-chip multi-mode hierarchical data memory through a direct memory access (DMA), pg. 467, right col., last para.),
identifies operation patterns (Then, the various sparsity-supported convolution PE arrays fetch activations and weights from the on-chip memory and does convolution operations in different sparsity modes, pg. 467, right col., last para.; The Examiner notes the sparsity modes are the operation patterns),
implements architectural changes (the number of neuron in neural network architecture changes after pruning operation, Fig. 2, pg. 466),
detects network sparsity (The whole sparsity adaptive control/data flow shown in Fig. 5 treats different sparsity situations as different modes. We get activations mode (AM) from the sparsity adaptor and the weights mode (WM) from the offline analysis. Then convolutional operations are processed in nine different modes (three AMs × three WMs). Later, output activations go through the zero detector. They are classified into three different modes based on two thresholds given by users (TH1 and TH2), pg. 468, left col., last para.),
coordinates pruning decisions (Compared with the original dense storage format, this article can reduce the DRAM access by 1.81×–5.18× except the first convolution layer. Although the first layer cannot be efficiently pruned, other convolution layers can benefit from this format, pg. 471, left col., first para.), and
manages resource redistribution (To improve the instruction parallelism, different parts of functional units can work independently controlled by instructions. The controller will distribute the next instruction if it does not have a collision with the current instruction. In this way, other instructions can be hidden into CONV instructions, pg. 469, right col., first para.);
implement a meta-supervisory system that tracks supervisory behavior patterns
(As shown in Fig. 11, the 16 × 16 PE array architecture does convolution operations with high memory storage and fetch efficiency. In order to improve on-chip storage efficiency, the PE array directly processes networks in the multi-sparsity compatible storage format, pg. 471, left col., second to the last para.; …the adaptive encoder will fetch activations from the adapter buffer and encode them into different storage formats based on their sparsity for better storage efficiency, pg. 468, right col., last sentence to pg. 469, left col., first paragraph),
stores successful modification and pruning patterns (This article stores network layers with a different format based on sparsity. After pruning, most convolution layers are sparse. Storing non-zero data with their indexes are smaller than storing raw data with zeros, pg. 474, left col., first full para.), and
extracts generalizable principles (Convolutional layers are used to extract features and fully connected layers are used for classification. Convolutional layers occupy most of the computation time (pg. 466, Fig. 1); A breakdown of a PE is shown in Fig. 14. The data are extracted after post-place and route simulations, pg. 472, right col., last para.); and
manage signal transmission pathways providing direct connections between non-adjacent network regions (MUL (multiplier) and memory bank are non-adjacent directly connected by router) with signal modification and temporal coordination during transmission (The router is used to dispatch data and control congestion. It is implemented with several MUXs and simple logic to avoid large latency overhead as shown in Fig. 11(b). After all convolutions are finished, a partial sum in ACC buffers in different sets will be summed up in one clock cycle to get the final convolution results, pg. 472, left col., first para. The Examiner notes the clock cycle involves temporal coordination because a clock cycle is the basic unit of time in a computer’s central processing unit).
Regarding claim 2, Yuan teaches the computer system of claim 1, Yuan teaches wherein the hierarchical supervisory system detects network sparsity using thresholds that adapt based on neural network state (The whole sparsity adaptive control/data flow shown in Fig. 5 treats different sparsity situations as different modes. We get activations mode (AM) from the sparsity adaptor and the weights mode (WM) from the offline analysis. Then convolutional operations are processed in nine different modes (three AMs × three WMs). Later, output activations go through the zero detector. They are classified into three different modes based on two thresholds given by users (TH1 and TH2), pg. 468, left col., last para.).
Regarding claim 3, Yuan teaches the computer system of claim 1, Yuan teaches wherein the hierarchical supervisory system exchanges information about resource availability and network sparsity across the multiple supervisory levels (For software optimization, a data schedule method is adopted to reduce possible collisions in the 2-way set-associative PEs when activations are in sparse mode….The scheduled results will be the input feature maps of the next layer without many collisions. An example is shown in Fig. 13(d). After this schedule flow, Data 2 and Data 3 are switched and all collisions in set0 and set1 are reduced, pg. 472, right col., second to the last para.; The Examiner notes Data 2 and Data 3 are exchanged).
Regarding claim 4, Yuan teaches the computer system of claim 1, Yuan teaches wherein the meta-supervisory system maintains network stability while identifying patterns (Weights after Pruning, Table 1, 467) across implemented pruning decisions (Weight pruning results on Alexnet Convolutional Layers Without Accuracy Loss, Table 1, 467, left col., The Examiner notes without accuracy loss indicates network stability).
Regarding claim 6, Yuan teaches the computer system of claim 1, Yuan teaches wherein the signal transmission pathways modify signal strengths based on observed transmission effectiveness and detected network sparsity (A multi-sparsity control and data flow with an online sparsity adaptor. It can detect the sparsity of activations online and switch the chip state among nine different sparse modes, (pg. 466, left col., second para.); The whole multi-sparsity control and data flow are controlled by instructions … If the instruction number for one task is too large, the chip needs to be frequently blocked to transmit instructions between DRAM and on-chip instruction memory, pg. 469, left col., second to the last para.; The Examiner notes blocking the chip modifies signal strength to enable signal transmission of instructions).
Regarding claim 7, Yuan teaches the computer system of claim 1, Yuan teaches wherein the meta-supervisory system associates context identifiers with the stored modification and pruning patterns (This article stores network layers with a different format based on sparsity. After pruning, most convolution layers are sparse. Storing non-zero data with their indexes are smaller than storing raw data with zeros, pg. 474, left col., first para.; The Examiner notes storing with indexes is a context identifier that identifies the context of non-zero data).
Regarding claim 8, Yuan teaches the computer system of claim 1, Yuan teaches wherein the hierarchical supervisory system validates neural network performance during implementation of the architectural changes (We test network models with different sparsity levels to show its influence. All models run the 14 × 14 feature maps with 3 × 3 kernels. These models are generated with different weights and activations sparsity. The peak energy efficiency is shown in Fig. 17. The sparser networks will lead to higher energy efficiency due to the skipping of unnecessary convolution operations, pg. 474, right col., last para.).
Regarding claim 9, Yuan teaches the computer system of claim 1, Yuan teaches wherein the meta-supervisory system adapts future pruning decisions based on outcomes of previous architectural changes (The online sparsity adaptor introduced in Section IV lets STICKER treat different sparsity situations in different modes. It monitors the activations sparsity online and changes the mode of the chip based on activations/weights sparsity (WS) (pg. 468, left col., second para.); To address these challenges, we have designed a CNN accelerator in this article, called STICKER, pg. 466, left col., second para.).
Regarding claim 10, claim 10 is similar to claim 1. It is rejected in the same manner and reasoning applying.
Regarding claim 11, claim 11 is similar to claim 2. It is rejected in the same manner and reasoning applying.
Regarding claim 12, claim 12 is similar to claim 3. It is rejected in the same manner and reasoning applying.
Regarding claim 13, claim 13 is similar to claim 4. It is rejected in the same manner and reasoning applying.
Regarding claim 15, claim 15 is similar to claim 6. It is rejected in the same manner and reasoning applying.
Regarding claim 16, claim 16 is similar to claim 7. It is rejected in the same manner and reasoning applying.
Regarding claim 17, claim 17 is similar to claim 8. It is rejected in the same manner and reasoning applying.
Regarding claim 18, claim 18 is similar to claim 9. It is rejected in the same manner and reasoning applying.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
23. Claims 5 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Yuan et al. ("STICKER: An energy-efficient multi-sparsity compatible accelerator for convolutional neural networks in 65-nm CMOS." IEEE Journal of Solid-State Circuits 55.2 (2019): 465-477) in view of Abraham et al. ("Back to the Future: Reversible Runtime Neural Network Pruning for Safe Autonomous Systems." 2024 Design, Automation & Test in Europe Conference & Exhibition (25 March 2024). IEEE, 2024).
Regarding claim 5, Yuan teaches the computer system of claim 1, Yuan does not explicitly teach wherein the hierarchical supervisory system establishes support pathways to enable reversal of architectural changes during pruning.
Abraham teaches wherein the hierarchical supervisory system establishes support pathways to enable reversal of architectural changes during pruning (Our approach allows the pruned model to quickly revert to the full model when unsafe behavior is detected, pg. 6, right col, first para.).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Yuan to incorporate the teachings of Abraham for the benefit of enhancing safety and reliability, and providing seamless reversion to the accurate version of the model, demonstrating its applicability for safe autonomous systems design (Abraham, abstract)
Regarding claim 14, claim 14 is similar to claim 5. It is rejected in the same manner and reasoning applying.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michelle T Bechtold can be reached on (571) 431-0762. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/M.G./Examiner, Art Unit 2148
/MICHELLE T BECHTOLD/Supervisory Patent Examiner, Art Unit 2148