DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claims 1 – 20 are presented for examination.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 5, 8-10, 14, 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 2021/0072410 A1; pub. Mar. 11, 2021) in view of Mibuka et al. (US 2023/0121993 A1; pub. Apr. 20, 2023).
Regarding claim 1, Yu et al. disclose: A biased detector sub-module (fig.4), comprising:
a photoelectric conversion array (fig.4 items 422 & 423), arranged in an X direction and a Z direction, wherein a plurality of biased detector sub-modules (fig.2-5 item 42) are stacked in the Z direction to form a detector module (fig.6A – 6C items 42);
a biased analog-to-digital converter (fig.4 item 424) electrically connected to the photoelectric conversion array; and
a substrate comprising a mounting substrate (fig.5 item 421)
wherein the photoelectric conversion array (fig.5 items 423 & 422) and the biased analog-to-digital converter (fig.5 items 423 & 424) are sequentially disposed in the Z direction at a side of the mounting substrate (fig.5 item 421), the biased analog-to-digital converter (fig.5 item 424) is adjacent to an end portion of the mounting substrate (fig.5 item 421).
Yu et al. are silent about: a substrate comprising a mounting substrate and a circuit connection substrate stacked in a Y direction, the circuit connection substrate being electrically connected to the biased analog-to-digital converter,
wherein the photoelectric conversion array and the biased analog-to-digital converter are sequentially disposed in the Z direction at a side of the mounting substrate facing away from the circuit connection substrate, the biased analog-to-digital converter is adjacent to an end portion of the mounting substrate overlapping with the circuit connection substrate, and a part of the mounting substrate that is not overlapped with the circuit connection substrate is configured to be stacked on an adjacent biased detector sub-module.
In a similar field of endeavor Mibuka et al. disclose: a substrate comprising a mounting substrate (fig.6 item 2) and a circuit connection substrate (fig.6 item 4a) stacked in a Y direction, the circuit connection substrate being electrically connected to the biased analog-to-digital converter (fig.6 item 4c(4b)), the analog-to-digital converter is adjacent to the mounting substrate overlapping with the circuit connection substrate, and a part of the mounting substrate that is not overlapped with the circuit connection substrate (fig.6 the mounting substrate 2 is longer than the connection substrate 4a) motivated by the benefits for increased detector fill factor.
In light of the benefits for increased detector fill factor, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Yu et al. with the teachings of Mibuka et al.
Regarding claim 5, Yu et al. disclose: a protective plate (fig.5 item 43) disposed at a side of the biased analog-to-digital converter (fig.5 item 424) facing away from the circuit connection substrate and configured to shield radiation.
Regarding claim 8, Mibuka et al. disclose: a connector (fig.6 item 2e1, 2e2) electrically connected to the circuit connection substrate (fig.6 item 4a); the connector is a rigid member or a flexible member, and the connector and the circuit connection substrate form a rigid-flex board motivated by the benefits for increased detector fill factor.
Regarding claim 9, Yu et al. disclose: the biased analog-to-digital converter (fig.4 & 5 item 424) and the photoelectric conversion array (fig.4 & 5 item 422 & 423) are disposed at a same chip.
Regarding claim 10, Yu et al. and Mibuka et al. disclose: A detector module, comprising: a module support; and a plurality of biased detector sub-modules, the plurality of biased detector sub-modules being mounted at the module support and sequentially arranged in a Z direction; wherein the plurality of biased detector sub-modules comprise at least two biased detector sub-modules sequentially stacked in the Z direction, and for two adjacent biased detector sub-modules that are stacked, a part of the mounting substrate of one of the two adjacent biased detector sub-modules that is not overlapped with the circuit connection substrate is stacked on the circuit connection substrate of the other of the two adjacent biased detector sub-modules, and wherein each of the biased detector sub-modules comprises: a photoelectric conversion array arranged in an X direction and the Z direction; a biased analog-to-digital converter electrically connected to the photoelectric conversion array; and a substrate comprising a mounting substrate and a circuit connection substrate stacked in a Y direction, the circuit connection substrate being electrically connected to the biased analog-to-digital converter, wherein the photoelectric conversion array and the biased analog-to-digital converter are sequentially disposed in the Z direction at a side of the mounting substrate facing away from the circuit connection substrate, the biased analog-to-digital converter is adjacent to an end portion of the mounting substrate overlapping with the circuit connection substrate, and a part of the mounting substrate that is not overlapped with the circuit connection substrate is configured to be stacked on an adjacent biased detector sub-module (the claim contains the same substantive limitations as claim 1, therefore, the claim is rejected on the same basis).
Regarding claim 14, Yu et al. disclose: the biased detector sub-module further comprises a protective plate disposed at a side of the biased analog-to-digital converter facing away from the circuit connection substrate and configured to shield radiation (the claim is rejected on the same basis as claim 5).
Regarding claim 17, Mibuka et al. disclose: the biased detector sub-module further comprises a connector electrically connected to the circuit connection substrate; the connector is a rigid member or a flexible member, and the connector and the circuit connection substrate form a rigid-flex board (the claim is rejected on the same basis as claim 8).
Regarding claim 18, Yu et al. disclose: the biased analog-to-digital converter and the photoelectric conversion array are disposed at a same chip (the claim is rejected on the same basis as claim 9).
Regarding claim 19, Yu et al. and Mibuka et al. disclose: A detector, comprising a housing and a plurality of detector modules; wherein the plurality of the detector modules are arranged in parallel at the housing in an X direction, and each of the detector modules comprises: a module support; and a plurality of biased detector sub-modules, the plurality of biased detector sub-modules being mounted at the module support and sequentially arranged in a Z direction; wherein the plurality of biased detector sub-modules comprise at least two biased detector sub-modules sequentially stacked in the Z direction, and for two adjacent biased detector sub-modules that are stacked, a part of the mounting substrate of one of the two adjacent biased detector sub-modules that is not overlapped with the circuit connection substrate is stacked on the circuit connection substrate of the other of the two adjacent biased detector sub-modules, and wherein each of the biased detector sub-modules comprises: a photoelectric conversion array arranged in the X direction and the Z direction; a biased analog-to-digital converter electrically connected to the photoelectric conversion array; and a substrate comprising a mounting substrate and a circuit connection substrate stacked in a Y direction, the circuit connection substrate being electrically connected to the biased analog-to-digital converter, wherein the photoelectric conversion array and the biased analog-to-digital converter are sequentially disposed in the Z direction at a side of the mounting substrate facing away from the circuit connection substrate, the biased analog-to-digital converter is adjacent to an end portion of the mounting substrate overlapping with the circuit connection substrate, and a part of the mounting substrate that is not overlapped with the circuit connection substrate is configured to be stacked on an adjacent biased detector sub-module (the claim contains the same substantive limitations as claim 1, therefore, the claim is rejected on the same basis).
Regarding claim 20, Yu et al. disclose: a scanning frame, a radiation source, and the detector according to claim 19; wherein the scanning frame (fig1.A item 11) is configured to accommodate a scanning object (fig1.A item 14), the radiation source (fig1.A item 12) and the detector (fig1.A item 13) each are disposed at the scanning frame, the radiation source is configured to emit rays to the scanning object, and the detector is configured to receive rays attenuated by the scanning object.
Claims 2, 11 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 2021/0072410 A1; pub. Mar. 11, 2021) in view of Mibuka et al. (US 2023/0121993 A1; pub. Apr. 20, 2023) and further in view of Nomura et al. (US 2019/03433468 A1; pub. Nov. 14, 2019).
Regarding claim 2, Mibuka et al. disclose: the connection substrate partially overlaps with the mounting substrate (see rejection of claim 1).
The combined references are silent about: the photoelectric conversion array has a first tube end and a second tube end in the Z direction, and the biased analog-to-digital converter is located adjacent to the first tube end; the circuit connection substrate has a first substrate end and a second substrate end in the Z direction, and at least part of the biased analog-to-digital converter is located between the first substrate end and the second substrate end; and a distance L1 between the first substrate end and the first tube end in the Z direction and a distance L2 between the second substrate end and the second tube end in the Z direction satisfies L1<L2.
In a similar field of endeavor Nomura et al. disclose: a photoelectric conversion array (fig.2 items 112 & 113), a mounting substrate (fig.2 item 111), a connection substrate (fig.1B item 15) motivated by the benefits for increased detector fill factor.
In light of the benefits for increased detector fill factor, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Yu et al. and Mibuka et al with the teachings of Nomura et al. to have the photoelectric conversion array has a first tube end and a second tube end in the Z direction, and the biased analog-to-digital converter is located adjacent to the first tube end; the circuit connection substrate has a first substrate end and a second substrate end in the Z direction, and at least part of the biased analog-to-digital converter is located between the first substrate end and the second substrate end; and a distance L1 between the first substrate end and the first tube end in the Z direction and a distance L2 between the second substrate end and the second tube end in the Z direction satisfies L1<L2. Since the combined teachings of Yu et al., Mibuka et al and Nomura et al. show that the positional relationship between the mounting substrate, the connection substrate and the analog-to-digital converter is a matter of design choice.
Regarding claim 11, Yu et al., Mibuka et al and Nomura et al. disclose: the photoelectric conversion array has a first tube end and a second tube end in the Z direction, and the biased analog-to-digital converter is located adjacent to the first tube end; the circuit connection substrate has a first substrate end and a second substrate end in the Z direction, and at least part of the biased analog-to-digital converter is located between the first substrate end and the second substrate end; and a distance L1 between the first substrate end and the first tube end in the Z direction and a distance L2 between the second substrate end and the second tube end in the Z direction satisfies L1<L2 (the claim is rejected on the same basis as claim 2).
Claims 3-4, 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 2021/0072410 A1; pub. Mar. 11, 2021) in view of Mibuka et al. (US 2023/0121993 A1; pub. Apr. 20, 2023) in view of Nomura et al. (US 2019/03433468 A1; pub. Nov. 14, 2019) and further in view of Henderson et al. (US 2019/0137635 A1; pub. May 9, 2019).
Regarding claim 3, the combined references are silent about: the mounting substrate is made of a high-rigidity material.
In a similar field of endeavor Henderson et al. disclose: the mounting substrate is made of a high-rigidity material (para. [0098]) motivated by the benefits for a rigid detector.
In light of the benefits for a rigid detector, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Yu et al., Mibuka et al. and Nomura et al. with the teachings of Henderson et al.
Regarding claim 4, Henderson et al. disclose: the mounting substrate is a ceramic substrate or a stainless steel substrate; and a dimension W1 of the mounting substrate in the Y direction satisfies 0.2 mm <W1< 2.5 mm (para. [0098]) motivated by the benefits for a rigid detector.
Regarding claim 12, Yu et al., Mibuka et al., Nomura et al. and Henderson et al. disclose: the mounting substrate is made of a high-rigidity material (the claim is rejected on the same basis as claim 3).
Regarding claim 13, Yu et al., Mibuka et al., Nomura et al. and Henderson et al. disclose: the mounting substrate is a ceramic substrate or a stainless steel substrate; and a dimension W1 of the mounting substrate in the Y direction satisfies 0.2 mmSW1S 2.5 mm (the claim is rejected on the same basis as claim 4).
Allowable Subject Matter
Claims 6-7, 15-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claims 6 & 15, the prior arts alone or in combination fail to teach, disclose, suggest or render obvious: the biased analog-to-digital converter is provided with a power connection portion electrically connected to the circuit connection substrate at an end of the biased analog-to-digital converter away from the photoelectric conversion array; the protective plate has an avoidance groove configured to avoid the power connection portion.
Claims 7 & 16 would be allowable on the same basis as claims 6 & 15 respectively for dependency reasons.
Conclusion
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/MAMADOU FAYE/Examiner, Art Unit 2884
/UZMA ALAM/Supervisory Patent Examiner, Art Unit 2884
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