Prosecution Insights
Last updated: August 06, 2026
Application No. 19/061,192

MESH DECODING DEVICE, MESH DECODING METHOD, AND PROGRAM

Final Rejection §103
Filed
Feb 24, 2025
Priority
Dec 28, 2022 — JP 2022-212378 +1 more
Examiner
KALAPODAS, DRAMOS
Art Unit
2487
Tech Center
2400 — Computer Networks
Assignee
KDDI Corporation
OA Round
2 (Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
10m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
585 granted / 736 resolved
+21.5% vs TC avg
Strong +27% interview lift
Without
With
+26.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
10 currently pending
Career history
759
Total Applications
across all art units

Statute-Specific Performance

§101
5.3%
-34.7% vs TC avg
§103
58.9%
+18.9% vs TC avg
§102
15.3%
-24.7% vs TC avg
§112
18.3%
-21.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 736 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Status 2. Claims 1-10 are currently pending Response to Arguments 3. Applicant’s arguments with respect to claims 1-10, have been considered but are moot in view of the new ground(s) of rejection. Applicants’ Argument (i) The argument in chief relies on the presented in the Remarks of 05/11/2026, citing; “With respect to Kim et al, the Examiner identifies only general descriptions relating to mesh decoding, patches, subdivision, and inverse quantization (Office Action, pages 4-6). Kim et al does not make up for the deficiencies in the teachings of Mueller et al.”, but solely addressing Muller’s teachings without presenting a specific rationale by which Kim would have failed to represent a valid art to combine. To point (i) Examiner contends that as further established at the mapped evidence, both arts to Muller and Kim are considered pertinent, where Kim expressly teaches in detail every limitation recited at the independent claims, to be considered as similarly applied in rebuttal to the arguments according to the re-mapped claims, mutatis mutandis. Also, as a matter of process it is emphasized that, in response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application does not currently name joint inventors. 4. Claims 1-10, are rejected under 35 U.S.C. 103 as being unpatentable as being obvious over Joerg Muller et al., (hereinafter Muller) “Shading Atlas Streaming”; Graz University of Technology, 2018 in view of Kim Jungsun et al., (hereinafter Kim ) (WO 2023/172509A1). Re Claim 1. (Currently Amended) Muller discloses, a mesh decoding device comprising a circuit (a mesh decoding at a client unit 6, of Fig.2, of atlas frames Sec.3 (5)), wherein the circuit: decodes an atlas bit stream (decoding the video stream, i.e., bitstream, obtained from the network stage (5a) unit 4, and outputs atlas frames (5a) and meta-information (5b) in Fig.2, Sec.3 (5)) and output outputs patch (outputting decoded patches at the visibility stage, Fig.4 or Fig.6, Sec.3.1, and Sec.4.1, e.g., as patch visibility sets (PVS)) information and frame information (containing information e.g., patch id, for each triangle, and each patch containing a record on a block sub-division in the atlas, Sec.4.1, where the frames are part of the atlas representation, Sec.4, or 4.1 or 4.2, comprising multiple I-frames and P-frames information at Sec.4.2 as part of the atlas, per Sec.4.1 as well the meta-information (5b) in Fig.2, Sec.3 (5)), However, the skilled in the art would have recognized that each patch containing a record of a block sub-division as part of the frame and the atlas mesh data, which is identified by a, patch id for each triangle per Sec.4.1, would be obvious to interpret as representing a Patch Data Unit (PDU) as further disclosed. In an analogous art, Kim expressly teaches the decoding process of a video dynamic mesh v-DMC at Fig.43, Par.[0045] and (de)coding from a bitstream, Par.[0005, 0054] and Fig.5, as being signaled by specific syntax i.e., information from a parameter set, and mesh data, geometry, atlas data and attribute video sub-streams, including the base mesh subdivision, at Fig.11, Par.[0062, 00111] based on decoded atlas data, along with mesh parameterization in patches, per Fig.22 Par.[0027, 00110, 00122] and; decodes an atlas bit stream (decodes the atlas data sub-bitstream at units 3206-3208, in Fig.32, Par.[00154-00155]) and output outputs patch information (outputting patch data, as patch_information_data(), Par.[00288-00289]) and frame (and frame information corresponding to area in geometry video frame vertex coordinates, midu_geometry_2d_pos_x, and the midu_geometry_2d_pos_y, at least at Par.[00380]) information (at a mesh decoder 103, Par.[0060] and per Fig.32 receiving a video mesh bitstream as an atlas data sub-bitstream at unit 3206, to be decoded at unit 3208, Abstract and mesh patches in Fig.22 Par.[0027, 00110] being sub-divided based on mesh information Par.[00111], and outputted as corresponding patches, per Fig.35 Par.[0040]), wherein the atlas bit stream includes a patch data unit (PDU) (the atlas sub-bitstream includes the patch data unit (PDU) at Par.[00284) corresponding to each patch (according to the patch P(i,j) patch-index, j, information Par.[00140-00141]), and the patch information is obtained by decoding the PDU (where the paths information is derived from the patchIdx, signaled by the mesh_merge_data_unit(tileID, patchId) and specifically obtained from the reference index of the respective subdivided tile, variable as defined by mmdu_ref_patch_index[tileID][patchIdx], Par.[00390] at code table line 3, Pg. 96 for the Inter Patch Data Unit, Par.[00375]); changes a subdivision method based on the patch information and the frame information (changing the sub-division scheme/iteration counts corresponding to the patch information, Par.[0063, 0085, 00412]), wherein the patch information includes a control signal designating a type of the subdivision method of a base mesh (the mesh subdivided method is based on a control syntax, mdu_subdivision_enable_flag, at code table line 24 Pg.89 indicating the mdu_subdivision_method at code line 5 Pg.90, Par.[00343, 00409] or Par.[00414] (3), etc.) for each patch (for each patch based on information identifying the set of patches, P(i,j) by the frame index, i and a patch index j at Par.[00140-00141]); and changes an inverse quantization method based on the patch information (changing the quantization i.e., of the mesh resolution from one level of detail to another, Par.[0085] and reconstructing the mesh by inverse quantization at unit 1803, based on mesh/patch information, at unit 1808, Fig.18, Par.[0076-0077]). The skilled artisan would have found obvious before the effective filing date of invention to associate the common method of atlas video coding process found in Muller, by further finding a detailed and explicit disclosure according programming code syntax for the atlas subdivided mesh decoding along with the PDU subdivision applied and taught in the art to Kim, while seeking the advantage of mesh subdividing into patches, to be used in the coding process providing for lossless coding of boundary vertices (at Par.[0084]) along with the benefit of subdividing data into patches, by which improving the mesh coding efficiency per Par.[00104], hence considering such combination predictable. Re Claim 2. (Original) Muller and Kim disclose, the mesh decoding device according to claim 1, Kim teaches that, wherein the circuit calculates a subdivided vertex normal based on a method of calculating the subdivided vertex normal designated for each patch (for each vertex v, indicating a normal vector Nv, Par.[00112]) Re Claim 3. (Original) Muller and Kim disclose, the mesh decoding device according to claim 1, Kim teaches, wherein the circuit adjusts a subdivided mesh based on a subdivision adjustment method designated for each frame (subdivision scheme for mesh for each frame, per Fig.8, or 9 Par.[0057]). Re Claim 4. (Original) Muller and Kim disclose, the mesh decoding device according to claim 1, Kim teaches, wherein the mesh decoding unit includes an inverse quantization unit configured to perform inverse quantization of a displacement based on a quantization value designated for each patch (performing inverse quantization Fig.18, Par.[0076-0077] based on the displacement vector for each vertex corresponding to the subdivided mesh 603 i.e., patches per Fig.6, Par.[0056-0057, 0061]). Re Claim 5. (Original) Muller and Kim disclose, the mesh decoding device according to claim 1, Kim teaches, wherein the circuit performs inverse quantization of a displacement based on a quantization value for each subdivision level designated for each patch (performing inverse quantization by a value of the quantized frame 1001, Par.[0060] at mesh decoder 1003, Fig.17, on canonical coordinates decision made at the frame, patch group or patch level, Par.[0066]). Re Claim 6. (Currently Amended) This claim represents the mesh decoding method performing each and every limitation of the decoding device of claim 1, hence it is rejected on the same evidentiary premise, mutatis mutandis. Re Claim 7. (Currently Amended) This claim represents the program stored on a non-transitory computer- readable medium (Kim: at Par.[00450]) for causing a computer to function as a mesh decoding device, according to each and every limitation processed at the apparatus claim 1, hence it is rejected on the same evidentiary premise, mutatis mutandis. Re Claim 8. (New) Muller and Kim disclose, the mesh decoding device according to claim 1, Kim teaches, wherein the patch information further includes a control signal designating a number of base faces included for each patch (at Par.[00105]). Re Claim 9. (New) Muller and Kim disclose, the mesh decoding device according to claim 1, Kim teaches, wherein the patch information further includes a flag designating whether or not to perform subdivision for each patch (at the subdivision enable flag, flag afps_vmc_ext_subdivision_enable_flag syntax in code -table Lin. 16 and 22 or (16-22) on Pg.64, Par.[00256, 00260, 00275]). Re Claim 10. (New) Muller and Kim disclose, the mesh decoding device according to claim 1, Kim teaches, wherein the patch information further includes a flag designating whether or not to change a quantization value of a subdivided face for each subdivision level of the subdivided face for each patch (Par.[0060, 0075]). Conclusion 5. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVE J CZEKAJ. The examiner can normally be reached on 8-6:00 Monday-Thursday and every other Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Czekaj can be reached at (571)272-7327. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DRAMOS KALAPODAS/ Primary Examiner, Art Unit 2487
Read full office action

Prosecution Timeline

Feb 24, 2025
Application Filed
Feb 12, 2026
Non-Final Rejection mailed — §103
May 11, 2026
Response Filed
Jun 17, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
99%
With Interview (+26.6%)
2y 3m (~10m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 736 resolved cases by this examiner. Grant probability derived from career allowance rate.

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