DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claim 2, 4, and 5 were cancelled; therefore, Claims 1 and 3 are currently pending in application 19/061,212.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1 and 3 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 5 of US 11,989,737 B2; and over claim 1 and 6 of US 12,236,436 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because both of the claimed inventions disclose equivalent elements for determining the authenticity of a component.
19/061,212
US 11,989,737 B2
A method of determining the authenticity of a first component in an electronic device, the method comprising:
receiving a seed by a first component in the electronic device;
storing the seed in a block of non-volatile memory in the first component;
calculating, by the first component, the output of a cryptographic function F with the input based on the seed and storing the output in the block of non-volatile memory;
iteratively calculating, by the first component, the outputs of the cryptographic function wherein for each iteration the input for the cryptographic function F is based on the seed and all previous outputs, and for each iteration storing the output in the block of non-volatile memory; and
transmitting at least one of the calculated outputs.
The method of claim 1, comprising iteratively calculating, by the first component, the series of outputs of the cryptographic function F, wherein for each iteration the input for the cryptographic function is based on all previous outputs of the cryptographic function F, and wherein for each iteration the first component stores each output of the cryptographic function F in a block of non-volatile memory of the first component.
A method for determining the authenticity of a supply item in an imaging device, the method comprising:
receiving, by a supply item follower component in the supply item communicatively connected to an imaging device leader component in the imaging device, a seed;
storing the seed in a block of non-volatile memory in the supply item follower component;
calculating, by the supply item follower component, an output of a cryptographic function with the input based on the seed and storing the output in the block of non-volatile memory;
iteratively calculating, by the supply item follower component, the outputs of the cryptographic function wherein for each iteration the input for the cryptographic function is based on the seed and all previous outputs, and for each iteration storing the output in the block of non-volatile memory; and
determining the authenticity of the supply item based on a selected output of the cryptographic function of the supply item follower component, the selected output being one of the outputs stored in the block of non-volatile memory, the method further comprising: calculating, by an imaging device component in the imaging device, the output of the cryptographic function based on the seed in the same manner as the calculation by the supply item follower component, and storing the output in a block of non-volatile memory in the imaging device component; and iteratively calculating, by the imaging device component, the outputs of the cryptographic function wherein for each iteration the input for the cryptographic function is based on the seed and all previous outputs in the same manner as the calculation by the supply item follower component, and for each iteration storing the output in the block of non-volatile memory of the imaging device component, wherein the number of iterations of the calculation of the cryptographic function performed by the supply item follower component is the same as the number of iterations of the calculation of the cryptographic function performed by the imaging device component, and wherein determining the authenticity of the supply item comprises comparing the selected output of the cryptographic function of the supply item follower component with the corresponding output of the cryptographic function of the imaging device component to determine if they are the same.
5. The method of claim 1, wherein determining the authenticity of the supply item comprises: the imaging device component requesting the selected output from the supply item follower component; upon receiving the request from the imaging device component, the supply item follower component transmitting the selected output to the imaging device component; and the imaging device component comparing a threshold time with the total time taken to receive the selected output from the supply item follower component after the request from the imaging device component, wherein upon a determination that the total time is less than or equal to the threshold time, the supply item is identified as an authentic supply item, and wherein upon a determination that the total time is greater than the threshold time, the supply item is identified as a non-authentic supply item.
19/061,212
12,236,436
A method of determining the authenticity of a first component in an electronic device, the method comprising:
receiving a seed by a first component in the electronic device;
storing the seed in a block of non-volatile memory in the first component;
calculating, by the first component, the output of a cryptographic function F with the input based on the seed and storing the output in the block of non-volatile memory;
iteratively calculating, by the first component, the outputs of the cryptographic function wherein for each iteration the input for the cryptographic function F is based on the seed and all previous outputs, and for each iteration storing the output in the block of non-volatile memory; and
transmitting at least one of the calculated outputs.
The method of claim 1, comprising iteratively calculating, by the first component, the series of outputs of the cryptographic function F, wherein for each iteration the input for the cryptographic function is based on all previous outputs of the cryptographic function F, and wherein for each iteration the first component stores each output of the cryptographic function F in a block of non-volatile memory of the first component.
1. A method for determining the authenticity of a component in an electronic device, the method comprising:
receiving a seed by a component in the electronic device;
storing the seed in a block of non-volatile memory in the component;
calculating, by the component, the output of a cryptographic function with the input based on the seed and storing the output in the block of non-volatile memory;
iteratively calculating, by the component, the outputs of the cryptographic function wherein for each iteration the input for the cryptographic function is based on the seed and all previous outputs, and for each iteration storing the output in the block of non-volatile memory; and
determining the authenticity of the component based on a selected output of the cryptographic function F, the selected output being one of the outputs stored in the block of non-volatile memory; calculating, by a second component, the output of the cryptographic function with the input based on the seed in the same manner as the calculation by the component; and iteratively calculating, by the second component, the outputs of the cryptographic function wherein for each iteration the input for the cryptographic function is based on the seed and all previous outputs in the same manner as the calculation by the component, wherein the number of iterations of the calculation of the cryptographic function performed by the component is the same as the number of iterations of the calculation of the cryptographic function performed by the second component, and wherein determining the authenticity of the component comprises comparing the selected output of the cryptographic function of the component with the corresponding output of the cryptographic function of the second component to determine if they are the same.
6. The method of claim 1, wherein determining the authenticity of the component comprises: the second component requesting the selected output from the component; upon receiving the request from the second component, the component transmitting the selected output to the second component; and the second component comparing a threshold time with the total time taken to receive the selected output from the component after the request from the second component, wherein upon a determination that the total time is less than or equal to the threshold time, the component is identified as an authentic supply item, and wherein upon a determination that the total time is greater than the threshold time, the component is identified as a non-authentic supply item.
Claim Rejections – 35 USC §101
35 U.S.C. § 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1 and 3 are rejected under 35 U.S.C. § 101 because the claimed invention is directed to non-statutory subject matter, specifically an abstract idea.
Claims 1 and 3 are directed to a judicial exception (i.e., abstract idea), without providing a practical application, and without providing significantly more.
Under the 35 U.S.C. §101 subject matter eligibility two-part analysis, Step 1 addresses whether the claim is directed to one of the four statutory categories of invention, i.e., process, machine, manufacture, or composition of matter. See MPEP §2106.03. If the claim does fall within one of the statutory categories, it must then be determined in Step 2A [prong 1] whether the claim is directed to a judicial exception (i.e., law of nature, natural phenomenon, and abstract idea). See MPEP §2106.04. If the claim is directed toward a judicial exception, it must then be determined in Step 2A [prong 2] whether the judicial exception is integrated into a practical application. See MPEP §2106.04(d). Finally, if the judicial exception is not integrated into a practical application, it must additionally be determined in Step 2B whether the claim recites "significantly more" than the abstract idea. See MPEP §2106.05.
Examiner note: The Office’s 2019 Revised Patent Subject Matter Eligibility Guidance (2019 PEG) is currently found in the Ninth Edition, Revision 10.2019 (revised June 2020) of the Manual of Patent Examination Procedure (MPEP), specifically incorporated in MPEP §2106.03 through MPEP §2106.07(c).
Regarding Step 1,
Claims 1 and 3 are directed toward a process (method). Thus, all claims fall within one of the four statutory categories as required by Step 1.
Regarding Step 2A [prong 1],
Claims 1 and 3 are directed toward the judicial exception of an abstract idea. Independent claim 1 is directed specifically to the abstract idea of determining the authenticity of a component.
Regarding independent claim 1, the underlined limitations emphasized below correspond to the abstract ideas of the claimed invention:
A method of determining the authenticity of a first component in an electronic device, the method comprising:
receiving a seed by a first component in the electronic device; [Certain methods of organizing human activity/ Mental processes - Data acquisition / receiving information (generic receipt of electronic data without a specific, non-conventional technique)]
storing the seed in a block of non-volatile memory in the first component; [Certain methods of organizing human activity/ Mental processes - Data storage / record-keeping (abstract concept of saving information in a memory medium)]
calculating, by the first component, the output of a cryptographic function F with the input based on the seed and storing the output in the block of non-volatile memory; iteratively calculating, by the first component, the outputs of the cryptographic function wherein for each iteration the input for the cryptographic function F is based on the seed and all previous outputs, and for each iteration storing the output in the block of non-volatile memory; and [Mathematical calculation / mathematical operations (performing mathematical algorithms and deterministic functions step-by-step or iteratively)]
transmitting at least one of the calculated outputs. [Certain methods of organizing human activity - Data communication / transmitting information (generic concept of sending data from one point to another)]
As the underlined claim limitations above demonstrate, independent claim 1 is directed to the abstract idea of Mathematical concepts (mathematical relationships, mathematical formulas or equations, mathematical calculations); Mental processes (concepts performed in the human mind (including an observation, evaluation, judgment, or opinion)); and Certain methods of organizing human activity (fundamental economic principles or practices (including mitigating risk); commercial or legal interactions (including agreements in the form of contracts; legal obligations; advertising, marketing or sales activities or behaviors; business relations)).
Dependent claim 3 provides further details to the abstract idea of claim regarding the received data, therefore, these claims include mathematical concepts, mental processes, and certain methods of organizing human activities for similar reasons provided above for claim 1.
After considering all claim elements, both individually and in combination and in ordered combination, it has been determined that the claims do not amount to significantly more than the abstract idea itself.
Regarding Step 2A [prong 2],
Claims 1 and 3 fail to integrate the recited judicial exception into any practical application. The claims recite additional limitations which are hardware or software elements or particular technological environment, such as a first and second “component”, and a “block of non-volatile memory”. However, these limitations are not enough to qualify as “practical application” being recited in the claims along with the abstract idea since these limitations are merely invoked as a tool to perform instruction of an abstract idea in a particular technological environment and/or are generally linking the use of the abstract idea to a particular technological environment or field of use, and merely applying and abstract idea in a particular technological environment and merely limiting use of an abstract idea to a particular field or a technological environment do not provide practical application for an abstract idea (MPEP 2106.05 (f) & (h)). The claims do not amount to "practical application" for the abstract idea because they neither (1) recite any improvements to another technology or technical field; (2) recite any improvements to the functioning of the computer itself; (3) apply the judicial exception with, or by use of, a particular machine; (4) effect a transformation or reduction of a particular article to a different state or thing; (5) provide other meaningful limitations beyond generally linking the use of the judicial exception to a particular technological environment.
The relevant question under Step 2A [prong 2] is not whether the claimed invention itself is a practical application, instead, the question is whether the claimed invention includes additional elements beyond the judicial exception that integrate the judicial exception into a practical application by imposing a meaningful limit on the judicial exception. This is not the case with Applicant’s claimed invention. Automating the recited claimed features as a combination of computer instructions implemented by computer hardware and/or software elements as recited above does not qualify an otherwise unpatentable abstract idea as patent eligible. Examples where the Courts have found selecting a particular data source or type of data to be manipulated to be insignificant extra-solution activity include selecting information, based on types of information and availability of information in a power-grid environment, for collection, analysis and display, Electric Power Group, LLC v. Alstom S.A., 830 F.3d 1350, 1354-55, 119 USPQ2d 1739, 1742 (Fed. Cir. 2016); Applicant’s limitations as recited above do nothing more than supplement the abstract idea using additional hardware/software computer components as a tool to perform the abstract idea and generally link the use of the abstract idea to a technological environment, which is not sufficient to integrate the judicial exception into a practical application since they do not impose any meaningful limits. Dependent claim 3 merely incorporates the additional elements recited above, along with further embellishments of the abstract idea of independent claims respectively, but these features only serve to further limit the abstract idea of independent claims. Therefore, the additional elements recited in the claimed invention individually, and in combination fail to integrate the recited judicial exception into any practical application.
Regarding Step 2B,
Claims 1 and 3 fail to amount to “significantly more” than an abstract idea. The claims recite additional limitations which are hardware or software elements or particular technological environment, such as a first and second “component”, and a “block of non-volatile memory”. However, these limitations are not enough to qualify as “significantly more” being recited in the claims along with the abstract idea since these limitations are merely invoked as a tool to perform instruction of Abstract idea in a particular technological environment and/or are generally linking the use of the abstract idea to a particular technological environment or field of use, and merely applying and abstract idea in a particular technological environment and merely limiting use of an abstract idea to a particular field or a technological environment do not provide significantly more to an abstract idea (MPEP 2106.05(f) & (h)). The claims do not amount to "significantly more" than the abstract idea because they neither (1) recite any improvements to another technology or technical field; (2) recite any improvements to the functioning of the computer itself; (3) apply the judicial exception with, or by use of, a particular machine; (4) effect a transformation or reduction of a particular article to a different state or thing; (5) add a specific limitation other than what is well-understood, routine and conventional in the field; (6) add unconventional steps that confine the claim to a particular useful application; nor (7) provide other meaningful limitations beyond generally linking the use of the judicial exception to a particular technological environment.
Dependent claim 3 merely recites further additional embellishments of the abstract idea of independent claim 1, but these features only serve to further limit the abstract idea of independent claim 1; however, none of the dependent claims recite an improvement to a technology or technical field or provide any meaningful limits. The addition of another abstract concept to the limitations of the claims does not render the claim other than abstract. Under the Interim Guidance on Patent Subject Matter Eligibility (PEG 2019), it specifically states that narrowing an abstract idea of claims do not resolve the claims of being "significantly more" than the abstract idea. Thus, the additional elements in the dependent claims only serve to further limit the abstract idea utilizing the computer components as a tool and/or generally link the use of the abstract idea to a particular technological environment.
Therefore, since there are no limitations in the claims 1 and 3 that transform the exception into a patent eligible application such that the claims amount to significantly more than the exception itself, and looking at the limitations as a combination and as an ordered combination adds nothing that is not already present when looking at the elements taken individually, claims 1 and 3 are rejected under 35 USC § 101 as being directed to non-statutory subject matter under 35 U.S.C. § 101.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bush et al. (US 2020/0004476 A1).
As per independent Claim 1, Bush discloses a method of determining the authenticity of a first component in an electronic device (Example embodiments of the present disclosure provide example methods that may be implemented in an imaging device or system to set addresses of a plurality of components or slave devices, such as supply devices to thwart the use of unauthorized components as replacements for authorized components, Para 0010; FIG. 4 shows a flowchart illustrating one example embodiment of a method 400 of changing and/or setting the addresses of supply devices 300 in shared bus system 200, Para 0046), the method comprising:
receiving a seed by a first component in the electronic device (At block 415, each supply device 300a - 300n may use the initialization vector with a key to calculate a seed for a pseudorandom number generation algorithm implemented by address generator 355, Para 0048; an imaging device or system to set addresses of a plurality of components or slave devices, such as supply devices, Para 0010; At block 420. each supply device 300a-300n may initialize the PRNG state with the seed (e.g., state0=seed). Thereafter, the 256-bit PRNG state may be updated using 256-bit SHA-2 based upon the previous PRNG state (e.g., state1 = SHA256(statei-1)) each time random data is needed, such as when new addresses for supply devices 300 are requested, Para 0049);
storing the seed in a block of non-volatile memory in the first component (At block 425, each supply device 300 may initialize and fill address array A of storage unit 360 with the default addresses, Para 0050; Default addresses for supply devices 300 may be retrieved from a non-volatile memory (not shown), Para 0046);
calculating, by the first component, the output of a cryptographic function F with the input based on the seed and storing the output in the block of non-volatile memory (At block 415, each supply device 300a - 300n may use the initialization vector with a key to calculate a seed for a pseudorandom number generation algorithm implemented by address generator 355, Para 0048; an imaging device or system to set addresses of a plurality of components or slave devices, such as supply devices, Para 0010; At block 420, each supply device 300 a-300 n may initialize the PRNG state with the seed (e.g., state0=seed). Thereafter, the 256-bit PRNG state may be updated using 256-bit SHA-2 based upon the previous PRNG state (e.g., state1 =SHA256(statei-1 )) each time random data is needed, such as when new addresses for supply devices 300 are requested, Para 0049; the seed may be established using a public key exchange, such as Diffie-Hellman which is based upon finite field cryptography or on elliptic curve cryptography, Para 0048; For each supply device 300a - 300n with an address index from i=0 to n-1, a candidate address is determined. At block 515, a candidate address for supply device 300 may be determined at the outset of the iterated calculation of candidate addresses for all supply devices 300. In this example, the first supply device 300a may correspond to the supply device associated with an address index i=0 and the last supply device 300 n may correspond to supply device 300 associated with an address index i=n-1, Para 0054);
iteratively calculating, by the first component, the outputs of the cryptographic function wherein for each iteration the input for the cryptographic function F is based on the seed and all previous outputs, and for each iteration storing the output in the block of non-volatile memory (At block 425, each supply device 300 may initialize and fill address array A of storage unit 360 with the default addresses, Para 0050; Default addresses for supply devices 300 may be retrieved from a non-volatile memory (not shown), Para 0046; For each supply device 300 a-300 n with an address index from i=0 to n-1, a candidate address is determined. At block 515. a candidate address for supply device 300 may be determined at the outset of the iterated calculation of candidate addresses for all supply devices 300. In this example, the first supply device 300a may correspond to the supply device associated with an address index i=0 and the last supply device 300 n may correspond to supply device 300 associated with an address index i=n-1, Para 0054; At block 420, each supply device 300 a-300 n may initialize the PRNG state with the seed (e.g., state0=seed). Thereafter, the 256-bit PRNG state may be updated using 256-bit SHA-2 based upon the previous PRNG state (e.g., state1=SHA256(statei-1)) each time random data is needed, such as when new addresses for supply devices 300 are requested, Para 0049; In the event that supply device 300 is disabled due to incorrect response to the challenge sent by bus master 215, such supply device 300 may be detected as a clone, counterfeit or otherwise unauthorized component, and appropriate actions may be taken or recommended. For example, a user may be advised to acquire an authorized supply device via a display of user interface 135 or to contact a system administrator or technical support for assistance in addressing the issue. Imaging device 105 may be configured to address such a situation to protect against the use of unauthorized components in order to optimize performance of and/or prevent damage to imaging device 105, Para 0072); and
transmitting at least one of the calculated outputs (FIG. 4, Para 0046-0050, Para 0072).
As per Claim 3, Bush discloses iteratively calculating, by the first component, the series of outputs of the cryptographic function F, wherein for each iteration the input for the cryptographic function is based on all previous outputs of the cryptographic function F, and wherein for each iteration the first component stores each output of the cryptographic function F in a block of non-volatile memory of the first component (FIG. 4, Para 0046-0051).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN P OUELLETTE whose telephone number is (571)272-6807. The examiner can normally be reached on M-F 8am-6pm.
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August 2, 2026
/JONATHAN P OUELLETTE/Primary Examiner, Art Unit 3629
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