Prosecution Insights
Last updated: April 19, 2026
Application No. 19/064,177

MULTIPLEXING-BASED VALIDATION VIA A PROXY CARD AT A TERMINAL DEVICE

Non-Final OA §103
Filed
Feb 26, 2025
Examiner
MIKELS, MATTHEW
Art Unit
2876
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Aurus
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
1044 granted / 1292 resolved
+12.8% vs TC avg
Strong +20% interview lift
Without
With
+20.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
32 currently pending
Career history
1324
Total Applications
across all art units

Statute-Specific Performance

§101
1.6%
-38.4% vs TC avg
§103
43.0%
+3.0% vs TC avg
§102
38.4%
-1.6% vs TC avg
§112
4.4%
-35.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1292 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 are pending. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 6, 8-16, 18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Walters, et al. (US 2019/0266584, herein Walters) in view of Joseph, et al. (US 10,810,473, herein Joseph).1 2 Regarding claims 1, 13 and 20, Walters teaches a system, method, and non-transitory computer readable medium storing processor-executable instructions, comprising: one or more processors (paragraph 0020: processor 112) coupled with memory (paragraph 0020: memory 116) to: validate using a proxy card in communication with one or more devices (paragraph 0017: authorization serves as validation); determine, via a circuit of the proxy card, that the integrated circuit card is coupled with the one or more devices (paragraph 0027); execute, responsive to the determination and via the one or more devices a synthetic transaction using data of the integrated circuit card (paragraph 0030: test transaction serves as a synthetic transaction); and determine, responsive to the execution of the synthetic transaction, a validation status of the integrated circuit card (paragraph 0033). Walters does not explicitly teach identify, from one or more slots corresponding to one or more integrated circuit cards, a slot corresponding to an integrated circuit card of the one or more integrated circuit cards. Joseph teaches identify, from one or more slots corresponding to one or more integrated circuit cards, a slot corresponding to an integrated circuit card of the one or more integrated circuit cards (column 6, lines 31-46: card vent 202B serves as a slot). It would have been obvious to one having ordinary skill in the art at the time of invention to combine the teachings of Walters and Joseph, because such a combination does not require manual intervention (column 1, lines 39-43 of Joseph). Regarding claims 2 and 14, Walters further teaches the validation status is indicative that the integrated circuit card is valid and wherein the one or more devices include a terminal device in communication with the proxy card and a point of sale device to execute the synthetic transaction (paragraph 0036). Regarding claims 3 and 15, Walter further teaches receive, via a terminal device of the one or more devices, a signal of the circuit of the proxy card (paragraph 0032); and determine, in response to the signal, that the integrated circuit card is in communication with the terminal device via a communication that is within a signal communication range of the terminal device, while the integrated circuit card is located outside of the signal communication range of the terminal device (paragraph 0032). Regarding claims 4 and 16, Walters further teaches establish communication between a terminal device of the one or more devices and the proxy card (paragraph 0027); determine, responsive to the communication, that the integrated circuit card is coupled with the terminal device to execute a transaction at the terminal device (paragraph 0028); and execute, responsive to the determination that the integrated circuit card is coupled with the terminal device, the synthetic transaction instead of the transaction (paragraph 0036). Regarding claims 6 and 18, Joseph further teaches activate the slot to allow for a function of the integrated circuit card to communicate a stored file comprising the data for the synthetic transaction (column 9, lines 5-10); complete the execution of the synthetic transaction according to the data from the stored file (column 9, lines 10-20); and deactivate the slot upon completion of the synthetic transaction (column 10, lines 50-60). Regarding claim 8, Walters further teaches identify, responsive to the determination, from the data of the integrated circuit, information of an account to use for the execution of the synthetic transaction (paragraph 0031); and complete the execution of the synthetic transaction using the information of the account (paragraph 0055). Regarding claim 9, Walters further teaches the synthetic transaction comprises one of a purchase transaction (paragraph 0002), a return transaction, or a void transaction and the synthetic transaction is executed using at least one of a magnetic strip technology (paragraph 0002), chip technology (paragraph 0031), near-field communication technology or quick response (QR) technology. Regarding claim 10, Walters further teaches determine, responsive to the execution of the synthetic transaction, a performance of the synthetic transaction corresponding to at least one of a success (paragraph 0025), an error (paragraph 0025), or a partial success; and generate, for a display, an indication of the validation of the integrated circuit card (paragraph 0047: outcome report). Regarding claim 10, Walters further teaches determine, responsive to the validation of the integrated circuit card, via the circuit of the proxy card, that a second integrated circuit card of the one or more integrated circuit cards is coupled with a terminal device of the one or more devices (paragraph 0030); complete, responsive to the determination that the second integrate circuit card is coupled with the terminal device and via a point of sale device of the one or more devices, a second synthetic transaction using a second data of the second integrated circuit card (paragraph 0027); and validate, responsive to the completion of the second synthetic transaction, the second integrated circuit card (paragraph 0033). Regarding claim 11, Walter further teaches generate an indication for a display on a terminal device of the one or more devices, the indication indicating that the synthetic transaction is completed (paragraph 0047: outcome report). Allowable Subject Matter Claims 5, 7, 17 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The cited art does not teach or suggest use of QR codes or the automation script as recited in these claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW MIKELS whose telephone number is (571)270-5470. The examiner can normally be reached Monday to Thursday 7:00 AM ET - 4:30 PM ET, Friday 7:00 AM ET - 11:00 AM ET, the Examiner is on central time.3 Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael G Lee can be reached at 571-272-2398. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MATTHEW MIKELS/Primary Examiner, Art Unit 2876 1 Cited in Applicant’s IDS dated 2/26/25. 2 In addition to the cited portions of each reference, please see also the associated figures. 3 The Examiner can also be reached at matthew.mikels@uspto.gov.
Read full office action

Prosecution Timeline

Feb 26, 2025
Application Filed
Dec 11, 2025
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+20.4%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 1292 resolved cases by this examiner. Grant probability derived from career allow rate.

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