DETAILED ACTION
This Final action is in response to an amendment filed 6/26/2026. Currently claims 1-10 and 13-21 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-10 and 13-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-9 and 12 of U.S. Patent No. U.S. Patent No. 12,260,808 (hereinafter ‘808) in view of Bok et al. in US 2021/0191552 (hereinafter Bok).
Although the claims at issue are not identical, they are not patentably distinct from each other because the patent ‘808 claims are in general more specific and therefore anticipate or make obvious the instant claims, except for the last paragraph added to independent claims 1 and 14 in the amendment filed 6/26/2026. The following table highlights the portions of the instant claims that are not described in the corresponding claim but that are inherent or made obvious by a patent ‘808 claim in view of Bok, as explained below.
Instant
Patent ‘808 + Bok
1. A transparent display module, comprising: a transparent substrate; a line pattern provided on the transparent substrate in a form of a two-dimensional grid; and a plurality of micro-pixel packages provided on the line pattern, each micro-pixel package comprising a relay substrate, a plurality of inorganic light emitting elements provided on a first surface of the relay substrate and at least one micro-pixel integrated circuit (IC) provided on a second surface of the relay substrate that is opposite to the first surface of the relay substrate; wherein at least one micro-pixel IC is configured to supply a driving current to the plurality of inorganic light emitting elements, wherein the each micro-pixel package further comprises: an upper wiring provided on the first surface of the relay substrate and extending from the plurality of inorganic light emitting elements, a lower wiring provided on the second surface of the relay substrate and extending from the at least one micro-pixel IC, an upper connection pad provided on an edge of the first surface of the relay substrate, a lower connection pad provided on an edge of the second surface of the relay substrate, and a side wiring formed on a side of the relay substrate to connect the upper connection pad and the lower connection pad, and wherein the plurality of inorganic light emitting elements are electrically connected to the at least one micro-pixel IC through the upper wiring, the upper connection pad, the side wiring, the lower connection pad, and the lower wiring, and
wherein at least one inorganic light emitting element from the plurality of light emitting elements comprises (i) an anode configured to receive a driving current from the at least one micro-pixel IC through the side wiring, and (ii) a cathode configured to receive a reference voltage from a flexible printed circuit board (FPCB) configured to supply power through the side wiring.
1. A transparent display module, comprising: a transparent substrate; a line pattern provided on the transparent substrate in a form of a two-dimensional grid; a plurality of micro-pixel packages, each micro-pixel package comprising a relay substrate, at least one micro-pixel integrated circuit (IC) provided on the line pattern and a plurality of inorganic light emitting elements provided on the at least one micro-pixel IC in which: the plurality of inorganic light emitting elements are provided on a first surface of the relay substrate and the at least one micro-pixel IC is provided on a second surface of the relay substrate that is opposite to the first surface of the relay substrate, and a plurality of transparent areas formed in areas in which the line pattern is not provided, wherein the at least one micro-pixel IC includes at least one pixel circuit configured to supply a driving current to the plurality of inorganic light emitting elements, wherein the plurality of micro-pixel packages are electrically connected to the transparent substrate by solder balls, wherein a height of each of the solder balls is greater than a height of the at least one micro-pixel IC such that the at least one micro-pixel IC is not in contact with the transparent substrate wherein the each micro-pixel package comprises: an upper wiring provided on the first surface of the relay substrate and extending from the plurality of inorganic light emitting elements; a lower wiring provided on the second surface of the relay substrate and extending from the at least one macro-pixel IC: an upper connection pad provided on an edge of the first surface of the relay substrate, a lower connection pad provided on an edge of the second surface of the relay substrate; and wherein the plurality of inorganic light emitting elements provided on the first surface of the relay substrate are electrically connected to the at least one micro-pixel IC provided on the surface of the relay substrate through the upper wiring, the upper connection pad, the side wiring, the lower connection pad, and the lower wiring.
Bok Figs. 10, 11A and par. 301, 303: see anode receiving current from T1, and cathode receiving ELVSS from FPCB 32. It would have been obvious to one of ordinary skill in the art that patent ‘808 side wiring provides these voltages to the LED, in order to obtain the predictable result of a known method of driving LEDs in displays.
14. A transparent display apparatus comprising: at least one display module; and a driver integrated circuit (IC) configured to generate a driving signal to be supplied to the at least one display module, wherein the at least one display module comprises: a transparent substrate, a line pattern provided on the transparent substrate in a form of a two-dimensional grid, and a plurality of micro-pixel packages provided on the line pattern, each micro-pixel package comprising a relay substrate, a plurality of inorganic light emitting elements provided on a first surface of the relay substrate and at least one micro-pixel integrated circuit (IC) provided on a second surface of the relay substrate that is opposite to the first surface of the relay substrate, wherein the plurality of micro-pixel ICs is configured to supply a driving current to the plurality of inorganic light emitting elements, wherein the each micro-pixel package further comprises: an upper wiring provided on the first surface of the relay substrate and extending from the plurality of inorganic light emitting elements, a lower wiring provided on the second surface of the relay substrate and extending from the at least one micro-pixel IC, an upper connection pad provided on an edge of the first surface of the relay substrate, a lower connection pad provided on an edge of the second surface of the relay substrate, and a side wiring formed on a side of the relay substrate to connect the upper connection pad and the lower connection pad, and wherein the plurality of inorganic light emitting elements are electrically connected to the at least one micro-pixel IC through the upper wiring, the upper connection pad, the side wiring, the lower connection pad, and the lower wiring;
wherein at least one inorganic light emitting element from the plurality of light emitting elements comprises (i) an anode configured to receive a driving current from the at least one micro-pixel IC through the side wiring, and (ii) a cathode configured to receive a reference voltage from a flexible printed circuit board (FPCB) configured to supply power through the side wiring.
1. A transparent display module, comprising: a transparent substrate; a line pattern provided on the transparent substrate in a form of a two-dimensional grid; a plurality of micro-pixel packages, each micro-pixel package comprising a relay substrate, at least one micro-pixel integrated circuit (IC) provided on the line pattern and a plurality of inorganic light emitting elements provided on the at least one micro-pixel IC in which: the plurality of inorganic light emitting elements are provided on a first surface of the relay substrate and the at least one micro-pixel IC is provided on a second surface of the relay substrate that is opposite to the first surface of the relay substrate, and a plurality of transparent areas formed in areas in which the line pattern is not provided, wherein the at least one micro-pixel IC includes at least one pixel circuit configured to supply a driving current to the plurality of inorganic light emitting elements, wherein the plurality of micro-pixel packages are electrically connected to the transparent substrate by solder balls, wherein a height of each of the solder balls is greater than a height of the at least one micro-pixel IC such that the at least one micro-pixel IC is not in contact with the transparent substrate wherein the each micro-pixel package comprises: an upper wiring provided on the first surface of the relay substrate and extending from the plurality of inorganic light emitting elements; a lower wiring provided on the second surface of the relay substrate and extending from the at least one macro-pixel IC: an upper connection pad provided on an edge of the first surface of the relay substrate, a lower connection pad provided on an edge of the second surface of the relay substrate; and wherein the plurality of inorganic light emitting elements provided on the first surface of the relay substrate are electrically connected to the at least one micro-pixel IC provided on the surface of the relay substrate through the upper wiring, the upper connection pad, the side wiring, the lower connection pad, and the lower wiring.
Bok Figs. 10, 11A and par. 301, 303: see anode receiving current from T1, and cathode receiving ELVSS from FPCB 32. It would have been obvious to one of ordinary skill in the art that patent ‘808 side wiring provides these voltages to the LED, in order to obtain the predictable result of a known method of driving LEDs in displays.
Instant claim 1 is mostly anticipated by patent ‘808 claim 1 except for the limitation “a side wiring formed on a side of the relay substrate to connect the upper connection pad and the lower connection pad” which is described in patent ‘808 claim 12 (col. 22 line 23-25), and by the last paragraph which is made obvious by Bok’s Figs. 10, 11A. Therefore, it would have been obvious to one of ordinary skill in the art at the time of effective filing date that the side wiring in patent ‘808 claim 1 is a side wiring as described in patent ‘808 claim 12, in order to obtain the predictable result of a side wiring connecting the upper and lower wirings. It would also have been obvious to one of ordinary skill in the art that the side wiring provides anode and cathode power as described by Bok’s Figs. 10, 11A, in order to obtain the predictable result of a known method of driving a display pixel.
Instant claim 14 is mostly anticipated by patent ‘808 claim 1 except for the limitations “a driver integrated circuit (IC) configured to generate a driving signal to be supplied to the at least one display module”, “a side wiring formed on a side of the relay substrate to connect the upper connection pad and the lower connection pad”, and by the last paragraph which is made obvious by Bok’s Figs. 10, 11A. The underlined limitations are described in patent ‘808 claim 12 (col. 21 lines 47-50 and col. 22 lines 23-25), therefore it would have been obvious to one of ordinary skill in the art that patent ‘808 claim 1 would include the driver IC and the side wiring as described in patent ‘808 claim 12, in order to obtain the predictable result of a driver supplying the driving signal and a side wiring connecting the upper and lower wirings. It would also have been obvious to one of ordinary skill in the art that the side wiring provides anode and cathode power as described by Bok’s Figs. 10, 11A, in order to obtain the predictable result of a known method of driving a display pixel.
Instant claims 2 and 15 are anticipated by patent ‘808 claims 1+9 except for the limitation “the plurality of micro-pixel packages are not provided on the plurality of transparent areas” which is not explicitly disclosed in the patent ‘808 claims but it is implied by the patent ‘808 claim 1 (col. 20 lines 25-28, lines 36-37) where “each micro-pixel package comprising…at least one micro-pixel IC provided on the line pattern” and “a plurality of transparent areas formed in areas in which the line pattern is not provided”, thus implying that the micro-pixel IC formed on the line pattern is not provided on the transparent area.
The remaining claims map as follows:
Instant
3, 16
4, 17
5, 18
6, 19
7, 20
8
9
10
13
21
‘808
1
2
3
4
5
6
7
8
1
1
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-10, 14 and 16-21 are rejected under 35 U.S.C. 103 as being unpatentable over Bower et al. in US 2020/0295120 (hereinafter Bower) in view of Bok et al. in US 2021/0191552 (hereinafter Bok).
Regarding claim 1, Bower disclose a transparent display module (Bower’s Fig. 1 and par. 53-54: display structure 99 comprising transparent screen support 10), comprising:
a transparent substrate (Bower’s Fig. 1 and par. 54: screen support 10 substantially transparent);
a line pattern provided on the transparent substrate (Bower’s Figs. 13, 15: see pattern of 60 and 80) in a form of a two-dimensional grid (Bower’s Figs. 13, 15); and
a plurality of micro-pixel packages (Bower’s Fig. 1 per par. 53: tile 40) provided on the line pattern (Bower’s Figs. 13, 15: see pattern of 60 and 80), each micro-pixel package (Bower’s Fig. 1: tile 40) comprising a relay substrate (Bower’s Figs. 1, 10 and par. 53: substrate 42), a plurality of inorganic light emitting elements provided on a first surface of the relay substrate (Bower’s Fig. 1 and par. 53: see light emitters 52 shown on top surface of 42 in Fig. 10) and at least one micro-pixel integrated circuit (IC) provided on a second surface of the relay substrate that is opposite to the first surface of the relay substrate (Bower’s Figs. 1, 10 and par. 53: see controller 56 shown on bottom surface of 42);
wherein the at least one of micro-pixel ICs (Bower’s Fig. 10: see 56) is configured to supply a controlling signal (Bower’s par. 53: controller 56 controls pixels) to the plurality of inorganic light emitting elements (Bower’s Fig. 10 and par. 53: LEDs 52),
wherein the each micro-pixel package (Bower’s Figs. 1, 10: see 40) further comprises:
an upper wiring provided on the first surface of the relay substrate and extending from the plurality of inorganic light emitting elements (Bower’s Fig. 10 and par. 53: see 60 to LED 52),
a lower wiring provided on the second surface of the relay substrate and extending from the at least one micro-pixel IC (Bower’s Fig. 10 and par. 53: see 62 to controller 56),
an upper connection pad provided on an edge of the first surface of the relay substrate (Bower’s Fig. 10 and par. 63-64: see top portion of 66 on left top edge of 42 overlapping 60),
a lower connection pad provided on an edge of the second surface of the relay substrate (Bower’s Fig. 10 and par. 63-64: see bottom portion of 66 on bottom edge of 42 overlapping 62), and
a side wiring formed on a side of the relay substrate to connect the upper connection pad and the lower connection pad (Bower’s Fig. 10 and par. 63-64: see side portion of 66), and
wherein the plurality of inorganic light emitting elements are electrically connected to the at least one micro-pixel IC through the upper wiring, the upper connection pad, the side wiring, the lower connection pad, and the lower wiring (Bower’s Fig. 10 and par. 63-64), and
wherein at least one inorganic light emitting element from the plurality of light emitting elements (Bower’s Figs. 1, 8 and 10: see 52) comprises (i) an emitter-side electrode (Bower’s par. 63: electrical contacts on the top side of emitter 52 connected to emitter-side electrode 60) configured to receive electrical signals from the at least one micro-pixel IC through the side wiring (Bower’s Figs. 8, 10 and par. 63: electrical signals to 52 through 60), and (ii) a back-side electrode configured to receive a reference voltage from a controller (Bower’s Figs. 8, 10 and par. 63: back side electrode 62 connected to ground supplied from a controller) configured to supply power through the side wiring (Bower’s Figs. 8, 10 and par. 63).
Bower fails to explicitly disclose wherein the at least one of micro-pixel ICs is configured to supply a driving current to the plurality of inorganic light emitting elements, or wherein at least one inorganic light emitting element from the plurality of light emitting elements comprises (i) an anode configured to receive a driving current from the at least one micro-pixel IC through the side wiring, and (ii) a cathode configured to receive a reference voltage from a flexible printed circuit board (FPCB) configured to supply power through the side wiring.
However, in the same field of endeavor of displays formed by inorganic LEDs (Bok’s par. 194), Bok disclose a pixel circuit supplying a driving current to it’s respective LED (Bok’s Fig. 11A and par. 301, 303: driving current from T1 to ED), the driving current received at the anode of the LED (Bok’s Fig. 11A and par. 303: see anode of ED receiving current from T1), and the cathode receiving a ground voltage (Bok’s Fig. 11A and par. 298: see ELVSS) from a driving unit mounted on an FCPB (Bok’s Fig. 10 and par. 298, 199: ELVSS is supplied to the pixels from driver 32 on FPCB 30).
Therefore, it would have been obvious to one of ordinary skill in the art, that Bowen’s controlling signal (Bower’s par. 53: controller 56 controls pixels) is a driving current (Bok’s Fig. 11A and par. 303), in order to obtain the predictable result of a known method of driving LEDs (Bok’s Fig. 11A and par. 301), and that Bower’s emitter side electrode (Bower’s Fig. 10: see 60), back side electrode (Bower’s Fig. 10: see 62), micro-pixel IC and controller (Bower’s Fig. 10: see 56) and external controller (Bower’s par. 63: controller external to display structure) map respectively to Bok’s anode (Bok’s Fig. 11A), cathode (Bok’s Fig. 11A), pixel controller (Bok’s Fig. 11A: PC) and FPCB (Bok’s Fig. 10: see 32); in order to obtain the predictable result of a known method and components for driving LEDs (Bok’s Figs. 10, 11A).
By doing such combination, Bower in view of Bok disclose:
wherein the at least one of micro-pixel ICs (Bower’s Fig. 10: see 56 equivalent to driver PC of Bok’s Fig. 11A) is configured to supply a driving current (Bower’s par. 53: controls pixel which upon combination is by current per Bok’s Fig. 11A and par. 303) to the plurality of inorganic light emitting elements (Bok’s Figs. 10, 11A); and
wherein at least one inorganic light emitting element from the plurality of light emitting elements (Bower’s Figs. 8, 10: see 52 equivalent to ED in Bok’s Fig. 11A) comprises (i) an anode (Bower’s Figs. 8, 10 and par. 63: emitter-side electrode 60 equivalent to anode of ED in Bok’s Fig. 11A) configured to receive a driving current (Bok’s Fig. 11A and par. 303) from the at least one micro-pixel IC (Bok’s Fig. 11A and par. 301, 303: see PC equivalent to 56 in Bower’s Fig. 10) through the side wiring (Bok’s Figs. 8, 10 and par. 53, 63: see 66 connecting to 60. Each pixel is controlled by 56), and (ii) a cathode (Bower’s Figs. 8, 10 and par. 63: back-side electrode 62 equivalent to cathode of ED in Bok’s Fig. 11A) configured to receive a reference voltage (Bower’s par. 63: ground equivalent to ELVSS of Bok’s Fig. 11A) from a flexible printed circuit board (Bower’s Figs. 10, 11A and par. 298, 199: ELVSS is supplied to the pixels from driver 32 on FPCB 30) configured to supply power through the side wiring (Bower’s par. 63: ground provided from external controller [equivalent to 32 in Bok’s Fig. 10] and connection of electrodes through side wiring 66 in Bower’s Figs. 8, 10-11).
Regarding claim 14, Bower in view of Bok disclose a transparent display apparatus (Bower’s Fig. 1 and par. 53-54: display structure 99 comprising transparent screen support 10 equivalent to 1 in Bok’s Figs. 1-2 per par. 185) comprising: at least one display module (Bower’s Fig. 1: display structure 99 equivalent to 10 in Bok’s Fig. 2); and a driver integrated circuit (IC) (Bok’s Figs. 2, 4-7 and par. 198: see 32) configured to generate a driving signal to be supplied to the at least one display module (Bok’s par. 298: ELVDD), wherein the at least one display module comprises:
all limitations as explained for claim 1.
It would also have been obvious to one of ordinary skill in the art, that Bower includes a driver integrated circuit (as disclosed by Bok) in order to obtain the predictable result of a known configuration for control of pixels (Bok’s Fig. 10 and par. 202).
Regarding claims 3 and 16, Bower in view of Bok disclose wherein the at least one micro-pixel IC (Bower’s Fig. 10: see 56) includes at least one pixel circuit configured to supply the driving current (Bower’s par. 53: controller 56 controls pixels which upon combination includes the pixel circuit controller PC supplying current per Bok’s Fig. 11A and par. 303) to the plurality of inorganic light emitting elements (Bower’s Figs. 1 and 10: LEDs 52).
Regarding claims 4 and 17, Bower in view of Bok disclose wherein the plurality of inorganic light emitting elements (Bower’s Fig. 1: see LEDs 52) constitute a plurality of pixels that are two-dimensionally arranged (Figs. 16-17 and par. 53: see pixels 50),
wherein each of the plurality of pixels comprises two or more inorganic light emitting elements among the plurality of inorganic light emitting elements (Bower’s Figs. 2-3 and par. 59: each pixels comprises three light emitters 52).
Regarding claims 5 and 18, Bower in view of Bok disclose wherein the plurality of micro-pixel ICs (Bower’s Fig. 10: see 56) correspond to the plurality of pixels (Bower’s par. 53: controller 56 control all pixels in a tile or multiple controllers 56 can be provided), respectively, and the plurality of inorganic light emitting elements are supplied with the driving current from a corresponding micro-pixel IC (Bower’s par. 53: controller 56 control all pixels in a tile or multiple controllers 56 can be provided, which upon combination includes supplying current per Bok’s Fig. 11A and par. 303).
Regarding claims 6 and 19, Bower in view of Bok disclose wherein at least one micro-pixel IC of the plurality of micro-pixel ICs (Bower’s Fig. 10 and par. 53: see 56) supplies the driving current to two or more pixels from the plurality of pixels (Bower’s and par. 53: controller 56 control all pixels in a tile such as one with multiple pixels of Figs. 16-17, which upon combination includes supplying current per Bok’s Fig. 11A and par. 303).
Regarding claims 7 and 20, Bower in view of Bok disclose wherein a number of micro-pixel ICs in the plurality of micro-pixel ICs (Bower’s par. 53: pixel controller 56 [one]) is smaller than a number of pixels in the plurality of pixels (Bower’s par. 53: all pixels in a tile, which are multiple as shown in Figs. 16-17).
Regarding claim 8, Bower in view of Bok disclose wherein the at least one micro-pixel IC of the plurality of micro-pixel ICs (Bower’s par. 53: pixel controller 56) supplies the driving current to at least one pixel adjacent thereto from the plurality of pixels (Bower’s and par. 53: controller 56 control all pixels in a tile such as one with adjacent pixels of Figs. 16-17) through the line pattern (Bower’s Figs 10-13: see line pattern 66 which connects 60 and 62 and transfer control signals from 56 to 50 per par. 53).
Regarding claim 9, Bower in view of Bok further disclose wherein the line pattern (Bower’s Figs. 13, 15: see pattern of 60 and 80, which upon combination includes DL and SL of Bok’s Fig. 10) transfers a gate signal (Bok’s Fig. 11A and par. 301: scan signal) and a data signal (Bok’s Fig. 11A and par. 301: data signal) for image display (Bok’s par. 186) to the plurality of micro-pixel ICs (Bok’s Fig. 11A: see PC equivalent to 50 in Bower’s Fig. 1 which are driven through controller 56 per par. 53).
It would also have been obvious to one of ordinary skill in the art, that Bower’s line patterns include the gate lines and data lines of Bok’s Figs. 10, 11A, in order to obtain the predictable result of controlling display by pixels (Bok’s par. 186).
Regarding claim 10, Bower in view of Bok disclose wherein the at least one micro-pixel IC of the plurality of micro-pixel ICs (Bower’s Fig. 10 and par. 53: see 56) further comprises an IC control circuit (Bower’s Fig. 10 and par. 53: a controller 56) configured to distribute the transferred gate signal and the data signal (Bok’s Fig. 11A and par. 301) to two or more pixel circuits (Bower’s par. 53: controller 56 controls pixels 50 and each pixel 50 includes a TFT that supply driving current to the LED per Bok’s Figs. 10, 11A) that supply driving currents to the two or more pixels, respectively (Bower’s Figs. 2-3: see pixels 50 where each includes at least three pixels supplied with a current through their respective TFT per Bok’s Fig. 12 and par. 232).
Regarding claim 21, Bower in view of Bok disclose wherein the upper connection pad (Bower’s Fig. 10: see top portion of 66 on left top edge of 42 overlapping 60) connects the side wiring (Bower’s Fig. 10: see side portion of 66) to the plurality of inorganic light emitting elements (Bower’s Fig. 10: see 52) without directly contacting the plurality of inorganic light emitting elements (Bower’s Fig. 10-11: the top portion of 66 does not contact the LED 52 directly but instead through electrode 60 per par. 63), and wherein the lower connection pad (Bower’s Fig. 10: see bottom portion of 66 on bottom edge of 42 overlapping 62) connects the side wiring (Bower’s Fig. 10: see side portion of 66) to the at least one micro-pixel IC (Bower’s Fig. 10: see 56) without directly contacting the at least one micro-pixel IC (Bower’s Fig. 10-11: the bottom portion of 66 does not contact the IC 56 directly but instead through electrode 62 per par. 63).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Bower in view of Bok as applied above, in further view of Ootorii in US 2012/02568014 (hereinafter Ootorii)
Bower in view of Bok fails to disclose solder balls.
However, in the same field of endeavor of forming display panels with LEDs, Ootorii discloses chips electrically connected to the substrate by solder balls (Ootorii’s Fig. 35 and par. 111: see chip 1, 4 attached to substrate 313 by solder balls 55), wherein a height of each of the solder balls is greater than a height of the at least one chip (Ootorii’s par. 116) such that the at least one chip is not in contact with the transparent substrate (Ootorii’s Figs. 35-37: because the solder balls 55 have a height higher than IC 20).
Therefore, it would have been obvious to one of ordinary skill in the art, that Bower in view of Bok’s pixels packages are connected to the host screen by solder balls as described by Ootorii, in order to obtain the predictable result of using solder joints to mount the packages on the display (Bower’s par. 68: solder joint for tile 40 to bus 80).
By doing such combination, Bower in view of Bok and Ootorii disclose:
wherein the plurality of micro-pixel packages (Bower’s Figs. 1, 10: see 40) are electrically connected to the transparent substrate (Bower’s Fig. 1: screen support 10) by solder balls (Ootorii’s Fig. 35 and par. 111: see chip 1, 4 attached to substrate 313 by solder balls 55, this is equivalent to connecting tiles 40 to support 10 in Bower’s Fig. 1), wherein a height of each of the solder balls is greater than a height of the at least one micro-pixel IC (Ootorii’s par. 116) such that the at least one micro-pixel IC is not in contact with the transparent substrate (Ootorii’s Figs. 35-37: because the solder balls 55 have a height higher than IC 20).
Claims 2 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Bower in view of Bok applied above, in further view of Tao et al. in US 2020/0350361 (hereinafter Tao).
Bowers in view of Bok fail to disclose a plurality of transparent areas are formed in areas in which the line pattern is not provided, and the plurality of micro-pixel packages are not provided on the plurality of transparent areas, wherein the plurality of transparent areas are arranged in a two-dimensional grid such that each transparent area is surrounded by the line pattern, and wherein each row of inorganic light emitting elements from the plurality of inorganic light emitting elements provided on the line pattern alternates with each row of transparent areas from the plurality of transparent areas.
However, in the same field of endeavor of mounting pixel packages on display panels, Tao discloses:
wherein a plurality of transparent areas (Tao’s Fig. 2 and par. 38: areas of pixel P on transparent display 1A where line pattern 30A, LED 20 and chip 50 are not provided. 1A, 30A and 20/50 are equivalent to substrate 10, pattern of lines 20 and tiles 40 in Bower’s Figs. 1, 13) are formed in areas in which the line pattern is not provided (Tao’s Fig. 2: see 30A equivalent to 60 of Bower’s Fig. 13), and the plurality of micro-pixel packages are not provided on the plurality of transparent areas (Tao’s Fig. 2: see areas of pixel P where LED 20 and chip 50 are not provided),
wherein the plurality of transparent areas are arranged in a two-dimensional grid such that each transparent area is surrounded by the line pattern (Tao’s Fig. 2 and par. 38: areas of pixel P where 30A/20/50 are not provided, which are surrounded by line pattern 30A and arranged in a 2D grid as shown), and
wherein each row of inorganic light emitting elements from the plurality of inorganic light emitting elements provided on the line pattern alternates with each row of transparent areas from the plurality of transparent areas (Tao’s Fig. 2: row of LEDs 20 on line pattern 30A alternates with areas where 30A/20/50 are not provided).
Therefore, it would have been obvious to one of ordinary skill in the art, that Bower’s transparent substrate, line pattern and pixel packages are arranged in the manner disclosed by Tao’s Fig. 2, in order to obtain the benefit of a transparent display apparatus where a background located on the backside surface side of the display apparatus is visually recognizable (Tao’s Fig. 13 and par. 34).
Response to Arguments
Applicant’s arguments with respect to claims 1 and 14 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. A new reference to Bok to disclose the anode and cathode and their respective signals was used in the rejection above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/LILIANA CERULLO/ Primary Examiner, Art Unit 2621
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