DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 8 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Guan (US 2024/0235377).
In reference to claim 8 Guan discloses in Figure 2 a circuit comprising:
a switch (MH/ML) having a first terminal, a second terminal, and a control terminal (GH/GL), the switch being an n-channel field-effect transistor (NFET)(see [0378] which discloses that the transistors may be N-type channel transistors); an error amplifier (11) having a first terminal, a second terminal, and a third terminal, the second terminal of the error amplifier coupled to the second terminal of the switch (MH/ML) (the FB terminal of the error amplifier is coupled to a terminal (Vsw) of transistor (MH/ML) through a feedback circuit; and reference voltage control circuitry (19) having a first terminal, a second terminal, and a third terminal, the third terminal of the reference voltage control circuitry (19) coupled to the first terminal of the error amplifier (11).
Allowable Subject Matter
Claims 1-7 and 15-20 are allowed.
Claims 9-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CASSANDRA F COX whose telephone number is (571)272-1741. The examiner can normally be reached M-F 7:00-4:30; off alt Fridays.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CASSANDRA F COX/Primary Examiner, Art Unit 2836
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