DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a) (2) as being anticipated by
Gwynne (US 2024/0356546).
Regarding claim 1, Gwynne discloses an isolated driver [fig. 2] for driving a power switching device [226], comprising: a voltage input terminal [DC in], configured to receive an input voltage [DC voltage]; a control input terminal [206 terminal], configured to receive an input control signal [PWM command input]; a transformer [218], comprising a primary winding [primary winding of 218] and a secondary winding [secondary winding of 218]; a primary circuit [217], coupled to the voltage input terminal and the primary winding, and configured to provide a primary signal at the primary winding [208a~208d], wherein the primary signal comprises a first set of primary pulse signals [first set of primary pulse signals of 208a~208d] and a second set of primary pulse signals [second set of primary pulse signals of 208a~208d], and wherein the primary circuit is configured to provide the first set of primary pulse signals at the primary winding in response to the input control signal in a first input control state [on state] and provide the second set of primary pulse signals at the primary winding in response to the input control signal in a second input control state [off state], pulse widths [PWM] or duty cycles of the second set of primary pulse signals are different from that of the first set of primary pulse signals; and wherein the transformer is configured to provide a secondary signal [209a~209d] on the secondary winding according to the primary signal, and the secondary signal comprises a first set of secondary pulse signals [first set of primary pulse signals of 209a~209d] corresponding to the first set of primary pulse signals and a second set of secondary pulse signals [second set of primary pulse signals of 209a~209d] corresponding to the second set of primary pulse signals; a secondary circuit [212], coupled to the secondary winding to receive the secondary signal and configured to provide an output control signal [output 219/220] and an output voltage [204], wherein the secondary circuit is configured to control the output control signal to switch between a first output control state [on state] and a second output control state in response to the secondary signal [off state]; and a driving circuit [221/222], comprising an input terminal [input to 221/222] and an output terminal [output 221/222], wherein the input terminal of the driving circuit is configured to receive the output control signal, and the output terminal of the driving circuit is configured to provide a driving signal [signal 225] to drive the power switching device [226] according to the output control signal, and the driving circuit is powered by the output voltage provided by the secondary circuit.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-6, 8-9, 11, 13 and 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over Gwynne in view of Ouyang (US 2021/0359612).
Regarding claim 2, Gwynne discloses all the features with respect to claim 1 as outlined above. Gwynne further discloses wherein the primary circuit comprises: a primary circuit [217], coupled between the voltage input terminal and the primary winding; and an encoding circuit [216], configured to provide a control signal [207a~207d] according to the input control signal to control the primary circuit to turn on and turn off, thereby generating the primary signal at the primary winding. Gwynne does not explicitly disclose wherein the primary switch circuit coupled between the voltage input terminal and the primary winding, wherein the primary switch circuit comprises at least one switch; the input control signal to control the at least one switch in the primary switch circuit to turn on and turn off, thereby generating the primary signal at the primary winding.
However, Ouyang discloses wherein the primary switch circuit [101, figs. 1-2] coupled between voltage input terminal [Vin terminal, fig. 1] and primary winding [27, fig. 2], wherein the primary switch circuit comprises at least one switch [21/22, fig. 2]; an input control signal [PWMP1/PWMP2] to control the at least one switch in the primary switch circuit to turn on and turn off, thereby generating primary signal [SW] at the primary winding. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Gwynne by incorporating primary switch circuit as taught in Ouyang in Ouyang in order to provide an improved isolated driver that supports multiple operating switching modes.
Regarding claim 3, Gwynne in view of Ouyang discloses wherein the switching control signal [PWMP1/PWMP2, figs. 2 and 4] is configured to control the at least one switch in the primary switch circuit to turn on at a first duty cycle [fig. 4] when the input control signal is changed to first input control state [on state], and the switching control signal is configured to control the at least one switch in the primary switch circuit to turn on at a second duty cycle [fig. 4] when the input control signal is changed to second input control state [off state], wherein the first duty cycle is not equal to the second duty cycle [fig. 4].
Regarding claim 4, Gwynne discloses all the features with respect to claim 1 as outlined above. Gwynne further discloses a decoding circuit [219/220, fig. 2], configured to provide the output control signal according to the secondary signal, wherein the output control signal is changed to the first output control state when the decoding circuit identifies the first set of secondary pulse signals [first set of primary pulse signals of 209a~209d], and is changed to the second output control state when the decoding circuit identifies the second set of secondary pulse signals [second set of primary pulse signals of 209a~209d]. Gwynne does not explicitly disclose wherein the secondary circuit comprises: a secondary switch circuit, coupled to secondary winding, and configured to rectify the secondary signal to provide the output voltage.
However, Ouyang discloses wherein the secondary circuit [104, figs. 1-2] comprises: a secondary switch circuit [104, figs. 1-2], coupled to secondary winding [28/29, fig. 2], and configured to rectify [par. 0019] the secondary signal to provide the output voltage [Vo]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Gwynne by incorporating secondary switch circuit as taught in Ouyang in Ouyang in order to provide an improved isolated driver that supports multiple operating switching modes.
Regarding claim 5, Gwynne discloses all the features with respect to claim 1 as outlined above. Gwynne further discloses a decoding circuit [219/220, fig. 2], configured to provide the output control signal according to the secondary signal, wherein the decoding circuit controls the output control signal to switch between the first output control state and the second output control state according to the duty cycle of the secondary signal. Gwynne does not explicitly disclose the secondary circuit comprises: a secondary switch circuit, coupled between the secondary winding and the output voltage, and configured to rectify the secondary signal to provide the output voltage
However, Ouyang discloses wherein the secondary circuit [104, figs. 1-2] comprises: a secondary switch circuit [104, figs. 1-2], coupled between the secondary winding and the output voltage, and configured to rectify [par. 0019] the secondary signal to provide the output voltage [Vo]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Gwynne by incorporating secondary switch circuit as taught in Ouyang in order to provide an improved isolated driver that supports multiple operating switching modes.
Regarding claim 6, Gwynne discloses all the features with respect to claim 1 as outlined above. Gwynne further discloses encoding circuit [216, fig. 2], configured to provide a first control signal [207a/207b, fig. 2] and a second control signal [207c/207d] according to the input control signal. Gwynne does not explicitly discloses wherein the primary circuit comprises: a primary switch circuit, comprising an upper switch and a lower switch, wherein a first terminal of the upper switch is coupled to the voltage input terminal, a second terminal of the upper switch and a first terminal of the lower switch are coupled to a first terminal of the primary winding, and a second terminal of the lower switch is coupled to a primary reference ground; wherein the first switching control signal is used for controlling the upper switch and the second switching control signal is used for controlling the lower switch, so as to provide the primary signal at the first terminal of the primary winding.
However, Ouyang discloses wherein the primary circuit [101, figs. 1-2] comprises: a primary switch circuit [101, figs. 1-2], comprising an upper switch [21, fig. 1] and a lower switch [22, fig. 2], wherein a first terminal of the upper switch [Vin terminal] is coupled to the voltage input terminal, a second terminal of the upper switch [SW terminal] and a first terminal of the lower switch [SW terminal] are coupled to a first terminal of the primary winding [27], and a second terminal of the lower switch is coupled to a primary reference ground [PGND]; circuit [10] configured to provide first switching control signal [PWMP1] is used for controlling the upper switch and the second switching control signal [PWMP2] is used for controlling the lower switch, so as to provide the primary signal at the first terminal of the primary winding [27]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Gwynne by incorporating primary and secondary switch circuits as taught in Ouyang in order to provide an improved isolated driver that supports multiple operating switching modes.
Regarding claim 8, Gwynne in view of Ouyang discloses [fig. 4] wherein when the input control signal is changed to the first input control state, the upper switch is turned on at least in one switching period with a first duty cycle [fig. 4], and when the input control signal is changed to the second input control state, the upper switch is turned on at least in one switching period with a second duty cycle [fig. 4], wherein the second duty cycle is not equal to the first duty cycle.
Regarding claim 9, Gwynne discloses all the features with respect to claim 1 as outlined above. Gwynne further discloses a decoding circuit [219/220, fig. 2], configured to provide the output control signal according to the secondary signal. Gwynne does not explicitly disclose wherein the secondary circuit comprises: a secondary switch circuit, comprising a first switch and a second switch, wherein a first terminal of the first switch is coupled to an output capacitor to provide the output voltage, a second terminal of the first switch and a first terminal of the second switch are coupled to a first terminal of the secondary winding, and a second terminal of the second switch is coupled to a secondary reference ground.
However, Ouyang discloses wherein the secondary circuit [104, fig. 1-2] comprises: a secondary switch circuit [104], comprising a first switch [30] and a second switch [31], wherein a first terminal of the first switch [terminal node 23] is coupled to an output capacitor [C0] to provide the output voltage, a second terminal of the first switch and a first terminal of the second switch are coupled to a first terminal of the secondary winding [through 29], and a second terminal of the second switch is coupled to a secondary reference ground [GND]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Gwynne by incorporating primary and secondary switch circuits as taught in Ouyang in order to provide an improved isolated driver that supports multiple operating switching modes.
Regarding claim 11, Gwynne discloses an isolated driver [fig. 2] for driving a power switching device [226], comprising: a voltage input terminal [201 terminal], configured to receive an input voltage [DC in]; a control input terminal [206 terminal], configured to receive an input control signal [PWM Command Input]; a transformer [218a], comprising a primary winding [primary winding of 218a] and a secondary winding [secondary winding of 218a]; a primary circuit [211]; an encoding circuit [216], configured to provide a first control signal [207a] and a second control signal [207c] according to the input control signal, so as to provide a primary signal [208a~208d] at the first terminal of the primary winding, wherein the transformer is configured to provide a secondary signal [209a~209d] at the secondary winding according to the primary signal; a secondary circuit [215] coupled to the secondary winding, and configured to provide an output voltage [204]; and a decoding circuit [219/220], configured to provide an output control signal [signal 225] according to the secondary signal for controlling the power switching device to turn on and turn off. Gwynne does not explicitly disclose a first switch circuit, comprising an upper switch and a lower switch, wherein a first terminal of the upper switch is coupled to the voltage input terminal, a second terminal of the upper switch and a first terminal of the lower switch are coupled to a first terminal of the primary winding, and a second terminal of the lower switch is coupled to a primary reference ground; wherein the first switching control signal is used for controlling the upper switch to turn on and turn off, and the second switching control signal is used for controlling the lower switch to turn on and turn off, so as to provide a primary signal at the first terminal of the primary winding and a secondary switch circuit, coupled to the secondary winding, and configured to rectify the secondary signal to provide an output voltage.
However, Ouyang discloses a primary switch circuit [101, figs. 1-2], comprising an upper switch [21, fig. 2] and a lower switch [22, fig. 2], wherein a first terminal of the upper switch [upper terminal 22] is coupled to voltage input terminal [Vin], a second terminal of the upper switch and a first terminal of the lower switch are coupled to a first terminal [terminal SW, fig. 2] of primary winding [27, fig. 2], and a second terminal of the lower switch [lower 22 terminal] is coupled to a primary reference ground [PGND, fig. 2]; an circuit [10], configured to provide a first switching control signal [PWMP1] and a second switching control signal [PWMP2] according to input control signal [user input, fig. 1], wherein the first switching control signal is used for controlling the upper switch to turn on and turn off, and the second switching control signal is used for controlling the lower switch to turn on and turn off, so as to provide a primary signal [output 102] at the first terminal of the primary winding and a secondary switch circuit [104] coupled to secondary winding [28/29, fig. 2], and configured to rectify the secondary signal to provide an output voltage [Vo, fig. 2]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Gwynne by incorporating primary and secondary switch circuits as taught in Ouyang in order to provide an improved isolated driver that supports multiple operating switching modes.
Regarding claim 13, Gwynne in view of Ouyang discloses wherein the secondary switch circuit comprises a first switch [30] and a second switch [31], a first terminal of the first switch is coupled to an output capacitor [Co] to provide the output voltage, a second terminal of the first switch and a first terminal of the second switch are coupled to a first terminal of the secondary winding [through 29], and a second terminal of the second switch is coupled to a secondary reference ground [GND].
Regarding claim 15, Gwynne in view of Ouyang discloses [fig. 2] wherein when the input control signal is changed to a first input control state [on state], the upper switch is turned on at least in one switching period with a first duty cycle [fig. 4], and when the input control signal is changed to a second input control state [off state], the upper switch is turned on at least in one switching period with a second duty cycle, wherein the second duty cycle is not equal to the first duty cycle [fig. 4].
Regarding claim 16, Gwynne in view of Ouyang discloses [fig. 2] wherein the output control signal is configured to control the power switching device to turn on or turn off in response to the state of the input control signal.
Regarding claim 17, Gwynne in view of Ouyang discloses [fig. 2] wherein the decoding circuit is configured to control the output control signal to switch between a first output control state and a second output control state according to the duty cycle of the secondary signal.
Regarding claim 18, Gwynne discloses an isolated driving [fig. 2] method for driving a power switching device [226], comprising: receiving an input voltage [DC in] and an input control signal [PWM command input]; controlling a primary circuit [217] to turn on and turn off according to the input control signal, wherein the primary circuit is coupled to a primary winding [primary winding] of a transformer [218a], and the primary circuit is configured to receive the input voltage and provide a primary signal [208a~208d] at the primary winding, and wherein a secondary winding of the transformer [secondary winding of 218a] is induced by the primary signal to provide a secondary signal [209a~209d]; providing an output voltage [voltage at 204] by the secondary signal, wherein the output voltage is used for providing power for driving the power switching device [226]; and providing an output control signal [signal 225] according to the secondary signal, wherein the output control signal is used for controlling the power device to turn on and turn off; wherein in response to a first input control state [on state] of the input control signal, the primary circuit is controlled to be turned on and off in a first sequence [first sequence 207a-207d], to provide the primary signal with first characteristics, and in response to a second input control state [off state] of the input control signal, in the primary circuit is controlled to be turned on and off in a second sequence [second sequence 207a-207d] to provide the primary signal with second characteristics. Gwynne does not explicitly disclose controlling at least one switch in a primary switch circuit to turn on and turn off according to an input control signal, wherein the primary switch circuit is coupled to a primary winding; providing an output voltage by rectifying the secondary signal, wherein the output control signal is used for controlling the power switching device to turn on and turn off; the at least one switch in the primary switch circuit is controlled to be turned on and off in a first sequence and in response to a second input control state [off state] of the input control signal, the at least one switch in the primary switch circuit is controlled to be turned on and off in a second sequence.
However, Ouyang discloses at least one switch [21/22] in a primary switch circuit [101] to turn on and turn off according to an input control signal [user input, fig. 1], wherein the primary switch circuit is coupled to a primary winding [27, fig. 2]; providing an output voltage [Vo] by rectifying [104] the secondary signal, wherein the output control signal is used for controlling the power switching device to turn on and turn off; the at least one switch in the primary switch circuit is controlled to be turned on and off in a first sequence [fig. 4] and in response to a second input control state [off state] of the input control signal, the at least one switch in the primary switch circuit is controlled to be turned on and off in a second sequence [fig. 4]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Gwynne by incorporating primary and secondary switch circuits as taught in Ouyang in order provide an improved isolated driver that supports multiple operating switching modes.
Regarding claim 19, Gwynne in view of Ouyang discloses [fig. 2 and 4] wherein the output control signal controls the power switching device to turn on in response to the input control signal changing to the first input control state, and the output control signal controls the power switching device to turn off in response to the input control signal changing to the second input control state, and the switching period is a switching period of the primary switch circuit.
Regarding claim 20, Gwynne in view of Ouyang discloses [fig. 2 and 4] wherein providing the output control signal according to the secondary signal comprises: in response to the first characteristics of the secondary signal, controlling the output control signal to switch to a first output control state [on state] to control the power switching device to turn on; and in response to the second characteristics of the secondary signal, controlling the output control signal to switch to the second output control state [off state] to control the power switching device to turn off.
Claims 7, 10, 12 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Gwynne in view of Ouyang further in view of Luccato et al. (US 2018/0331629 and Luccato hereinafter).
Regarding claims 7 and 12, Gwynne in view of Ouyang, discloses all the features with respect to claims 6 and 11 as outlined above. Gwynne in view of Ouyang does not explicitly disclose wherein a second terminal of the primary winding is coupled to the primary reference ground through a first capacitor.
However, Luccato discloses [fig. 2] wherein a second terminal of a primary winding [T1] is coupled to primary reference ground [GND1] through a first capacitor [CRP]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Gwynne in view of Ouyang by incorporating a capacitor as taught in Luccato in order to provide transformer controlled current path to ground.
Regarding claims 10 and 14, Gwynne in view of Ouyang discloses all the features with respect to claims 9 and 11 as outlined above. Gwynne in view of Ouyang does not explicitly disclose wherein a second terminal of the secondary winding is coupled to the secondary reference ground through a second capacitor.
However, Luccato discloses [fig. 2] wherein a second terminal of a secondary winding [T2] is coupled to secondary reference ground [GND2] through a second capacitor [CRS]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Gwynne in view of Ouyang by incorporating a capacitor as taught in Luccato in order to provide transformer controlled current path to ground.
Conclusion
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/METASEBIA T RETEBO/Primary Examiner, Art Unit 2836
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