Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office action is in response to Applicant' s communication filed 5/29/2026 in response to the Office action dated 4/7/2026. Claims 1-2, 12-13, and 20 have been amended. Claims 1-20 are pending in this application.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-9, 12-14, and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Durham et al. (US 20190042764 A1), hereinafter Durham, in view of Narendra Trivedi et al. (US 20160110540 A1), hereinafter Narendra.
Regarding claim 1, Durham teaches a method by a processor (Paragraph 112; Fig. 9, method performed by a processor), comprising:
obtaining information indicating an operation relates to an external workload of a plurality of external workloads supported by the processor (Paragraphs 112, 116; Fig. 9, step 902, the processor obtains an access request from a guest workload/virtual machine VM which includes address and encryption information); and
processing the operation based on the information (Paragraphs 118-119; Fig. 9, step 914, processing the access request using the address information).
Durham does not explicitly teach an off-application processor (off-AP) external workload.
However, Narendra teaches an off-application processor (off-AP) external workload (Paragraph 19, offloading application workloads from a core processor to another device which executes the workload in a secure processing environment).
Durham and Narendra are analogous art because they are in the same field of endeavor, that being virtual memory partitioning. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Durham to further include the off-application processor external workload according to the teachings of Narendra. The motivation for doing so would have been to reduce the load on an application processor by offloading application workloads to separate, specialized devices (Narendra, Paragraph 19).
Regarding claim 2, Durham teaches the method of claim 1, wherein: the processor is associated with a first security state (Paragraph 79; Fig. 5, processor 514 utilizes unencrypted [first security state] memory 512U); and
the external workload involves access to memory associated with a second security state (Paragraph 79; Fig. 5, the consumer workload is provided an encrypted [second security state] region of memory to store and access code and data).
Durham does not explicitly teach the off-AP external workload.
However, Narendra teaches the off-AP external workload (Paragraph 19, offloading application workloads from a core processor to another device which executes the workload in a secure processing environment).
Durham and Narendra are analogous art because they are in the same field of endeavor, that being virtual memory partitioning. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Durham to further include the off-AP external workload according to the teachings of Narendra. The motivation for doing so would have been to reduce the load on an application processor by offloading application workloads to separate, specialized devices (Narendra, Paragraph 19).
Regarding claim 3, Durham in view of Narendra teaches the method of claim 1, wherein the information is obtained via a plurality of physical address space (PAS) signals (Durham, Paragraphs 50, 112; Figs. 2 and 9, step 902, receiving a guest physical address included in a request, which is communicated from a guest/consumer to the host/provider via internet 220 [signals]).
Regarding claim 5, Durham in view of Narendra teaches the method of claim 1, wherein the information is obtained via a translation lookaside buffer (TLB) (Durham, Paragraph 16, address translation information is managed by a translation lookaside buffer TLB).
Regarding claim 6, Durham in view of Narendra teaches the method of claim 1, wherein the information is obtained via a data structure associated with at least one memory management unit (MMU) (Durham, Paragraphs 45-46; Fig. 1, virtual machine monitor VMM layer 120 [memory management unit] is firmware ran on server hardware 110 which uses data structures such as extended page tables EPTs 126 to manage address translation information).
Regarding claim 7, Durham in view of Narendra teaches the method of claim 1, wherein the processing comprises initiating a cache flush if the information indicates a change in contents of a memory partitioning table (Durham, Paragraphs 73, 75-76; Fig. 4, steps 4.9, 4.11, flushing caches after updating [changing the contents of] memory ownership table 480 [memory partitioning table]).
Regarding claim 8, Durham in view of Narendra teaches the method of claim 1, wherein: the operation involves a virtual address (VA) that maps to a physical address (PA) (Durham, Paragraph 112; Fig. 9, step 902, receiving a request which includes a guest virtual address that corresponds to an actual hardware physical address HPA); and
the information is obtained via a table used to determine whether one or more physical address spaces (PASs) are allowed for the PA (Durham, Paragraphs 115-117; Fig. 9, steps 906-910, determining whether to allow access to the hardware physical address HPA using a memory ownership table MOT).
Regarding claim 9, Durham in view of Narendra teaches the method of claim 8, wherein information in the table is encoded to support the plurality of external workloads (Durham, Paragraphs 115-116, 125; Fig. 10, the entries of the memory ownership table MOT are encrypted and correspond to multiple guest workloads/VMs).
Regarding claim 12, Durham teaches a method by a processor (Paragraph 112; Fig. 9, method performed by a processor), comprising:
providing information indicating an operation relates to an external workload of a plurality of external workloads supported by the processor (Paragraphs 112, 116; Fig. 9, step 902, a guest workload/VM sends an access request which includes address and encryption information to a processor); and
processing the operation in accordance with the information (Paragraphs 118-119; Fig. 9, step 914, processing the access request using the address information).
Durham does not explicitly teach an off-application processor (off-AP) external workload.
However, Narendra teaches an off-application processor (off-AP) external workload (Paragraph 19, offloading application workloads from a core processor to another device which executes the workload in a secure processing environment).
Durham and Narendra are analogous art because they are in the same field of endeavor, that being virtual memory partitioning. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Durham to further include the off-application processor external workload according to the teachings of Narendra. The motivation for doing so would have been to reduce the load on an application processor by offloading application workloads to separate, specialized devices (Narendra, Paragraph 19).
Regarding claim 13, Durham teaches the method of claim 12, wherein: the information is provided to another processor associated with a first security state (Paragraphs 18, 60-61; Fig. 3, accessing, using address information, a consumer’s key domain 350 containing VMs 330 (including a logical processor) which is encrypted with a domain key [first security state]); and
the external workload involves access to memory associated with a second security state (Paragraphs 60-61, accessing memory as part of a workload in another separate key domain 312U with a different domain key [second security state]).
Durham does not explicitly teach the off-AP external workload.
However, Narendra teaches the off-AP external workload (Paragraph 19, offloading application workloads from a core processor to another device which executes the workload in a secure processing environment).
Durham and Narendra are analogous art because they are in the same field of endeavor, that being virtual memory partitioning. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Durham to further include the off-AP external workload according to the teachings of Narendra. The motivation for doing so would have been to reduce the load on an application processor by offloading application workloads to separate, specialized devices (Narendra, Paragraph 19).
Regarding claim 14, Durham in view of Narendra teaches the method of claim 12, wherein the information is provided via a plurality of physical address space (PAS) signals (Durham, Paragraphs 50, 112; Figs. 2 and 9, step 902, sending a guest physical address included in a request, which is communicated from a guest/consumer to the host/provider via internet 220 [signals]).
Regarding claim 16, Durham in view of Narendra teaches the method of claim 12, wherein the information is provided via a translation lookaside buffer (TLB) (Durham, Paragraph 16, address translation information is managed by a translation lookaside buffer TLB).
Regarding claim 17, Durham in view of Narendra teaches the method of claim 12, wherein the information is provided via a data structure associated with at least one memory management unit (MMU) (Durham, Paragraphs 45-46; Fig. 1, virtual machine monitor VMM layer 120 [memory management unit] is firmware ran on server hardware 110 which uses data structures such as extended page tables EPTs 126 to manage address translation information).
Regarding claim 18, Durham in view of Narendra teaches the method of claim 12, wherein: the operation involves a virtual address (VA) that maps to a physical address (PA) (Durham, Paragraph 112; Fig. 9, step 902, receiving a request which includes a guest virtual address that corresponds to an actual hardware physical address HPA); and
the information is obtained via a table used to determine whether one or more physical address spaces (PASs) are allowed for the PA (Durham, Paragraphs 115-117; Fig. 9, steps 906-910, determining whether to allow access to the hardware physical address HPA using a memory ownership table MOT).
Regarding claim 19, Durham in view of Narendra teaches the method of claim 18, wherein information in the table is encoded to support the plurality of external workloads (Durham, Paragraphs 115-116, 125; Fig. 10, the entries of the memory ownership table MOT are encrypted and correspond to multiple guest workloads/VMs).
Regarding claim 20, this is an apparatus version of the claimed method discussed above (claim 1, respectively), wherein Durham in view of Narendra also teaches an apparatus comprising at least one memory comprising instructions (Durham, Paragraph 174, non-transitory storage medium storing instructions);
and at least one processor configured to execute the instructions (Durham, Paragraph 174, SoC or other processor performs the operations).
The remaining claim limitations have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, this claim is also obvious over Durham in view of Narendra.
Claims 4 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Durham in view of Narendra as applied to claims 1 and 12 above, and further in view of Guo et al. (US 20240118913 A1), hereinafter Guo.
Regarding claim 4, Durham in view of Narendra teaches the method of claim 1, wherein the information is obtained via a plurality of bits (Durham, Paragraph 116, encryption information is stored within bits of the address information).
Durham in view of Narendra does not explicitly teach wherein the information is obtained on a bus or network on a chip (NoC).
However, Guo teaches wherein the information is obtained on a bus or network on a chip (NoC) (Paragraph 119, Memory Encryption ME technology transfers encryption information over external memory buses).
Durham, Narendra, and Guo are analogous art because they are in the same field of endeavor, that being virtual memory partitioning. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Durham in view of Narendra to further include the information being obtained on a bus according to the teachings of Guo. The motivation for doing so would have been to provide data protection without modification to existing hardware (Guo, Paragraph 119).
Regarding claim 15, Durham in view of Narendra teaches the method of claim 12, wherein the information is provided via a plurality of bits (Durham, Paragraph 116, encryption information is stored within bits of the address information).
Durham in view of Narendra does not explicitly teach wherein the information is provided on a bus or network on a chip (NoC).
However, Guo teaches wherein the information is provided on a bus or network on a chip (NoC) (Paragraph 119, Memory Encryption ME technology transfers encryption information over external memory buses).
Durham, Narendra, and Guo are analogous art because they are in the same field of endeavor, that being virtual memory partitioning. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Durham in view of Narendra to further include the information being provided on a bus according to the teachings of Guo. The motivation for doing so would have been to provide data protection without modification to existing hardware (Guo, Paragraph 119).
Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Durham in view of Narendra as applied to claim 1 above, and further in view of Bahirji et al. (US 20200409576 A1), hereinafter Bahirji.
Regarding claim 10, Durham in view of Narendra teaches the method of claim 1, but does not explicitly teach further comprising determining a quantity of external workloads supported.
However, Bahirji teaches determining a quantity of external workloads supported (Paragraphs 62-63; Fig. 4, VMM 406 determines the number of virtual machines [external workloads] that may be supported by memory pool table 408 on startup).
Durham, Narendra, and Bahirji are analogous art because they are in the same field of endeavor, that being virtual memory partitioning. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Durham in view of Narendra to further include the determining a quantity of supported external workloads according to the teachings of Bahirji. The motivation for doing so would have been to improve memory management by determining the maximum amount of workloads/VMs the hardware is capable of supporting (Bahirji, Paragraphs 63, 102).
Regarding claim 11, Durham in view of Narendra, further in view of Bahirji teaches the method of claim 10, wherein the quantity of external workloads supported is adjustable (Bahirji, Paragraphs 62-63; Fig. 4, VMM 406 can use more or fewer bits in the virtual machine index to increase or reduce the number of supported VMs [external workloads]).
Response to Arguments
Applicant’s arguments (see pages 5-6 of the remarks) filed 5/29/2026, with respect to the rejections of claims 1-3, 5-9, 12-14, and 16-20 under 35 U.S.C 102 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Durham and Narendra.
Applicant’s arguments (see pages 6-7 of the remarks) filed 5/29/2026, with respect to the rejections of claims 4, 10-11, and 15 under 35 U.S.C 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Durham, Narendra, Guo, and Bahirji.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Pinga whose telephone number is (571) 272-2620. The examiner can normally be reached on M-F 8:30am-6pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla, can be reached on (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/J.M.P./Examiner, Art Unit 2137
/Arpan P. Savla/Supervisory Patent Examiner, Art Unit 2137
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