Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 7 & 17 are objected to because of the following informalities.
Regarding Claims 7 & 17, Applicant recites, “are in a shape of trapezoid”. This phrase is grammatically incorrect but would be correct if the word “a” was inserted after the word “of” and before the word “trapezoid”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 10 & 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding Claim 10, Applicant recites, “the doped conductive layer includes N-type doping elements”. Its unclear if these doping elements correspond to the N-type doping element already recited or if new distinct elements are being introduced. Appropriate action is required.
Regarding Claim 20, Applicant recites, “the doped conductive layer includes N-type doping elements”. Its unclear if these doping elements correspond to the N-type doping element already recited or if new distinct elements are being introduced. Appropriate action is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-5, and 8-9 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-10 of U.S. Patent No. 12,278,299 B1. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 10 of U.S. Patent No. 12,278299 B1 anticipates claim 1 of the instant application. Claims 2-5 of the instant application are taught in claims 1-4 of U.S. Patent No. 12,278,299 B1, claims 8-10 are taught in claims 6-9 of U.S. Patent No. 12,278,299 B1.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 6, 11, and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chung et al. (US 2017/0179325 A1)
In view of Claims 1 & 11, Chung et al. discloses a photovoltaic module (Fig. 36, #200 & Paragraph 0504) comprising:
at least one cell string formed by connecting a plurality of solar cells (Fig. 36, #101-#102 – Paragraph 0504-0505);
at least one encapsulation adhesive layer configured to cover surfaces of the at least one cell string (Fig. 36, #230 & Paragraph 0515);
at least one cover plate configured to cover surfaces of the at least one encapsulation adhesive layer facing away from the at least one cell string (Fig. 36, #210, #220 & Paragraph 0515);
wherein each of the solar cell of the plurality of solar cells comprise:
an N-type silicon substrate (Fig. 35O, #10 & Paragraph 0056-0057) having a front surface (Fig. 35O, #10 top surface) and a rear surface opposite to the front surface (Fig. 35O, #10 bottom surface),
wherein the front surface has a plurality of pyramid structures (Fig. 35O, #10 top surface – Paragraph 0051);
the rear surface has a plurality of grooves recessed relative to the rear surface and at least one subset of the plurality of grooves is arranges sequentially along one arrangement direction (Fig. 33, #40b & Paragraph 0075);
a passivation layer formed over the front surface (Fig. 35O, #24 – Paragraph 0081);
a tunneling dielectric layer formed on the rear surface (Fig. 35O, #202 & Paragraph 0096);
a doped conductive layer (Fig. 35O, #302), wherein the doped conductive layer includes first portions and second portions formed at intervals, the first portions are doped with one of a N-type doping element and a P-type doping element and the second portions are doped with the other one of the N-type doping element and the P-type doping element (Fig. 35O, #32, #34 – Paragraph 0056-0057).
In view of Claims 6 & 16, Chung et al. is relied upon for the reasons given above in addressing Claims 1 & 11. Chung et al. teaches that respective orthographic projections of at least some grooves of the at least one subset of the plurality of grooves on the N-type silicon substrate have circular shapes of circle-like shapes (Fig. 33, #40b & Paragraph 0075).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chung et al. (US 2017/0179325 A1) in view of Yu et al. (AU 2021225144 B1).
In view of Claims 1 & 11, Chung et al. discloses a photovoltaic module (Fig. 36, #200 & Paragraph 0504) comprising:
at least one cell string formed by connecting a plurality of solar cells (Fig. 36, #101-#102 – Paragraph 0504-0505);
at least one encapsulation adhesive layer configured to cover surfaces of the at least one cell string (Fig. 36, #230 & Paragraph 0515);
at least one cover plate configured to cover surfaces of the at least one encapsulation adhesive layer facing away from the at least one cell string (Fig. 36, #210, #220 & Paragraph 0515);
wherein each of the solar cell of the plurality of solar cells comprise:
an N-type silicon substrate (Fig. 35O, #10 & Paragraph 0056-0057) having a front surface (Fig. 35O, #10 top surface) and a rear surface opposite to the front surface (Fig. 35O, #10 bottom surface),
wherein the front surface has a plurality of pyramid structures (Fig. 35O, #10 top surface – Paragraph 0051);
the rear surface has a plurality of grooves (Fig. 22, SD & Paragraph 0310); or in the alternative (Fig. 33, #40b & Paragraph 0075):
the rear surface has a plurality of grooves recessed relative to the rear surface and at least one subset of the plurality of grooves is arranges sequentially along one arrangement direction (Fig. 33, #40b & Paragraph 0075);
a passivation layer formed over the front surface (Fig. 35O, #24 – Paragraph 0081);
a tunneling dielectric layer formed on the rear surface (Fig. 35O, #202 & Paragraph 0096);
a doped conductive layer (Fig. 35O, #302), wherein the doped conductive layer includes first portions and second portions formed at intervals, the first portions are doped with one of a N-type doping element and a P-type doping element and the second portions are doped with the other one of the N-type doping element and the P-type doping element (Fig. 35O, #32, #34 – Paragraph 0056-0057).
Chung et al. does not disclose the rear surface has a plurality of grooves recessed relative to the rear surface and at least one subset of the plurality of grooves is arranged sequentially along one arrangement direction.
Yu et al. a rear surface of a solar cell that has a plurality of grooves, some grooves of the plurality of grooves being arranged sequentially along one arrangement direction (See Annotated Yu et al. Fig. 3, below).
Annotated Yu et al. Figure 3
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Yu et al. at least one groove of the plurality of grooves is recessed relative to the rear surface (Paragraph 0087, 0091, 0099-0103 – the grooves are formed via etching solution and thus these grooves are formed by removing material from the rear surface and would be “recessed” relative to the rear surface) and has a bottom surface, a top opening opposite to the bottom surface, and a side wall located between the bottom surface and the top opening, and an area of an orthographic projection of the bottom surface on the N-type silicon substrate is less than an area of an orthographic projection of the top opening on the N-type silicon substrate (See Annotated Yu et al. Figure 3, below & Paragraph 0052-0057). Yu et al. teaches that this configuration ensures that the roughness of the rear surface of the semiconductor substrate is controlled with an ideal range and it can be ensured that the roughness of the rear surface of the semiconductor substrate is within an appropriate range which helps to improve the uniformity of the tunnel oxide layer formed on the first texture structure, ensures better performance of the tunnel oxide layer formed, and further inhibits high local doping concentration of the doped conductive layer, reduces contact resistivity, and improves the open-circuit voltage of the solar cell, and improves the fill factor and photoelectric conversion efficiency (Paragraph 0020). Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to incorporate the rear texturing configuration of Yu et al. on the rear surface of Chung et al. substrate such that the rear surface has a plurality of grooves recessed relative to the rear surface and at least one subset of the plurality of grooves is arranged sequentially along one arrangement direction for the advantages of ensuring that the roughness of the rear surface of the semiconductor substrate is controlled with an ideal range and thus ensuring that the roughness of the rear surface of the semiconductor substrate is within an appropriate range to improve the uniformity of the tunnel oxide layer formed on the first texture structure, thus ensuring better performance of the tunnel oxide layer formed, and further inhibiting high local doping concentration of the doped conductive layer, reducing contact resistivity, while improving the open-circuit voltage of the solar cell, and improving the fill factor and photoelectric conversion efficiency.
Annotated Yu et al. Figure 3
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In view of Claims 2 & 12, Chung et al. and Yu et al. are relied upon for the reasons given above in addressing Claims 1 & 11. Yu et al. discloses the plurality of grooves include N groove groups, any one groove group of the N groove groups includes grooves arranged sequentially in a corresponding arrangement direction, arrangement directions of some groove groups of the N groove groups are the same, while arrangement directions of some groove groups of the N groove groups are different, and N is a positive integer greater than 2 (See Annotated Yu et al. Figure 3, above).
In view of Claims 3-4, and 13-14, Chung et al. and Yu et al. are relied upon for the reasons given above in addressing Claims 2 & 11. Yu et al. teaches at least two first groove groups of the N groove groups are next to each other and spaced apart from each other by an interval, and at least two second groove groups of the N groove groups overlap with each other by an overlapping region (See Annotated Yu et al. Figure 3, below).
Annotated Yu et al. Figure 3
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In view of Claims 5 & 15, Chung et al. and Yu et al. are relied upon for the reasons given above in addressing Claims 1 & 11. Yu et al. teaches in a direction away from the rear surface, a single groove of the plurality of grooves includes a bottom surface, a top opening opposite to the bottom surface and a side wall located between the bottom surface and the top opening, and an area of an orthographic projection of the bottom surface on the N-type silicon substrate is less than an area of an orthographic projection of the top opening on the N-type silicon substrate (See Annotated Yu et al. Figure 3, below).
Annotated Yu et al. Figure 3
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In view of Claims 6 & 16, Cheng et al. and Yu et al. are relied upon for the reasons given above in addressing Claims 1 & 11. Chung et al. teaches the respective orthographic projections of at least some grooves of the at least one subset of the plurality of grooves on the N-type silicon substrate have circular shapes of circle-like shapes (Fig. 33, #40b & Paragraph 0075).
Annotated Yu et al. Figure 3
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In view of Claims 7 & 17, Cheng et al. and Yu et al. are relied upon for the reasons given above in addressing Claims 1 & 11. Yu et al. teaches that the vertical cross-section of at least some of the plurality of grooves are in a shape of a trapezoid that is tapered in direction directing from the rear surface to the front surface (See Annotated Yu et al. Figure 3, below).
In view of Claims 8 & 18, Chung et al. and Yu et al. are relied upon for the reasons given above in addressing Claims 1 & 11. In regards to the limitation, “a distribution density of the plurality of grooves on the rear surface ranges from 1000/mm2 to 50000/mm2”. Applicant discloses that the plurality of grooves on the rear surface are formed by an etching process, wherein the etching solution comprises 2% to 5% sodium hydroxide (Instant Specification – Paragraph 0127), at a temperature between 70-85°C (Instant Specification – Paragraph 0132), at a time of 50-300 seconds (Instant Specification – Paragraph 0135-0137).
Yu et al. discloses that the plurality of grooves are also formed by an etching process, wherein the etching solution comprises 1% to 15% sodium hydroxide, at a temperature between 70-80°C, at a time of 80-250 seconds (Paragraph 00106). Accordingly, as evidenced by Applicant’s specification, the method of Yu et al. would produce “a distribution density of the plurality of grooves on the rear surface ranges from 1000/mm2 to 50000/mm2”.
Additionally, Yu et al. is disclosing the same method for producing the plurality of grooves as Applicant, therefore under the principles of inherency, the production method of Yu et al. solar cell (in its normal and usual production method as outlined above) would necessarily produce the same distribution density of the plurality of grooves on the rear surface which would range from 1000/mm2 to 50000/mm2. See MPEP 2112.02
In view of Claims 9 & 19, Chung et al. and Yu et al. are relied upon for the reasons given above in addressing Claims 1 & 11. Yu et al. teaches that in a direction away from the rear surface, a maximum value of a depth of a single groove of the plurality of grooves ranges from 0.1 to 2 microns or 100 to 2000 nm (Paragraph 0113). See MPEP 2131.03.
In view of Claims 10 & 20, Chung et al. and Yu et al. are relied upon for the reasons given above in addressing Claims 1 & 11. Chung et al. teaches that the doped conductive layer includes N-type doping elements (Fig. 35O, #32 & Paragraph 0057) and the doped conductive layer (Fig. 35O, #32) is formed over a surface of the tunneling dielectric layer (Fig. 35O, #202) facing away from the N-type silicon substrate (Fig. 35O, #10).
Conclusion
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/DANIEL P MALLEY JR./Primary Examiner, Art Unit 1726