DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement PTO-1449
The Information Disclosure Statement submitted by applicant on 01-12-2026 and -2025 have been considered. Please see attached PTO-1449.
Claim Rejections - 35 USC § 101
835 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-19 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
The claims when analyzed under 2019 Revised Patent Subject Matter Eligibility Guidance, are directed to abstract idea. Claim 1 for example, recites a device and, therefore, is a machine.
The claim recites the limitation of “…receive…feature engineering data for an artificial neural network; receive… coefficient data for the artificial neural network; and reconstruct the artificial neural network based on the feature engineering data, the coefficient data, and an algorithm”. These limitations, under broadest reasonable interpretation are directed performance of the limitation by human or in human mind. That is, nothing in the claim element precludes the step from practically being performed in the mind. For example, the claim encompasses a human simply receive feature engineering data and coefficient data on a piece of paper and reconstruct artificial neural network based on the feature engineering data , coefficient data and an algorithm. Thus, the claim recites abstract idea when analyzed under step 2A prong 1.
Claim 1 is further analyzed in step 2A prong 2, to evaluate whether the claim as a whole integrates the recited judicial exception into a practical application of the exception. This evaluation is performed by identifying whether there are any additional elements recited in the claim beyond the judicial exception, and evaluating those additional elements individually and in combination to determine whether the claim as a whole integrates the exception into a practical application. However, the remaining limitation (hardware security module, processor) are general computer components. Each of the additional limitations is no more than mere instruction to apply the exception using a generic computer components. The combination of these additional element is no more than generic computer functions. Thus, even in combination, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limitations on practicing the abstract idea.
Claim 1 is additionally analyzed under Step 2B to evaluates whether the claim as a whole amount to significantly more than the recited exception, whether any additional element, or combination of additional elements, adds an inventive concept to the claim. When claims evaluated under step 2B, it is no more than what is well-understood, routine, conventional activity in the field. The specification does not provide any indication anything other than a generic computer component. The mere “…receive…feature engineering data for an artificial neural network; receive… coefficient data for the artificial neural network; and reconstruct the artificial neural network based on the feature engineering data, the coefficient data, and an algorithm” is a well-understood, routing and conventional function when it is claimed in a merely generic manner as it is here.
Independent claims 11 and 15 include limitations similar to the limitations of claim 1 and are rejected under 35 U.S.C. 101 as being directed to abstract idea for the same reasons discussed above with respect to claim 1.
In claim 2, the hardware security module comprises a first memory configured to store the coefficient data and the feature engineering data. The additional element of first memory is generic computer component and is recited at a high level of generality. Storing the coefficient data and feature engineering data is merely gathering data which is considered insignificant extra solution activity. Insignificant extra-solution activity does not amount to an inventive concept, particularly when the activity is well-understood or conventional. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose meaningful limits on practicing the abstract idea.
In claim 3,wherein the feature engineering data represent a feature that has been extracted from raw data for inputting into the artificial neural network, wherein the feature corresponds to an input to a node of the artificial neural network, is merely gathering data which is considered insignificant extra-solution activity. Insignificant extra-solution activity does not amount to an inventive concept, particularly when the activity is well-understood or conventional. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose meaningful limits on practicing the abstract idea.
In claim 4, wherein the coefficient data represent a weight for each connection between nodes of the artificial neural network, is merely gathering data which is considered insignificant extra solution activity. Insignificant extra-solution activity does not amount to an inventive concept, particularly when the activity is well-understood or conventional. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose meaningful limits on practicing the abstract idea.
In the claim 5, wherein the hardware security module comprises a first memory configured to store a first representation of the artificial neural network, is merely gathering data which is considered insignificant extra solution activity. The limitation of: wherein the processor is configured to generate a second representation of a candidate artificial neural network, wherein the candidate artificial neural network corresponds to the reconstructed artificial neural network, could be performed by human. A human could simply generate a second representation of a candidate artificial neural network by using pen and paper; and verify or not verify the candidate artificial neural network by comparing the second representation with the first representation. The claimed hardware security module and memory are generic computer component. The additional elements of implementing the steps using the generic computer components amounts to no more than mere instructions to apply the exception using generic computer components and therefore do not integrate the abstract idea into a practical application or supply an inventive concept.
In claim 6, wherein the first representation is a first hash value; wherein the second representation of the candidate artificial neural network is a second hash value of the candidate artificial neural network; wherein the first hash value is a result of a hash function as applied to the artificial neural network; and wherein generating the second representation comprises the processor generating the second hash value by applying the hash function to the candidate artificial neural network, is considered mathematical operations. The court has found that mathematical relationships fall within the judicial exception, labeled as abstract idea. The claim does not improve the functioning of a computer or another technology, and does not otherwise integrate the abstract idea into a practical application because each limitation being claimed is part of mathematical operation and can be drawn to mathematical relationship.
In claim 7, wherein at least one of the processor or the hardware security module is configured to check whether the second representation corresponds to the first representation using a public key corresponding to a private key, could be performed by human. A human could compare a first representation with a second representation by using a key. The claimed processor or the hardware security module are generic computer component. The additional elements of implementing the steps using the generic computer components amounts to no more than mere instructions to apply the exception using generic computer components and therefore do not integrate the abstract idea into a practical application or supply an inventive concept.
In claim 8, wherein the first representation is the first hash value signed with a private key, is considered mathematical operation. The court has found that mathematical relationships fall within the judicial exception, labeled as abstract idea. The claim does not improve the functioning of a computer or another technology, and does not otherwise integrate the abstract idea into a practical application because the limitation being claimed is part of mathematical operation and can be drawn to mathematical relationship.
In claim 9, wherein the hardware security module comprises a first memory configured to store a first representation of the artificial neural network, is merely gathering data which is considered insignificant extra solution activity. The limitation of wherein the processor is configured to generate a second representation of a candidate artificial neural network, wherein the candidate artificial neural network corresponds to the reconstructed artificial neural network, could be performed by human. A human could simply generate a second representation of a candidate artificial neural network by using pen and paper. The limitation of wherein at least one of the hardware security module or the processor is configured to (i) recover the second representation by decrypting a signed version of the second representation using a public key and (ii) at least one of: verify the candidate artificial neural network when the first representation is identical to the decrypted second representation; or not verify the candidate artificial neural network when the first representation is not identical to the decrypted second representation, is considered as mathematical operation. A human by use of pen and paper could simply perform a mathematical operation to decrypt a signed version of the second representation using a public key and verify or not verify by comparing decrypted versions of representations. Additionally, the claimed hardware security module, memory and processor are generic computer component. The additional elements of implementing the steps using the generic computer components amounts to no more than mere instructions to apply the exception using generic computer components and therefore do not integrate the abstract idea into a practical application or supply an inventive concept.
In claim 10, wherein the hardware security module is configured to permit the processor access to the feature engineering data and the coefficient data after the hardware security module authenticates the processor or a user of the processor, is merely gathering data which is considered insignificant extra solution activity. Insignificant extra-solution activity does not amount to an inventive concept, particularly when the activity is well-understood or conventional. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose meaningful limits on practicing the abstract idea.
Dependent claims 12-14 and 16-20 recite limitations similar to the limitations of claims 2-10, and are rejected under 35 U.S.C. 101 for being directed to an abstract idea for the same reasons.
Claim Rejections - 35 USC § 102
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 4, 11, 13, 15 and 17 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Minezawa et al. (US Publication No. 2020/0184318), hereinafter Minezawa .
As per claim 1, 11 and 15, Minezawa discloses, a device comprising: a hardware security module; and a processor (paragraph [0033], [0059]) configure to: receive, from the hardware security module, feature engineering data for an artificial neural network; receive, from the hardware security module, coefficient data for the artificial neural network reconstruct the artificial neural network based on the feature engineering data and an algorithm, the coefficient data, and an algorithm ( paragraph [0035], “the data processing unit 101 [hardware security module] outputs network configuration information including…quantized parameter data …”, paragraph [0040]-[0041], the network configuration information includes for example the number of network layers and nodes for each of layers, edges, activation function, and type information for each of the layer and weight (coefficient) information assigned to each of the edges, ( number of network layers and nodes for each of layers, edges, activation function, and type information for each of the layer, correspond to the feature engineering data) an paragraph [0057], “the data process unit 202 constructs a neural network using the network configuration information including the inversely quantized parameter data”).
As per claim 4, Minezawa furthermore disclose, wherein the coefficient data represent a weight for each connection between nodes of the artificial neural network (paragraph [0041], “The parameter data of the neural network includes, for example, weight information assigned to edges that connect nodes of the neural network”).
As per claims 13 and 17, Minezawa furthermore discloses reconstructing the artificial neural network by integrating the feature engineering data and the coefficient data according to the algorithm ( paragraph [0040]-[0041], the network configuration information includes for example the number of network layers and nodes for each of layers, edges, activation function, and type information for each of the layer and weight (coefficient) information assigned to each of the edges, ( number of network layers and nodes for each of layers, edges, activation function, and type information for each of the layer, correspond to the feature engineering data) an paragraph [0057], “the data process unit 202 constructs a neural network using the network configuration information including the inversely quantized parameter data”).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Minezawa in view of Sun et al. (US Publication No. 2021/0365333), hereinafter Sun.
As per claim 2, Minezawa does not explicitly disclose, but in an analogous art, Sun discloses, wherein the hardware security module comprises a first memory configured to store the coefficient data and the feature engineering data (paragraph [0052], “the non-volatile memory 340 includes file data 341, meta data 342 [feature engineering], weight data 343 [coefficient data], and result data 344).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the modified Minezawa with Sun. This would have been obvious because one of ordinary skill in the art would have been motivated to do so in order to decrease the amount of time to access more important and frequently accessed data files.
Claims 3, 12 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Minezawa, further in view of Xu et al. (US Publication No. 2022/0292357), hereinafter Xu.
As per claim 3, Minezawa does not explicitly disclose, but in an analogous art Xu discloses, wherein the feature engineering data represent a feature that has been extracted from raw data for inputting into the artificial neural network, wherein the feature corresponds to an input to a node of the artificial neural network (paragraph [0102], “Feature engineering is a process of using related knowledge in the data field to create a feature that can enable a machine learning algorithm to achieve optimal performance, and is a process of converting raw data into a feature. A purpose of feature engineering is to extract a feature from the raw data to a maximum degree, for use by an algorithm and a model”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Minezawa with Xu. This would have been obvious because one of ordinary kill in the art would have been motivated to increase efficiency in automatic machine learning.
As per claims 12 and 16, Minezawa discloses, wherein the feature corresponds to an input to a node of the artificial neural network, and wherein the coefficient data represent a weight for each connection between nodes of the artificial neural network furthermore (paragraph [0041], “The parameter data of the neural network includes, for example, weight information assigned to edges that connect nodes of the neural network”).
Minezawa does not explicitly disclose but in an analogous art, Xu discloses, wherein the feature engineering data represent a feature that has been extracted from raw data for inputting into the artificial neural network (Xu, paragraph [0102], “Feature engineering is a process of using related knowledge in the data field to create a feature that can enable a machine learning algorithm to achieve optimal performance, and is a process of converting raw data into a feature. A purpose of feature engineering is to extract a feature from the raw data to a maximum degree, for use by an algorithm and a model”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Minezawa with Xu. This would have been obvious because one of ordinary kill in the art would have been motivated to do so in order to increase efficiency in automatic machine learning.
Claims 5, 6, 14 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Minezawa, in view of Matlage et al. (US Publication No. 2022/0222541), hereinafter Matlage.
As per claims 5 and 14, Minezawa does not explicitly disclose, but in an analogous art, Matlage discloses, wherein the hardware security module comprises a first memory configured to store a first representation of the artificial neural network (paragraph [0278], “a data stream 45 having a representation of a neural network encoded thereinto, wherein the data stream 45 is structured into
individually accessible portions 200, each portion 200 representing a corresponding NN portion, e.g. comprising one or more NN layer or comprising portions of a NN layer, of the neural network, wherein the data stream 45 comprises for each of one or more predetermined individually accessible portions 200 an identification parameter 310 [first representation] for identifying the respective predetermined individually accessible portion 200”); wherein the processor is configured to generate a second representation of a candidate artificial neural network, wherein the candidate artificial neural network corresponds to the reconstructed artificial neural network (paragraphs [0388], “performs hashing on or apply error detection/correction code onto a certain individually accessible portion 200”); wherein at least one of the hardware security module or the processor is configured to at least one of: verify the candidate artificial neural network when the second representation corresponds to first representation; or not verify the candidate artificial neural network when the second representation does not correspond to the first representation (paragraph [0388], “compare the result with its corresponding identification parameter 310 so as to check a correctness of the individually accessible portion 200”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the Minezawa with Matlage. This would have been obvious because one of ordinary skill in the art would have been motivated to check integrity of neural network and make operation more error robust.
As per claim 6, Matlage furthermore discloses wherein the first representation is a first hash value; wherein the second representation of the candidate artificial neural network is a second hash value of the candidate artificial neural network; wherein the first hash value is a result of a hash function as applied to the artificial neural network; and wherein generating the second representation comprises the processor generating the second hash value by applying the hash function to the candidate artificial neural network (paragraph [0278], [0282], [0388]). Motivation is similar to the motivation provided in claim 5.
As per claim 18, Minezawa does not explicitly disclose, but in an analogous art, Matlage discloses, storing a hash value of the artificial neural network; and generating a representation of a candidate artificial neural network, wherein the candidate artificial neural network corresponds to the reconstructed artificial neural network (paragraph [0278], [0388], performs hashing on or apply error detection/ correction code onto a certain individually accessible portion 200 and compare the result with its corresponding identification parameter 310 so as to check a correctness of the individually accessible portion 200). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Minezawa with Matlage. This would have been obvious because one of ordinary skill in the art would have been motivated to check integrity of neural network and make operation more error robust.
As per claim 19, Matlage furthermore discloses verifying the candidate artificial neural network when the representation of the candidate artificial neural network corresponds to the hash value (paragraph [0388], compare the result with its corresponding identification parameter 310 so as to check a correctness of the individually accessible portion 200). The motivation is similar to the motivation provided in claim 18.
As per claim 20, Matlage furthermore discloses not verifying the candidate artificial neural network when the representation of the candidate artificial neural network does not correspond to the hash value (paragraph [0388], compare the result with its corresponding identification parameter 310 so as to check a correctness of the individually accessible portion 200). The motivation is similar to the motivation provided in claim 18.
Claims 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Minezawa, and Matlage, further in view of Cheng et al. (US Publication No. 2021/0152600), hereinafter Cheng.
As per claim 7, Minezawa as modified does not explicitly disclose, but in an analogous art, Cheng discloses, wherein at least one of the processor or the hardware security module is configured to check whether the second representation corresponds to the first representation using a public key corresponding to a private key (paragraph [0062], “at block 601, processing logic sends a request to a data processing accelerator, the request to generate a watermark for an artificial intelligence (AI) model based on a watermark algorithm, embed the watermark onto the AI model, and generate a signature for the AI model with the watermark based on a security key pair. At block 602, processing logic receives the signature and/or the watermark/AI model file(s), where the signature is used to verify the watermark and/or the AI model. For example, processing logic decrypts the signature using a public key of the security key pair to generate a first hash. Processing logic applies a hash algorithm to the watermark/AI model file(s) to generate a second hash. The first and second hash is compared for a match. If matched, the signature is successfully verified”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the modified Minezawa with Cheng. This would have been obvious because one of ordinary skill in the art would have been motivated to validate the integrity of artificial intelligence model by employing the well know private-public key pair.
As per claim 8, Minezawa as modified does not explicitly disclose, but in an analogous art, Cheng furthermore discloses, wherein the first representation is the first hash value signed with a private key (paragraph [0062], “generate a signature for the AI model with the watermark based on a security key pair”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the modified Minezawa with Cheng. This would have been obvious because one of ordinary skill in the art would have been motivated to employ the well know private key-signature technique to generate a digital for the artificial intelligence model, thereby enabling subsequent verification of the integrity of the artificial intelligence model.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Minezawa, and Matlage, further in view of Xu, further in view of Cheng.
As per claim 9, Minezawa as modified does not explicitly disclose but in an analogous art Xu discloses, wherein the hardware security module comprises a first memory configured to store a first representation of the artificial neural network(paragraph [0278], “a data stream 45 having a representation of a neural network encoded thereinto, wherein the data stream 45 is structured into individually accessible portions 200, each portion 200 representing a corresponding NN portion, e.g. comprising one or more NN layer or comprising portions of a NN layer, of the neural network, wherein the data stream 45 comprises for each of one or more predetermined individually accessible portions 200 an identification parameter 310 [first representation] for identifying the respective predetermined individually accessible portion 200”); wherein the processor is configured to generate a second representation of a candidate artificial neural network, wherein the candidate artificial neural network corresponds to the reconstructed artificial neural network (paragraphs [0388], “performs hashing on or apply error detection/correction code onto a certain individually accessible portion 200”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Minezawa with Xu. This would have been obvious because one of ordinary kill in the art would have been motivated to do so in order to increase efficiency in automatic machine learning.
Minezawa in view of Xu does not explicitly disclose but in an analogous art, Cheng discloses, wherein at least one of the hardware security module or the processor is configured to (i) recover the second representation by decrypting a signed version of the second representation using a public key and (ii) at least one of: verify the candidate artificial neural network when the first representation is identical to the decrypted second representation; or not verify the candidate artificial neural network when the first representation is not identical to the decrypted second representation (paragraph [0062], “at block 601, processing logic sends a request to a data processing accelerator, the request to generate a watermark for an artificial intelligence (AI) model based on a watermark algorithm, embed the watermark onto the AI model, and generate a signature for the AI model with the watermark based on a security key pair. At block 602, processing logic receives the signature and/or the watermark/AI model file(s), where the signature is used to verify the watermark and/or the AI model. For example, processing logic decrypts the signature using a public key of the security key pair to generate a first hash. Processing logic applies a hash algorithm to the watermark/AI model file(s) to generate a second hash. The first and second hash is compared for a match. If matched, the signature is successfully verified”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the modified Minezawa with Cheng. This would have been obvious because one of ordinary skill in the art would have been motivated to validate the integrity of artificial intelligence model by employing the well know private-public key pair.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Minezawa in view of Riou et al. (US Publication No. 2020/0403782), hereinafter Riou
As per claim 10, Minezawa does not explicitly disclose, wherein the hardware security module is configured to permit the processor access to the feature engineering data and the coefficient data after the hardware security module authenticates the processor or a user of the processor. However, in an analogous art, Riou disclose the hardware security module permit the processor (chip 14) access to resources after authenticating the processor (abstract, paragraph [0138], “a successful chip authentication allows the chip 14 to gain access to one or several requested (registered) resources that have been successfully decrypted by using the received credential”).
It would have been obvious to one or ordinary skill in the art before effective filing date of the claimed invention to combine Minezawa with Riou. This would have been obvious because one of ordinary skill in the art would have been motivated to protect resources by providing access to resources only to authorized and authenticated devices.
Although Robert does not explicitly disclose that the accessed data includes feature engineering data and coefficient data, and instead discloses access to resources, the authentication process is independent of the particular type of data being accessed. In other words, the functionality of authenticating a processor does not depend on whether the requested data is feature engineering data, coefficient data, or any other type of data. Once the processor has been successfully authenticated, the same authentication mechanism permits access to the requested data regardless of its content. Accordingly, substituting feature engineering data and coefficient data for the Riou’s disclosed resources would have been predictable use of the known authentication mechanism and would have been obvious to one of ordinary skill in the art. Doing so would have predictably provide the same security benefit by preventing unauthored access to sensitive neural network data.
References Cited, Not Used
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Ruan et al. (US Publication No. 2025/0106021) discloses, a computer system and method for ensuring the architectural integrity and authenticity of neural networks using cryptographic techniques and timestamping mechanisms. The system certifies and validates the internal state of tensor and graph data structures within neural networks by computing hash values of the network's tensors and graphs and associating these values with specific time intervals. A timestamping authority issues timestamp tokens for the hash values, which are stored in a distributed, redundant archive for future verification. The validation process involves comparing the current state of the neural network with the stored hash values, ensuring any tampering or unauthorized modifications can be detected.
Jo et al. (US Publication No.2024/0274449) discloses, systems and methods for advanced process
control and monitoring. Systems and methods may be associated with a data processing module configured to receive and process a plurality of data types and datasets from a plurality of different sources for generating training data; a training and optimization module configured to provide the
training data to a machine learning pipeline for training and optimizing a model; and an inference module configured to use the model for generating one or more predicted metrics substantially in real-time, wherein the one or more predicted metrics are useable to characterize an output of a process performed by a process equipment.
Conclusion
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/ALI S ABYANEH/Primary Examiner, Art Unit 2437
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