DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fulton (pub #US 20130058350 A1).
Regarding claim 10, Fulton discloses method for operating a system including a first domain (1 of VM 1-3, figure 28) and a second domain (another one of VM 1-3 in figure 28), the method comprising: providing an instruction (a command to enable isolation, paragraph 306), by a first processor of the first domain (a port connecting to VM1 as shown in figure 28, paragraph 312) , to a second processor of a processing subsystem of the second domain (a second port connecting to VM2 in figure 2); and executing the instruction, by the second processor, to configure the processing subsystem of the second domain to operate in a mode specified by the instruction (enabled isolation, which causes the packets to be dropped if isolation is enabled, paragraph 312), in which, in response to the processing subsystem being configured to operate in the specified mode, isolation circuitry is configured to provide a level of isolation between the first domain and the second domain based on the specified mode (port isolation such that VM1 packets sent to VM2 or VM3 will be dropped, paragraph 312).
Fulton does not disclose explicitly that the ports are processors, but because the ports process data packets, one of ordinary skill in the art would readily understand there are processing capabilities on the ports, and would have been an obvious implementation, before the effective filing date of the present invention, using well-known computing elements such as general-purpose CPUs, or ASIC for the benefit of scalability and ease-of-manufacturing.
Allowable Subject Matter
Claims 1-9, 16-20 are allowed.
Claims 11-15 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: Prior art of record discloses isolation circuitry for ports of different domains, including user interface for configuration the isolation parameters. However, prior art of record does not teach or suggest, inter alia, the multiple modes of isolation as claimed.
Conclusion
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/SCOTT C SUN/Primary Examiner, Art Unit 2181