Prosecution Insights
Last updated: October 04, 2026
Application No. 19/070,012

SYSTEM AND METHOD FOR REGULATING POWER OUTPUT OF MULTIPLE SOLAR SUBSTRINGS

Non-Final OA §102§DP
Filed
Mar 04, 2025
Priority
Mar 31, 2022 — provisional 63/326,121 +2 more
Examiner
BERHANE, ADOLF D
Art Unit
Tech Center
Assignee
Optivolt Labs Inc.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
933 granted / 1056 resolved
+28.4% vs TC avg
Minimal -2% lift
Without
With
+-1.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
18 currently pending
Career history
1065
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
28.9%
-11.1% vs TC avg
§102
48.7%
+8.7% vs TC avg
§112
6.9%
-33.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1056 resolved cases

Office Action

§102 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings received on 03/04/25 are acceptable. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 11 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chisenga et al. (US 9,496,803 B2). Chisenga et al. disclose a solar photovoltaic system with maximized ripple voltage on storage capacitor in Figures 1-19. Regarding claim 1. A system comprising (Figures 1, 4, 6 and 7): a power regulator (1) configured to receive an input voltage generated by the set of solar substrings (2, 20); a modulation signal generator (33) configured to modulate a voltage gain (7) of the power regulator, the voltage gain (7) representing a ratio between the input voltage and an output voltage of the power regulator: a de-modulator (43) configured to: de-modulate a power signal representing a power output of the power regulator; and output a de-modulated power signal: and an integrator (34) configured to output a voltage gain step for the power regulator based on the de-modulated power signal the voltage-gain step configured to drive the input voltage generated by the set of solar substrings toward a target output voltage (see col. 12, line 4 to col. 13, line 59). Regarding claim 11. The system of Claim 1, further comprising: a solar panel (2, 20): comprising the set of solar substrings (2, 20); and defining a front face and a rear face; and a housing (Figures 16a and 16b:1000): arranged on the rear face of the solar panel; and containing the power regulator (1), the modulation signal generator (33), the de- modulator (43), and the integrator (34). Regarding claim 12. A system comprising (Figures 1, 4, 6 and 7) a first power regulator (1) coupled to a load and configured to: receive a first input voltage generated by a set of solar substrings (2, 20), comprising a first solar substring (2) and a second solar substring (20) connected in series, within a solar panel; modulate a first voltage gain (7), between the first input voltage and an output voltage to the load (1020), at a first frequency; detect a first direct-current component in a first power signal, demodulated (43) according to the first frequency, representing a power output of the first power regulator (1); and adjust the first voltage gain (7) to track the first input voltage to a first maximum power point voltage of the set of solar substrings (2, 20) based on the first direct- current component in the first power signal (see col. 12, line 4 to col. 13, line 59). Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No.12, 265, 413. Although the claims at issue are not identical, they are not patentably distinct from each other because the patented claim anticipates the examined claim. Allowable Subject Matter Claims 20 and 21 are allowed over the cited prior art of record. Claims 3-10 and 13-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance: Claim 20 is allowed because the prior art of record fails to disclose or suggest including the limitation “a second power regulator coupled to a midpoint tap between the first solar substring and the second solar substring, receiving the first input voltage generated by the set of solar substrings; modulating a second voltage gain, between the first input voltage and a midpoint voltage of the midpoint tap, at a second frequency different from the first frequency; detecting a second direct-current component in the first power signal, demodulated according to the second frequency, representing a power output of the first power regulator; and adjusting the second voltage gain to track the midpoint voltage to a second maximum power point voltage of the second solar substring based on the second direct-current component in the first power signal“ in addition to other limitations recited therein. Dependent claim 21 is allowable by virtue of their dependency. The following is a statement of reasons for the indication of allowable subject matter: Claim 3 is allowed because the prior art of record fails to disclose or suggest a system including the limitation “wherein the power regulator comprises a power supply; and * further comprising: a multiplier circuit configured to output the power signal, the power signal representing a combination of the output voltage and an output current of the power supply; and an adder configured to:- implement the voltage gain, set by the modulation signal generator, at the power supply; and- implement the voltage-gain step, set by the integrator, at the power supply to increase the input voltage generated by the set of solar substrings toward the target output voltage comprising a maximum power point voltage of the set of solar substrings“ in addition to other limitations recited therein. Claim 4 is allowed because the prior art of record fails to disclose or suggest a system including the limitation “ wherein, during a power cycle: the modulation signal generator modulates the voltage gain of the power regulator by outputting a modulation signal, characterized by a first frequency, configured to induce oscillation in the power signal; the filter passes a direct-current component of the de-modulated power signal; the power regulator interprets a positive value of the direct-current component in the de-modulated power signal as the input voltage, generated by the set of solar substrings, falling below a maximum power point voltage of the set of solar substrings; and o the integrator sets the voltage-gain step comprising a positive voltage-gain step to increase the input voltage toward the maximum power point voltage in response to the input voltage falling below the maximum power point voltage of the set of solar substrings“ in addition to other limitations recited therein. Dependent claims 5-8 are allowable by virtue of their dependency. Claim 9 is allowed because the prior art of record fails to disclose or suggest a system including the limitation “ wherein, during a power cycle: the modulation signal generator modulates the voltage gain of the power regulator by outputting a modulation signal, characterized by a frequency, to induce oscillation in the power signal; the filter passes a direct-current component of the de-modulated power signal; the power regulator interprets a negative value of the direct-current component in the de-modulated power signal as the input voltage, generated by the set of solar substrings, exceeding a maximum power point voltage of the set of solar substrings; and the integrator sets the voltage-gain step comprising a negative voltage-gain step to decrease the input voltage toward the maximum power point voltage in response to the input voltage exceeding the maximum power point voltage of the set of solar substrings“ in addition to other limitations recited therein. Claim 10 is allowed because the prior art of record fails to disclose or suggest a system including the limitation “ wherein, during a power cycle: the modulation signal generator modulates the voltage gain of the power regulator by outputting a modulation signal, characterized by a frequency, to induce oscillation in the power signal; the filter passes a direct-current component of the de-modulated power signal; the power regulator detects the input voltage, generated by the set of solar substrings, approximating a maximum power point voltage of the set of solar substrings in response to a value of the direct-current component in the de-modulated power signal falling below a threshold value; and the integrator sets the voltage-gain step comprising a null voltage-gain step to maintain the input voltage at the maximum power point voltage in response to the input voltage approximating the maximum power point voltage of the set of solar substrings“ in addition to other limitations recited therein. Claim 13 is allowed because the prior art of record fails to disclose or suggest a system including the limitation “wherein the first power regulator is configured to, during a first power cycle: " modulate the first voltage gain at the first frequency to induce oscillation in the first power signal; " interpret a positive value of the first direct-current component in the first power signal as the first input voltage, generated by the set of solar substrings, falling below a first maximum power point voltage of the set of solar substrings; and " increase the first voltage gain to increase the first input voltage toward the first maximum power point voltage in response to the first input voltage falling below the first maximum power point voltage of the set of solar substrings. “ in addition to other limitations recited therein. Claim 14 is allowed because the prior art of record fails to disclose or suggest a system including the limitation “ wherein the first power regulator comprises: a first power supply; a first adder; a first modulation signal generator; a first multiplier circuit; a first de-modulator; a first integrator; and a first filter“ in addition to other limitations recited therein. Claim 15 is allowed because the prior art of record fails to disclose or suggest a system including the limitation “ a second power regulator: " coupled to a midpoint tap between the first solar substring and the second solar substring; and e configured to: receive the first input voltage generated by the set of solar substrings; modulate a second voltage gain, between the first input voltage and a midpoint voltage of the midpoint tap, at a second frequency different from the first frequency; detect a second direct-current component in the first power signal, demodulated according to the second frequency, representing a power output of the first power regulator; and adjust the second voltage gain to track the midpoint voltage to a second maximum power point voltage of the second solar substring based on the second direct-current component in the first power signal“ in addition to other limitations recited therein. Dependent claims 16-19 are allowable by virtue of their dependency. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Irish et al. (US 11,960,313 B2) disclose a system and method for regulating power output of multiple solar substrings. Irish (US 11,728,656 B2) disclose a solar charge controller adaptable for multiple solar substring chemistries and configurations. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADOLF D BERHANE whose telephone number is (571)272-2077. The examiner can normally be reached 7 AM - 10 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal Hammond can be reached at 571-270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ADOLF D BERHANE/Primary Examiner, Art Unit 2838
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Prosecution Timeline

Mar 04, 2025
Application Filed
Aug 12, 2026
Non-Final Rejection mailed — §102, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
87%
With Interview (-1.8%)
2y 0m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1056 resolved cases by this examiner. Grant probability derived from career allowance rate.

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