Prosecution Insights
Last updated: October 04, 2026
Application No. 19/071,129

MULTILAYER CERAMIC ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §103
Filed
Mar 05, 2025
Priority
Mar 07, 2022 — JP 2022-034024 +1 more
Examiner
MCFADDEN, MICHAEL P
Art Unit
Tech Center
Assignee
Taiyo Yuden Co., Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
729 granted / 844 resolved
+26.4% vs TC avg
Strong +20% interview lift
Without
With
+19.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
31 currently pending
Career history
851
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
61.1%
+21.1% vs TC avg
§102
30.1%
-9.9% vs TC avg
§112
4.6%
-35.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 844 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over LEE et al (US 2014/0355176) in view of SATO (US 2020/0066455). Regarding claim 1, LEE teaches a multilayer ceramic electronic component (Fig. 1-5) comprising: a ceramic body (Fig. 1, 110) including: an electrode-stacked portion (Fig. 2) that includes a plurality of ceramic layers (Fig. 2, 111) stacked in a direction of a first axis (Fig. 2, T) and a plurality of internal electrodes (Fig. 2, 121/122) disposed between the plurality of ceramic layers and alternately led out to respective sides along a second axis (Fig. 2, L) orthogonal to the first axis (Fig. 2), first and second cover portions (Fig. 2, top 111 and bottom 111) opposed to each other in the direction of the first axis with the electrode-stacked portion interposed therebetween (Fig. 2), and first and second side margin portions (Fig. 2B, 111 on sides) opposed to each other in a direction of a third axis (Fig. 2, W) orthogonal to the first axis and the second axis with the electrode-stacked portion interposed therebetween (Fig. 2); and first and second external electrodes (Fig. 2, 131/132) connected to the plurality of internal electrodes and opposed to each other in a direction of the second axis across the ceramic body (Fig. 2), , and wherein the plurality of internal electrodes include: a plurality of first peripheral internal electrodes (Fig. 2, 120a) collectively disposed in a peripheral portion at a side of the first cover portion in the direction of the first axis (Fig. 2), a plurality of second peripheral internal electrodes (Fig. 2, 120b) collectively disposed in another peripheral portion at a side of the second cover portion in the direction of the first axis (Fig. 2), and a plurality of central internal electrodes (Fig. 2, 120c) collectively disposed closer to a center in a direction of the first axis than the plurality of first peripheral internal electrodes and the plurality of second peripheral internal electrodes (Fig. 2), wherein each of the plurality of first peripheral internal electrodes and the plurality of second peripheral internal electrodes has a higher content ratio of ceramic particles than each of the plurality of central internal electrodes ([0077]). However, LEE is silent about wherein a dimension in the direction of the first axis of the ceramic body is larger than a dimension in the direction of the third axis of the ceramic body. SATO teaches that a dimension in the direction of the first axis of the ceramic body is larger than a dimension in the direction of the third axis of the ceramic body (Fig. 3, [0170]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of SATO to the invention of LEE, in order to make a capacitor with improving electrical characteristics without increasing a mounting area on a circuit board Regarding claim 2, LEE, as modified by SATO, further teaches that positions of ends of the plurality of internal electrodes in the direction of the third axis are aligned with each other within a range of 0.5 µm in the direction of the third axis (Fig. 2, aligned at the same position and therefore within 0.5 µm). Regarding claim 3, LEE, as modified by SATO, further teaches that the electrode-stacked portion is divided along the direction of the first axis into a first peripheral section in which the plurality of first peripheral internal electrodes are disposed(Fig. 2), a central section in which the plurality of central internal electrodes are disposed (Fig. 2), and a second peripheral section in which the plurality of second peripheral internal electrodes are disposed (Fig. 2), and wherein a dimension of each of the first and second peripheral sections in the direction of the first axis is 10% or greater and 30% or less of a dimension of the electrode-stacked portion in the direction of the first axis (Fig. 2, when the top section is considered the top 30% and bottom is the lower 30% the middle 40% would still have a higher content ratio overall and therefore teaches this limitation). Cited Prior Art Jeong et al (US 2011/0141655) teaches relevant art in Fig. 1-2. ANDO et al (US 2011/0235233) teaches relevant art in Fig. 1-4. LEE et al (US 2014/0355176) teaches relevant art in Fig. 1-5. KOIDE et al (US 2018/0182549) teaches relevant art in Fig. 1-3. KIM et al (US 2019/0304695) teaches relevant art in Fig. 1-6. KIM et al (US 2019/0304696) teaches relevant art in Fig. 1-7. OH et al (US 2023/0071865) teaches relevant art in Fig. 1-5. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL P MCFADDEN whose telephone number is (571)270-5649. The examiner can normally be reached M-Thur 8am-9pm PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL P MCFADDEN/ Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Mar 05, 2025
Application Filed
Sep 15, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12749623
MULTILAYERED CAPACITOR AND MANUFACTURING METHOD THEREOF
2y 7m to grant Granted Sep 29, 2026
Patent 12749622
MULTILAYER CERAMIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME
2y 6m to grant Granted Sep 29, 2026
Patent 12749630
Ultracapacitor Including a Sulfur-Based Electrolyte System
1y 11m to grant Granted Sep 29, 2026
Patent 12744160
PROCESS OF MANUFACTURING A DIELECTRIC FOR A CAPACITOR AND PROCESS OF MANUFACTURING A CAPACITOR AND CAPACITOR
2y 7m to grant Granted Sep 22, 2026
Patent 12738426
CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
2y 7m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+19.7%)
2y 2m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 844 resolved cases by this examiner. Grant probability derived from career allowance rate.

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