Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
1. The office acknowledges the receipt of the following and placed of record in the file: Application dated 3/5/2025 claimed priority of date 9/21/2020.
2. Claims 1-20 are presented for examination.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the "right to exclude" granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over; the reference claim(s). See, e.g., In re Berg, 140 Fo3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887,225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937,214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
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3. Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 of U. S. Patent No. 12,248357.
Although the conflicting claims are not identical, they are not patentably distinct from each other because the subject matter claimed in the instant application is substantially similar in nature with the Claim limitations of the patent for example
Instant application
Patent 12,248357
1.A method for regulating power consumption of a processor operable to execute a machine learning algorithm, comprising: generating one or more control signals for a voltage regulator configured to regulate a supply voltage for the processor;
1. A computing system comprising: a deterministic processor that operates at a selected clock frequency, wherein the deterministic processor is configured to execute defined instructions at defined times during each execution of an algorithm; a voltage regulator configured to regulate a supply voltage for the deterministic processor; a controller configured to generate a plurality of control signals for the voltage regulator to regulate the supply voltage for the deterministic processor; and
a power management module configured to: determine an initial profile for power consumption and performance of the algorithm executed on the deterministic processor having an initial value for the supply voltage and an initial value for the clock frequency, and
obtaining a target profile for power consumption for execution of the machine learning algorithm, the target profile based at least in part on one or more instructions to execute the machine learning algorithm;
modifying the one or more control signals for the voltage regulator based on the target profile; and
executing the machine learning algorithm with the processor.
determine a target profile for power consumption and performance of each execution of the algorithm on the deterministic processor based on the defined instructions scheduled to be executed, the controller further configured to dynamically modify the plurality of control signals based on the initial profile and the target profile, and the deterministic processor is configured to execute the algorithm while the supply voltage is dynamically modified by the voltage regulator based on the modified plurality of control signals.
Although the conflicting claims are not identical, they are not patentably distinct from each other because claim 1 of the instant application is anticipated by claim 1 of the patent where claim 1 of the patent contains all the limitations of claim 1 of the instant application. Therefore, Claim 1 of the instant application is not patently distinct from the earlier parent claim and as such is unpatentable for nonstatutory double patenting.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
4. Claim(s) 1-4, 7-8, 11-16 and 18-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Leung et al. (“Leung”), U.S. Patent Application No. 2021/0303045.
Regarding Claims 1, 15 and 20, Leung teaches a method for regulating power consumption of a processor operable to execute a machine learning algorithm [Para: 0026 and 0134], comprising:
generating one or more control signals for a voltage regulator configured to regulate a supply voltage for the processor [Para: 0034(“PCU 138 provides control information to external voltage regulator 160 … to generate the appropriate regulated voltage”)];
obtaining a target profile for power consumption for execution of the machine learning algorithm (as “power state profile is selected” from a plurality of profiles), the target profile based at least in part on one or more instructions to execute the machine learning algorithm [Para: 0026(“a machine learning environment, multiple power state profiles can be dynamically determined based on runtime analysis of workloads” running on processor at step 2010-2020) and 0145(“where a power state profile is selected from a plurality of such power state profiles based at least in part on workload”) and Fig-20(2010-2020)];
modifying the one or more control signals for the voltage regulator based on the target profile [Para: 0032(IVR 125a -125n which receives voltage and a command such as “appropriate command … to dynamically reconfigure from one power state configuration”, see para 0029, that generates an operating voltage to be provided to one or more agents of the processor associated with the IVR which may allow fine-grained control of voltage from its original voltage according to selected or target power state profile, also see 0026 and 0034 (PCU reconfigure or modify control signal as “PCU 138 also provides control information to IVRs 125 via another digital interface to control the operating voltage generated (or to cause a corresponding IVR to be disabled in a low power mode”)-0035)] ; and
executing the machine learning algorithm with the processor [Para: 0026 and 0147].
Regarding Claim 2, Leung teaches wherein the processor comprises a tensor streaming processor (TSP) comprising a plurality of functional unit slices [Para: 0083, 0094, 0174].
Regarding Claim 3, Leung teaches wherein the processor comprises a deterministic power consumption profile that is independent of inputs to the machine learning algorithm [Para: 0025(“select the appropriate power profile” for “different users may have different patterns of workload execution. As such, using, e.g., a machine learning environment, multiple power state profiles can be dynamically determined based on runtime analysis of workloads” 0026, from table-1)].
Regarding Claims 4 and 16, Leung teaches wherein the target profile comprises a plurality of power consumption targets respective to a plurality of tasks of the machine learning algorithm [Table-1(PS0 has power consumption >20 amp) and Para: 0028(PS0 is a higher power state than PS1”)].
Regarding Claim 7, Leung teaches wherein an operating clock frequency of the processor is dependent on the supply voltage [Para: 0041(as “power controller may control the processor to be power managed by some form of dynamic voltage frequency scaling (DVFS) in which an operating voltage and/or operating frequency of one or more cores or other processor logic may be dynamically controlled”)].
Regarding Claims 8 and 18, Leung teaches wherein the target profile is based on at least one of a threshold power budget or a thermal budget of a rack comprising the processor and a plurality of additional processors [Para: 0028(power profile is based on “cutoff threshold” as described in Table-1)].
Regarding Claim 11, Leung teaches wherein the target profile is based on a sparsity of a machine- learned model that is executed in the machine learning algorithm [Para: 0026, 0149 and 0151].
Regarding Claims 12 and 19, Leung teaches wherein the processor comprises at least one array of vector multiplication functional units, memory functional units (Table-1 stored in memory), or matrix multiplication functional units configured to execute the machine learning algorithm [Para: 0026(multiple state profile in table-1 is utilized by machine learning algorithm)].
Regarding Claim 13, Leung teaches wherein the modified one or more control signals are embedded into a program executing the machine learning algorithm on the processor [Para: 0026 and Fig-20].
Regarding Claim 14, Leung teaches wherein the one or more control signals are modified before the machine learning algorithm is executed [Para: 0032(IVR 125a -125n which receives voltage and a command such as “appropriate command … to dynamically reconfigure from one power state configuration”, see para 0029, in order to where dynamic reconfiguration of one or more voltage regulators occurs before “using a power state profile … executing workload on the processor”, 0025)].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claim(s) 5-6 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Leung as set forth above and Jan-Peter Schat (“Schat”), U.S. Patent No. 10,425068.
Regarding Claims 5 and 17, Leung teaches all limitations of claim 5 as described rejecting Claim 1 above. Leung does not disclose expressly does not disclose expressly the respective controllers further configured to convolve the controlled signals with an impulse response.
In the same field of endeavor, (e.g., self-testing circuit in power control domain), Schat
teaches a controller configured to convolve a controlled signal with an impulse response of a
voltage regulator [col-9 lines: 51-65("output voltage of the voltage regulator circuit, which are
then provided to the AMS circuit to derive impulse responses of the AMS circuit")].
Accordingly, it would have been obvious to one of ordinary skill in the art before the
effective filing date of the invention to modify Leung's teachings of the controller configured to
provide the modified control signals of the respective voltage regulator to generate a
voltage profile with Schat's teachings of a controllers configured to convolve a controlled signals
with an impulse response of a voltage regulator for the purpose of dynamically enable/disable
algorithms and more accurate representation of signals with low noise to have an
efficient system.
Regarding Claim 6, Leung teaches wherein the impulse response comprises an output voltage of the voltage regulator as a function of time [Para: 0151(“a voltage regulator based on current consumption levels, to cause dynamic reconfigurations to a power state of the regulator … this machine learning technique may be used dynamically at certain evaluation intervals”)].
6. Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Leung as set forth above and Glassburn et al. (“Glassburn”), U.S. Patent No. 9280200.
Regarding Claim 9, Leung teaches all limitations of claim 9 as described rejecting Claim 8 above. Leung does not disclose expressly in response to determining that an additional processor of the plurality of additional processors has exceeded a respective threshold power consumption, decreasing the threshold power budget of the target profile.
In the same field of endeavor (e.g., power control based on adjustment of threshold of a power budget), Glassburn teaches in response to determining that an additional processor of the plurality of additional processors has exceeded a respective threshold power consumption, decreasing a threshold power budget of the target profile [col-5 lines: 7-27(“lower current threshold to reduce the likelihood of exceeding a power supply limit …”)].
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Leung’s teachings of target profile is based on at least one of a threshold power budget or a thermal budget of a processor of plurality of additional processors with Glassburn’s teaching of in response to determining that an additional processor of the plurality of additional processors has exceeded a respective threshold power consumption, decreasing a threshold power budget of the target profile would allow Leung to dynamically control power to stay within its power budget and to improve performance.
Regarding Claim 10, Claim recites various aspects of power/performance balancing within a system by accelerating a processor in one hand and deaccelerating, other processors on the other hand. One of ordinary skill in the art would modify Leung’s teachings of target profile is based on at least one of a threshold power budget as set forth above to achieve wherein the processor is to accelerate operation to execute the machine learning algorithm and responsive to the accelerated operation, deaccelerating at least one of the plurality of additional processors during the time period for the purpose of power-performance balancing in order to have an efficient system.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMED H REHMAN whose telephone number is (571)272-1412. The examiner can normally be reached 8.00 - 5.00.
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/MOHAMMED H REHMAN/Primary Examiner, Art Unit 2176
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