DETAILED ACTION
*Note in the following document:
1. Texts in italic bold format are limitations quoted either directly or conceptually from claims/descriptions disclosed in the instant application.
2. Texts in regular italic format are quoted directly from cited reference or Applicant’s arguments.
3. Texts with underlining are added by the Examiner for emphasis.
4. Texts with
5. Acronym “PHOSITA” stands for “Person Having Ordinary Skill In The Art”.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12 September is being considered by the examiner.
However one of foreign reference CN 14320369 A published on 2003-07-30 by Samsung Electronics Co. Ltd. Has been crossed out since it seems the it is an invalid patent number.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2-4 And 15-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over GPUGems3 Chapter 1(downloaded @https://developer.nvidia.com/gpugems/gpugems3/part-i-geometry/chapter-1-generating-complex-procedural-terrains-using-gpu, 2007) in view of Dally (US 2012/0075319 A1).
Regarding Claim 2, GPUGems3 discloses a graphics processing unit is configured to
generate, via a task generator, tasks to generate polygons associated with a topology of a scene; generate, via a topology generator, the polygons associated with the topology of the scene based on the tasks (p.4 second paragraph: To generate procedural terrains with a high level of complexity, at interactive frame rates, we look to the GPU. By utilizing several new DirectX 10 capabilities such as the geometry shader (GS), stream output, and rendering to 3D textures, we can use the GPU to quickly generate large blocks of complex procedural terrain. Together, these blocks create a large, detailed polygonal mesh that represents the terrain within the current view frustum. Also see p.8 below. Step 1 is interpreted as generating tasks, step 2 is interpreted as generating polygons.
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rasterize the polygons to generate the scene including the topology (p.8 Section 1.3.2. GPUGems3 teaches the generated polygons are to be rasterized.
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GPUGems3 fails to explicitly recite the GPU comprising: a memory interface; and a graphics processing cluster coupled to the memory interface, the graphics processing cluster including a plurality of graphics multiprocessors coupled via an interconnect, the interconnect to enable communication between respective graphics multiprocessors of the plurality of graphics multiprocessors.
However Dally discloses a GPU comprising:
a memory interface (Fig.2: Memory interface); and
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a graphics processing cluster coupled to the memory interface, the graphics processing cluster including a plurality of graphics multiprocessors coupled via an interconnect, the interconnect to enable communication between respective graphics multiprocessors of the plurality of graphics multiprocessors (Fig.2: notice Processing Cluster Array 230. Also see [0032]: Any one of GPCs 208 may process data to be written to any of the DRAMs 220 within parallel processing memory 204. Crossbar unit 210 is configured to route the output of each GPC 208 to the input of any partition unit 215 or to another GPC 208 for further processing. GPCs 208 communicate with memory interface 214 through crossbar unit 210 to read from or write to various external memory devices. In one embodiment, crossbar unit 210 has a connection to memory interface 214 to communicate with I/O unit 205, as well as a connection to local parallel processing memory 204, thereby enabling the processing cores within the different GPCs 208 to communicate with system memory 104 or other memory that is not local to PPU 202).
Therefore it would have been obvious to a PHOSITA before the effective filing date to incorporate the teaching of Dally into that of GPUGems3 in order to use the existing parallel processing architecture to facilitate more efficient communication between GPU devices as suggested by Dally ([0007]).
Regarding Claim 3, GPUGems3 further teaches or suggests wherein the task generator is configured to generate the tasks based on a first shader program (p.8, the pixel shader is interpreted as the first shader
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Regarding Claim 4, GPUGems3 further teaches or suggests wherein the first shader program is to configure the task generator to determine visibility for polygons associated with the topology of the scene and generate tasks associated with visible polygons (p.8: notice step 2. Also see p.15 the visibility is calculated based on density function used by the pixel shader).
Regarding Claims 15-17, Claims 15-17 is/are similar to Claims 2-4 except in the format of system. Therefore the same reason(s) for rejection is/are applied to Claims 2-4 is/are also applied to Claim 15-17.
Allowable Subject Matter
Claims 9-14 are allowed.
Claims 5-8 and 18-21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Prior art, either individually or in combination, fails to disclose or render obviousness the limitation of generating, via a task generator of a graphics processing unit, tasks to generate polygons associated with a topology of a scene, generating, via a topology generator of the graphics processing unit, the polygons associated with the topology of the scene, the polygons generated based on the tasks; and rasterizing the polygons to generate the scene including the topology, wherein the task generator is configured to generate the tasks based on a first shader program, the topology generator is configured to generate the polygons associated with the topology of the scene via a second shader program, and the first shader program and the second shader program execute via thread groups including a plurality of threads as claimed in independent Claim 9. The closest prior art, GPUGems3 Chapter 1(downloaded @https://developer.nvidia.com/gpugems/gpugems3/part-i-geometry/chapter-1-generating-complex-procedural-terrains-using-gpu, 2007), discloses generating polygons associated with topology of a scene based on results of tasks of generating polygons associated a topology of the scene. However, PGUGems3 fails to disclose wherein the task generator is configured to generate the tasks based on a first shader program, the topology generator is configured to generate the polygons associated with the topology of the scene via a second shader program, and the first shader program and the second shader program execute via thread groups including a plurality of threads. Claims 10-14 are allowed due to their dependency on Claim 9.
In addition Claim 5/18 fails to disclose the limitation of wherein the first shader program is to configure the task generator to determine a level of detail for polygons associated with the topology of the scene since the first shader according to the closest prior GPUGems3 is a pixel shader. It is not obvious to include a pixel shader to determine a level of detail for polygons. Claims 6-8 and 19-21 are objected due to their dependency on Claim 5 and 15.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YINGCHUN HE whose telephone number is (571)270-7218. The examiner can normally be reached M-F 8:00-5:00 MT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Xiao M Wu can be reached at 571-272-7761. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/YINGCHUN HE/Primary Examiner, Art Unit 2613
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