Prosecution Insights
Last updated: October 04, 2026
Application No. 19/071,377

MULTILAYER CERAMIC ELECTRONIC COMPONENT, PACKAGE BODY, AND CIRCUIT BOARD

Non-Final OA §102§103
Filed
Mar 05, 2025
Priority
Oct 05, 2022 — JP 2022-161172 +1 more
Examiner
RAMASWAMY, ARUN
Art Unit
Tech Center
Assignee
Taiyo Yuden Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
12m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
686 granted / 810 resolved
+24.7% vs TC avg
Moderate +12% lift
Without
With
+12.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
30 currently pending
Career history
842
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
60.0%
+20.0% vs TC avg
§102
29.3%
-10.7% vs TC avg
§112
5.9%
-34.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 810 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US Publication 2015/0255213). PNG media_image1.png 476 407 media_image1.png Greyscale Figure 13 of Lee with Examiner’s Comments (Figure 13EC) In re claim 1, Lee discloses a multilayer ceramic electronic component comprising: a laminate body (110 in C – Figure 13EC, Figure 1, ¶31) including a plurality of ceramic layers (111 – Figure 1, Figure 2, ¶31, ¶64) that are laminated in a first axial direction (‘W’ direction – Figure 1, Figure 2), a plurality of internal electrodes (121, 122 – Figure 1, Figure 2, ¶31) that are located between the ceramic layers and that form a capacitance-forming part (115 – Figure 13, Figure 1, Figure 2, ¶51) in combination with the ceramic layers (Figure 1, Figure 2), a pair of principal faces(1, 2 – Figure 1, Figure 2, Figure 13, ¶31) that are located opposite to each other in the first axial direction (‘W’ direction – Figure 2, Figure 13), a pair of lateral faces (ST, SB – Figure 13EC, Figure 2, ¶31) that are located opposite to each other in a second axial direction (‘T’ direction – Figure 1, Figure 2, Figure 13EC) orthogonal to the first axial direction (Figure 1, Figure 1, Figure 13EC), and a pair of end faces (3, 4 – Figure 1, Figure 2, ¶31) that are located opposite to each other in a third axial direction orthogonal (‘L’ direction – Figure 2) to the first axial direction and to the second axial direction (Figure 1, Figure 2, Figure 13); a first margin part (110 in A – Figure 13EC, Figure 1) provided at one side of the laminate body in the second axial direction (‘T’ direction – Figure 1, Figure 2, Figure 13EC); a second margin part (110 in B – Figure 13EC, Figure 1, Figure 2) provided at another side of the laminate body in the second axial direction (Figure 1, Figure 2, Figure 13EC); and a pair of external electrodes (131, 132 – Figure 1, ¶41) provided on the pair of respective end faces (Figure 1), wherein the pair of external electrodes each include an extended portion (131 and 132 extending onto ST, SB – Figure 1, Figure 2) extending to and on at least a plane of the first margin part (Figure 1, Figure 2, Figure 13EC), the plane being defined by the first axial direction and the third axial direction (plane formed by the ‘W’ direction and ‘L’ direction – Figure 1), and wherein at least the first margin part (110 in A – Figure 13EC) of the two margin parts has: a dimension in the first axial direction that is set greater than a dimension of the laminate body in the first axial direction (Figure 13EC, ¶37), and a dimension in the third axial direction that is set in a manner that the first margin part is flush with the pair of end faces of the laminate (Figure 13EC, Figure 1). In re claim 9, Lee discloses the multilayer ceramic electronic component according to claim 1, as explained above. Lee further discloses a substrate (210 – Figure 14, ¶138); a capacitor (100 – Figure 14, ¶31) that is mounted on the substrate (Figure 14), wherein the second axial direction (‘T’ direction – Figure 14) of the multilayer ceramic electronic component coincides with a direction perpendicular to a mounting face of the substrate (‘W’ or ‘L’ direction – Figure 14), and wherein the extended portion (portion of 131, 132 on ST, SB – Figure 1, Figure 14) included in the first margin part is placed on a terminal part provided on the mounting face (Figure 1, Figure 14). The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 and 3 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ikeda (US Publication 2021/0335550). In re claim 1, Ikeda discloses a multilayer ceramic electronic component comprising: a laminate body (10 – Figure 1, Figure 2, Figure 3, ¶27) including a plurality of ceramic layers (14 – Figure 1, Figure 3, ¶21) that are laminated in a first axial direction (‘T’ direction – Figure 2, Figure 3), a plurality of internal electrodes (15 – Figure 2, Figure 3, ¶21) that are located between the ceramic layers and that form a capacitance-forming part in combination with the ceramic layers (Figure 2, Figure 3), a pair of principal faces (Aa, Ab – Figure 2, Figure 3, ¶24) that are located opposite to each other in the first axial direction (‘T’ direction – Figure 3), a pair of lateral faces (left ‘m’ and right ‘m’ – Figure 3, ¶35) that are located opposite to each other in a second axial direction (‘W’ direction – Figure 3) orthogonal to the first axial direction (Figure 3), and a pair of end faces (Ca, Cb – Figure 2, ¶24)that are located opposite to each other in a third axial direction (‘L’ direction – Figure 1, Figure 2) orthogonal to the first axial direction and to the second axial direction (Figure 1, Figure 2); a first margin part (left 30 – Figure 3, ¶23) provided at one side of the laminate body in the second axial direction (Figure 3); a second margin part (right 30 – Figure 3) provided at another side of the laminate body in the second axial direction (Figure 3); and a pair of external electrodes (3a, 3b – Figure 1, Figure 2, ¶31-32) provided on the pair of respective end faces (Figure 1), wherein the pair of external electrodes each include an extended portion (portion of 3a, 3b on Ba, Bb – Figure 1, Figure 3, ¶24) extending to and on at least a plane of the first margin part, the plane being defined by the first axial direction and the third axial direction (Figure 1, Figure 3), and wherein at least the first margin part (left 30 – Figure 3) of the two margin parts has: a dimension in the first axial direction (‘T’ direction – Figure 3) that is set greater than a dimension of the laminate body in the first axial direction (dimension between Aa and Ab – Figure 3), and a dimension in the third axial direction that is set in a manner that the first margin part is flush with the pair of end faces of the laminate (Figure 4). In re claim 3, Ikeda discloses the multilayer ceramic electronic component according to claim 1, as explained above. Ikeda further discloses wherein the second margin part (right 30 – Figure 3) has a dimension in the first axial direction (‘T’ direction – Figure 3) that is set greater than the dimension of the laminate body in the first axial direction (dimension between Aa and Ab – Figure 3). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US Publication 2015/0255213). In re claim 2, Lee discloses the multilayer ceramic electronic component according to claim 1, as explained above. Lee does not disclose wherein the dimension of the first margin part in the first axial direction is about 105% to about 110% of the dimension of the laminate body in the first axial direction. However, Lee discloses that increasing the dimension of SB, with respect to the dimension ST is correlated to the stability of the electronic component (¶37-38, ¶132-133, ¶135). Further it is well-known in the art that adjusting the number of internal electrodes, and thus dimension of the laminate body in the first axial direction, is correlated to the capacitance of the device. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the dimension of first margin portion and the laminate body in the first axial direction to achieve a device having a desired balance between mechanical stability and capacitance. In re claim 10, Lee discloses the multilayer ceramic electronic component according to claim 9, as explained above. Lee does not disclose wherein the dimension of the first margin part in the first axial direction is about 105% to about 110% of the dimension of the laminate body in the first axial direction. However, Lee discloses that increasing the dimension of SB, with respect to the dimension ST is correlated to the stability of the electronic component (¶37-38, ¶132-133, ¶135). Further it is well-known in the art that adjusting the number of internal electrodes, and thus dimension of the laminate body in the first axial direction, is correlated to the capacitance of the device. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the dimension of first margin portion and the laminate body in the first axial direction to achieve a device having a desired balance between mechanical stability and capacitance. Claim(s) 4 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US Publication 2015/0255213) in view of Ahn et al. (US Publication 2014/0182910). In re claim 4, Lee discloses the multilayer ceramic electronic component according to claim 1, as explained above. Lee does not disclose wherein the first margin part has a dimension in the second axial direction that is set greater than a dimension of the second margin part in the second axial direction. Ahn discloses wherein the first margin part (113 – Figure 1, Figure 2, ¶33) has a dimension in the second axial direction (‘T’ direction – Figure 1, Figure 2) that is set greater than a dimension of the second margin part (112 – Figure 1, Figure 2, ¶33) in the second axial direction (¶82). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the dimension of the first margin part to reduce the acoustic noise when the component is mounted on a board (¶82: Ahn). In re claim 12, Lee discloses the multilayer ceramic electronic component according to claim 9, as explained above. Lee does not disclose wherein the first margin part has a dimension in the second axial direction that is set greater than a dimension of the second margin part in the second axial direction. Ahn discloses wherein the first margin part (113 – Figure 1, Figure 2, ¶33) has a dimension in the second axial direction (‘T’ direction – Figure 1, Figure 2) that is set greater than a dimension of the second margin part (112 – Figure 1, Figure 2, ¶33) in the second axial direction (¶82). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the dimension of the first margin part to reduce the acoustic noise when the component is mounted on a board (¶82: Ahn). Claim(s) 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US Publication 2015/0255213) in view Masakazu et al. (JP0855752A). In re claim 5, Lee discloses the multilayer ceramic electronic component according to claim 1, as explained above. Lee does not disclose a carrier tape having a sealing surface that is perpendicular to the second axial direction, and a recessed part that is recessed relative to the sealing surface in the second axial direction and that accommodates the multilayer ceramic electronic component; and a top tape pasted to the sealing surface and covering the recessed part. Masakazu discloses a carrier tape (T – Figure 2, Summar of the Invention ¶22) having a sealing surface that is perpendicular to the second axial direction (Figure 2, Summary of the Invention ¶22; Note that the component body is positioned so the internal electrodes are vertical.), and a recessed part that is recessed relative to the sealing surface in the second axial direction and that accommodates the multilayer ceramic electronic component (1 – Figure 2, Summary of the Invention ¶22); and a top tape (Ta – Figure 2, Summary of the Invention ¶22) pasted to the sealing surface and covering the recessed part (Figure 2). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the accommodation as descried by Masakazu to provide for storage prior to a mounting process. In re claim 6, Lee in view of Masakazu discloses the multilayer ceramic electronic component according to claim 5, as explained above. Lee does not disclose wherein the dimension of the first margin part in the first axial direction is about 105% to about 110% of the dimension of the laminate body in the first axial direction. However, Lee discloses that increasing the dimension of SB, with respect to the dimension ST is correlated to the stability of the electronic component (¶37-38, ¶132-133, ¶135). Further it is well-known in the art that adjusting the number of internal electrodes, and thus dimension of the laminate body in the first axial direction, is correlated to the capacitance of the device. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the dimension of first margin portion and the laminate body in the first axial direction to achieve a device having a desired balance between mechanical stability and capacitance, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US Publication 2015/0255213) in view Masakazu et al. (JP0855752A) and in further view of Ahn et al. (US Publication 2014/0182910). In re claim 8, Lee in view of Masakazu discloses the multilayer ceramic electronic component according to claim 5, as explained above. Lee does not disclose wherein the first margin part has a dimension in the second axial direction that is set greater than a dimension of the second margin part in the second axial direction. Ahn discloses wherein the first margin part (113 – Figure 1, Figure 2, ¶33) has a dimension in the second axial direction (‘T’ direction – Figure 1, Figure 2) that is set greater than a dimension of the second margin part (112 – Figure 1, Figure 2, ¶33) in the second axial direction (¶82). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the dimension of the first margin part to reduce the acoustic noise when the component is mounted on a board (¶82: Ahn). Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda (US Publication 2021/0335550). In re claim 2, Ikeda discloses the multilayer ceramic electronic component according to claim 1, as explained above. Ikeda does not explicitly disclose wherein the dimension of the first margin part in the first axial direction is about 105% to about 110% of the dimension of the laminate body in the first axial direction. However, Ikeda discloses that adjusting the protruding portions of the margin portions, and thus, the dimension in the first axial direction is a balance between a chipping phenomenon and reduction of acoustic noise (¶74), since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Claim(s) 5 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda (US Publication 2021/033555) in view Masakazu et al. (JP0855752A) In re claim 5, Ikeda discloses the multilayer ceramic electronic component according to claim 1, as explained above. Ikeda does not disclose a carrier tape having a sealing surface that is perpendicular to the second axial direction, and a recessed part that is recessed relative to the sealing surface in the second axial direction and that accommodates the multilayer ceramic electronic component; and a top tape pasted to the sealing surface and covering the recessed part. Masakazu discloses a carrier tape (T – Figure 2, Summar of the Invention ¶22) having a sealing surface that is perpendicular to the second axial direction (Figure 2, Summary of the Invention ¶22; Note that the component body is positioned so the internal electrodes are vertical.), and a recessed part that is recessed relative to the sealing surface in the second axial direction and that accommodates the multilayer ceramic electronic component (1 – Figure 2, Summary of the Invention ¶22); and a top tape (Ta – Figure 2, Summary of the Invention ¶22) pasted to the sealing surface and covering the recessed part (Figure 2). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the accommodation as descried by Masakazu to provide for storage prior to a mounting process. In re claim 6, Ikeda in view of Masakazu discloses the multilayer ceramic electronic component according to claim 5, as explained above. Ikeda does not explicitly disclose wherein the dimension of the first margin part in the first axial direction is about 105% to about 110% of the dimension of the laminate body in the first axial direction. However, Ikeda discloses that adjusting the protruding portions of the margin portions, and thus, the dimension in the first axial direction is a balance between a chipping phenomenon and reduction of acoustic noise (¶74), since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). In re claim 7, Ikeda in view of Masakazu discloses the multilayer ceramic electronic component according to claim 5, as explained above. Ikeda further discloses wherein the second margin part (right 30 – Figure 3) has a dimension in the first axial direction (‘T’ direction – Figure 3) that is set greater than the dimension of the laminate body in the first axial direction (dimension between Aa and Ab – Figure 3). Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda (US Publication 2021/0335550) in view of Ritter et al. (US Publication 2008/0310076). In re claim 9, Ikeda discloses the multilayer ceramic electronic component according to claim 1, as explained above. Ikeda further discloses a substrate (200 – Figure 1, ¶20); and a capacitor (1 – Figure 1, ¶20) that is mounted on the substrate (200 – Figure 1). Ikeda does not disclose wherein the second axial direction of the multilayer ceramic electronic component coincides with a direction perpendicular to a mounting face of the substrate, and wherein the extended portion included in the first margin part is placed on a terminal part provided on the mounting face. Ritter discloses wherein the second axial direction of the multilayer ceramic electronic component (140 – Figure 1b, ¶53) coincides with a direction perpendicular to a mounting face of the substrate (top surface of 160 – Figure 1b, ¶53), and wherein the extended portion (portion of 152, 154 on 160 – Figure 1b, ¶53) is placed on a terminal part (162, 164 – Figure 1b, ¶53) provided on the mounting face (Figure 1b). The combination of Ikeda and Ritter discloses wherein the second axial direction of the multilayer ceramic electronic component coincides with a direction perpendicular to a mounting face of the substrate, and wherein the extended portion included in the first margin part is placed on a terminal part provided on the mounting face. It would have been obvious to a person having ordinary skill in the art to adjust the orientation of the capacitor to achieve a device having desired ESL characteristics (¶53-54: Ritter). In re claim 10, Ikeda in view of Ritter discloses the multilayer ceramic electronic component according to claim 9, as explained above. Ikeda does not explicitly disclose wherein the dimension of the first margin part in the first axial direction is about 105% to about 110% of the dimension of the laminate body in the first axial direction. However, Ikeda discloses that adjusting the protruding portions of the margin portions, and thus, the dimension in the first axial direction is a balance between a chipping phenomenon and reduction of acoustic noise (¶74), since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). In re claim 11, Ikeda in view of Ritter discloses the multilayer ceramic electronic component according to claim 9, as explained above. Ikeda further discloses wherein the second margin part (right 30 – Figure 3) has a dimension in the first axial direction (‘T’ direction – Figure 3) that is set greater than the dimension of the laminate body in the first axial direction (dimension between Aa and Ab – Figure 3). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim et al. (US Publication 2014/0318844) Figure 1, Figure 2 Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARUN RAMASWAMY whose telephone number is (571)270-1962. The examiner can normally be reached Monday - Friday, 9:00 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ARUN RAMASWAMY/ Primary Examiner, Art Unit 2847
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Prosecution Timeline

Mar 05, 2025
Application Filed
Sep 15, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
97%
With Interview (+12.3%)
2y 6m (~12m remaining)
Median Time to Grant
Low
PTA Risk
Based on 810 resolved cases by this examiner. Grant probability derived from career allowance rate.

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