CTNF 19/072,292 CTNF 89553 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. DETAILED ACTION Claims 1-20 are presented for examination. This is a first action on the merits based on Applicant’s claims submitted 3/06/2025. Specification The specification filed on 3/06/2025 has been reviewed and accepted. Information Disclosure Statement The information disclosure statement (IDS) submitted on 3/06/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Double Patenting 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp. Claims 1-20 are rejected on the ground of non-statutory double patenting as being unpatentable over claims 1-20 of US 12,072,981 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the scopes of the claims are the same as exemplified below. Instant Application US 12,072,981 (application 17/335,219) Comments Claim 1: A system, the system comprising: one or more processors; and one or more computer-readable non-transitory storage media, the one or more computer- readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising: performing a posture assessment at a trust anchor in order to determine whether a hardware component is authorized to run on a product, wherein performing the posture assessment comprises: determining a random value (K); encrypting the random value (K) using a long-term key associated with the hardware component in order to yield an encrypted value; communicating the encrypted value to the hardware component; and receiving, from the hardware component, a message encrypted using the random value (K), wherein the message comprises an identifier associated with the hardware component; and determining whether the hardware component is authorized to run on the product based at least in part on the identifier associated with the hardware component; and performing an action that depends on whether the hardware component is authorized to run on the product. Claim 2: The system of Claim 1, wherein the identifier associated with the hardware component comprises an electronic chip identifier (ECID) of the hardware component. Claim 3: The system of Claim 1, wherein the identifier associated with the hardware component comprises an identity of a product that the hardware component is provisioned to run on. 1. A system comprising: one or more processors; and one or more computer-readable non-transitory storage media, the one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising: determining, by a trust anchor, a random value (K) for a hardware component associated with a specific boot session, wherein the hardware component is an application-specific integrated circuit (ASIC); encrypting, by the trust anchor, the random value (K) using a long-term key associated with a hardware component in order to yield an encrypted value; communicating, by the trust anchor, the encrypted value to the hardware component; receiving, by the trust anchor, a response encrypted using the random value (K), the response received from the hardware component, wherein the response comprises a serial number or electronic chip identifier (ECID) of the hardware component; decrypting, by the trust anchor, the response received from the hardware component; verifying, by the trust anchor, the response received from the hardware component by comparing the serial number or ECID in the response to a list of authorized serial numbers or ECIDs; in response to successfully verifying the response received from the hardware component by comparing the serial number or ECID to the list of authorized serial numbers or ECIDs, encrypting, by the trust anchor, a schema using the random value (K), the schema indicating functionality that the hardware component is authorized to enable; sending the encrypted schema from the trust anchor to the hardware component, wherein the hardware component disables functionality until the hardware component receives the encrypted schema, and receiving the encrypted schema causes the hardware component to selectively enable the functionality authorized by the received encrypted schema, and prompting, by the trust anchor, a reset to resend the encrypted schema from the trust anchor to the hardware component if the hardware component fails to receive the encrypted schema. The claims on the co-pending application are an obvious variation to the current application because both claims are validating a hardware component that is running on a product. ------------------------------------------------------------------------------------ Claims 1-20 are rejected on the ground of non-statutory double patenting as being unpatentable over claims 1-19 of US Patent 11,816,219 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the scopes of the claims are the same as exemplified below. Instant Application US 11,816,219 (application 17/335,156) Comments Claim 1: A system, the system comprising: one or more processors; and one or more computer-readable non-transitory storage media, the one or more computer- readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising: performing a posture assessment at a trust anchor in order to determine whether a hardware component is authorized to run on a product, wherein performing the posture assessment comprises: determining a random value (K); encrypting the random value (K) using a long-term key associated with the hardware component in order to yield an encrypted value; communicating the encrypted value to the hardware component; and receiving, from the hardware component, a message encrypted using the random value (K), wherein the message comprises an identifier associated with the hardware component; and determining whether the hardware component is authorized to run on the product based at least in part on the identifier associated with the hardware component; and performing an action that depends on whether the hardware component is authorized to run on the product. 1. A system, comprising: one or more processors; and one or more computer-readable non-transitory storage media, the one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising: performing a posture assessment at a trust anchor to determine whether a hardware component is authorized to run on a product at a boot time of the product, wherein performing the posture assessment comprises: determining a random value (K) associated with the product for a specific boot session; obtaining a long-term key associated with the hardware component, the long-term key being provided by the hardware component or the product; encrypting the random value (K) with the long-term key associated with the hardware component in order to yield an encrypted value, wherein: the hardware component decrypts the encrypted value to confirm the random value (k); and in response to determining that the long-term key is the long-term key associated with the hardware component, the hardware component confirms that the trust anchor is authorized to run on the product; communicating the encrypted value to the hardware component; and determining whether the hardware component is authorized to run on the product based at least in part on whether the trust anchor receives a response encrypted using the random value (K) from the hardware component; and performing an action that depends on whether the hardware component is authorized to run on the product. Based on the broadest reasonable interpretation, all claim limitations in current application are included in the claims of the patent, as the current application discloses a broader invention as that of the patent. -------------------------------------------------------------------------------- Claims 1-20 are rejected on the ground of non-statutory double patenting as being unpatentable over claims 1-20 of US 11,784,807 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the scopes of the claims are the same as exemplified below. Instant Application US 11,784,807 (application 17/335,194) Comments Claim 1: A system, the system comprising: one or more processors; and one or more computer-readable non-transitory storage media, the one or more computer- readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising: performing a posture assessment at a trust anchor in order to determine whether a hardware component is authorized to run on a product, wherein performing the posture assessment comprises: determining a random value (K); encrypting the random value (K) using a long-term key associated with the hardware component in order to yield an encrypted value; communicating the encrypted value to the hardware component; and receiving, from the hardware component, a message encrypted using the random value (K), wherein the message comprises an identifier associated with the hardware component; and determining whether the hardware component is authorized to run on the product based at least in part on the identifier associated with the hardware component; and performing an action that depends on whether the hardware component is authorized to run on the product. 1. A system, the system comprising: one or more processors; and one or more computer-readable non-transitory storage media, the one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising: communicating a long-term key associated with a hardware component to a trust anchor, wherein the hardware component is an application-specific integrated circuit (ASIC); receiving, by the ASIC, an encrypted value associated with a posture assessment, wherein the trust anchor determines whether the ASIC is authorized to run on a product during the posture assessment, wherein the encrypted value is encrypted by the trust anchor using the long-term key, the encrypted value being received from the trust anchor, wherein the product comprises both the trust anchor and the ASIC, wherein the trust anchor is in signal communication with the ASIC; obtaining a random value (K) based on decrypting the encrypted value, wherein decrypting the encrypted value comprises using the long-term key associated with the ASIC; and communicating an encrypted response to the trust anchor, the encrypted response encrypted using the random value (K), wherein the encrypted response enables the trust anchor to determine whether the ASIC is authorized to run on the product. Based on the broadest reasonable interpretation, all claim limitations in current application are included in the claims of the patent, as the current application discloses a broader invention as that of the patent. -------------------------------------------------------------------------------- Claims 1-20 are rejected on the ground of non-statutory double patenting as being unpatentable over claims 1-20 of US Patent 12,254,123 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the scopes of the claims are the same as exemplified below. Instant Application US Patent 12,254,123 (application #17335245) Comments Claim 1: A system, the system comprising: one or more processors; and one or more computer-readable non-transitory storage media, the one or more computer- readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising: performing a posture assessment at a trust anchor in order to determine whether a hardware component is authorized to run on a product, wherein performing the posture assessment comprises: determining a random value (K); encrypting the random value (K) using a long-term key associated with the hardware component in order to yield an encrypted value; communicating the encrypted value to the hardware component; and receiving, from the hardware component, a message encrypted using the random value (K), wherein the message comprises an identifier associated with the hardware component; and determining whether the hardware component is authorized to run on the product based at least in part on the identifier associated with the hardware component; and performing an action that depends on whether the hardware component is authorized to run on the product. 1. A system, the system comprising: one or more processors; and one or more computer-readable non-transitory storage media, the one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising: receiving, by a trust anchor, a long-term key originating within a hardware component, wherein the long-term key has been encrypted using a public key of the trust anchor; performing a posture assessment at the trust anchor in order to determine whether the hardware component is authorized to run on a product, wherein performing the posture assessment comprises: determining a random value (K); encrypting the random value (K) using the long-term key associated with the hardware component in order to yield an encrypted value; communicating the encrypted value to the hardware component; receiving, from the hardware component, a message encrypted using the random value (K), wherein the message comprises an identifier associated with the hardware component; and determining whether the hardware component is authorized to run on the product based at least in part on the identifier associated with the hardware component; and performing an action that depends on whether the hardware component is authorized to run on the product. Based on the broadest reasonable interpretation, all claim limitations in current application are included in the claims of the patent, as the current application discloses a broader invention as that of the patent. Claim Rejections - 35 USC § 103 07-20 AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102 of this title, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the manner in which the invention was made. 07-21-aia AIA Claim s 1-5, 7-12, 14-18, 20 rejected under 35 U.S.C. 103 as being unpatentable over Walsmley (US 2004/0049468 A1, hereinafter “Walsmley’468”) in view of Finger et al. (US 2020/0220865 A1, hereinafter “Finger”) . Regarding claim 1, Walsmley’468 teaches: 1. A system, the system comprising: one or more processors (par 763, each chip has a processor, CPU, memory, etc…) ; and one or more computer-readable non-transitory storage media, the one or more computer- readable non-transitory storage media comprising instructions that, when executed by the one or more processors (par 763, each chip has a processor, CPU, memory, etc…) , cause one or more components of the system to perform operations comprising: performing a posture assessment (par 319, validating presence of Authentication chip ChipA) at a trust anchor (Fig. 6, i.e. System 21 and ChipT 23) in order to determine whether a hardware component (i.e. ChipA) is authorized to run on a product (par 333, system determines if ChipA is valid or invalid in the consumable authentication system, see also pars. 1, 4, Abstract) , wherein performing the posture assessment comprises: determining a random value (K) (fig. 6, step 60, see also par. 361) ; encrypting the random value (K) using a long-term key (par 362, key for ChipT (K T ), i.e. public key for ChipT, encrypts random R ) associated with the hardware component in order to yield an encrypted value (par 357-358, 360, i.e. asymmetric key K, where ChipT’s K T is public key and ChipA’s K A is secret key [Examiner notes that this keys are related as part of the asymmetric key pair], par 362) ; communicating the encrypted value to the hardware component (Fig. 6, step 62) ; and receiving, from the hardware component, a message encrypted using the random value (K) (fig. 6, step 63, par. 447-448, 456; i.e. system 21 receives M encrypted using the random R [R | M], examiner notes that appending R with M and then encrypting, is a cryptographic form of block cipher mode using padding) ; and determining whether the hardware component is authorized to run on the product based at least in part on the [identifier] (i.e. message) associated with the hardware component (i.e. message M from ChipA, fig. 6, step 63) (par 448-450; i.e. test function is called and system 21 determines if ChipA is authentic) ; and performing an action that depends on whether the hardware component is authorized to run on the product (par 451-454, i.e. authentication of write and read of message to ChipA’s memory) . Although Walsmley’468 teaches receiving an encrypted message and determining if device is valid based on the message, given that the device has the correct random number and key (i.e. pars. 447-450, 456), Finger explicitly teaches ( emphasis added) : wherein the message comprises an identifier associated with the hardware component (Finger: par 8, the authentication service receives information associated with hardware component, such as component identifier associated with the hardware component); determine if hardware component is authorized based at least in part on the identifier associated with the hardware component (Finger: par 9, the authentication service authenticates the hardware component with the component identifier in order to enable the hardware component’s functionalities) Accordingly, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention, to have implemented a message that comprise an identifier associated with the hardware component and therefore, make a determination if hardware component is authorized based on the identifier, as taught by Finger, to Walmsley’468’s invention. The motivation to do so would have been in order to indicate which hardware component is authenticated and activated for authorized use and thus, the authenticated components can be identified via its corresponding component identifier (Finger: par 38) . Regarding claim 2, the combination of Walsmley’468 and Finger teach: 2. The system of Claim 1, wherein the identifier associated with the hardware component comprises an electronic chip identifier (ECID) of the hardware component (Finger: par 8, OEM information associated with the hardware component) . Regarding claim 3, the combination of Walsmley’468 and Finger teach: 3. The system of Claim 1, wherein the identifier associated with the hardware component comprises an identity of a product that the hardware component is provisioned to run on (Finger: par 9, by using the authenticated component identifier, enables functionalities of the hardware component corresponding to component identifier.) . Regarding claim 4, the combination of Walsmley’468 and Finger teach: 4. The system of Claim 1, wherein determining whether the hardware component is authorized to run on the product based at least in part on the identifier associated with the hardware component comprises: comparing the identifier received from the hardware component to one or more authorized identifiers, each authorized identifier read from a respective authorized hardware component and imprinted on the trust anchor during manufacturing of the product (Finger: par 19, 21-22; original equipment manufacturers (OEM) information contain component identifiers which are used to validate and authenticate the hardware components. This inventory of component identifiers allow the validation and authentication process of the hardware components.; Examiner notes that the inventory of identifiers implies a search and compare to verify if the identifiers are valid (see also par 20). Then the authentication service authenticates the identifier of the hardware component (see par. 23)) . Regarding claim 5, the combination of Walsmley’468 and Finger teach: 5. The system of Claim 1, wherein performing an action that depends on whether the hardware component is authorized to run on the product comprises: allowing the hardware component to run on the product in response to determining that the hardware component is authorized to run on the product (Walsmley’468: par 451-454, i.e. authentication of write and read of message to ChipA’s memory) . Regarding claim 7, the combination of Walsmley’468 and Finger teach: 7. The system of Claim 1, wherein performing an action that depends on whether the hardware component is authorized to run on the product comprises: providing an attestation to a recipient in response to determining that the hardware component is authorized to run on the product, the attestation indicating to the recipient that the hardware component is authorized to run on the product (Walsmley’468: par 525, authentication chip reports on untrusted [consumable] chip) . Regarding claim 8 and claim 14, the claim limitations have been set forth and rejected as it has been discussed in claim 1. Regarding claim 9 and claim 15, the claim limitations have been set forth and rejected as it has been discussed in claim 2. Regarding claim 10 and claim 16, the claim limitations have been set forth and rejected as it has been discussed in claim 3. Regarding claim 11 and claim 17, the claim limitations have been set forth and rejected as it has been discussed in claim 4. Regarding claim 12 and claim 18, the claim limitations have been set forth and rejected as it has been discussed in claim 5. Regarding claim 20, the claim limitations have been set forth and rejected as it has been discussed in claim 7 . 07-21-aia AIA Claim s 6, 13, 19 rejected under 35 U.S.C. 103 as being unpatentable over Walsmley (US 2004/0049468 A1, hereinafter “Walsmley’468”) in view of Hattori et al. (US 2008/0258864 A1, hereinafter “Hattori”) in further view of Walsmley (US 2004/0049678 A1, hereinafter “Walsmley’678”) . Regarding claim 6, the combination of Walsmley’468 and Finger do not teach Walsmley’678 discloses: 6. The system of Claim 1, wherein performing an action that depends on whether the hardware component is authorized to run on the product comprises: preventing the hardware component from running on the product in response to determining that the hardware component is not authorized to run on the product (Walsmley’678: par 1359, any chip not matching the image signature is rejected) . Accordingly, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to have implemented a mechanism to prevent hardware component from running on the product in response to determining that the hardware component is not authorized to run on the product, as taught by Walsmley’678, to Walsmely’468 and Finger’s invention. The motivation to do so would have been in order to prevent the system from exposure to a trojan horse attack (Walsmley’678: par 1355-1356) . Regarding claim 13 and claim 19, the claim limitations have been set forth and rejected as it has been discussed in claim 6 . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. (1) Ajitomi et al. (US 2012/0110646 A1) teaches access authorizing apparatus. (2) Chavanne et al. (US 2005/0074125 A1) teaches method, apparatus and system for use in distributed and parallel decryption. (3) Hussain (US 2013/0019105 A1) teaches secure software and hardware association technique. (4) Poornachandran et al. (US 2016/0085995 A1) teaches technologies for verifying components . Any inquiry concerning this communication or earlier communications from the examiner should be directed to LIZBETH TORRES-DIAZ whose telephone number is (571)272-1787. The examiner can normally be reached on 9:00a-4:30p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Linglan Edwards, can be reached on (571)270-5440. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LIZBETH TORRES-DIAZ/Primary Examiner, Art Unit 2408 /June 10, 2026/ /ltd/ Application/Control Number: 19/072,292 Page 2 Art Unit: 2408 Application/Control Number: 19/072,292 Page 3 Art Unit: 2408 Application/Control Number: 19/072,292 Page 4 Art Unit: 2408 Application/Control Number: 19/072,292 Page 5 Art Unit: 2408 Application/Control Number: 19/072,292 Page 6 Art Unit: 2408 Application/Control Number: 19/072,292 Page 7 Art Unit: 2408 Application/Control Number: 19/072,292 Page 8 Art Unit: 2408 Application/Control Number: 19/072,292 Page 9 Art Unit: 2408 Application/Control Number: 19/072,292 Page 10 Art Unit: 2408 Application/Control Number: 19/072,292 Page 11 Art Unit: 2408 Application/Control Number: 19/072,292 Page 12 Art Unit: 2408 Application/Control Number: 19/072,292 Page 13 Art Unit: 2408 Application/Control Number: 19/072,292 Page 14 Art Unit: 2408 Application/Control Number: 19/072,292 Page 15 Art Unit: 2408 Application/Control Number: 19/072,292 Page 16 Art Unit: 2408 Application/Control Number: 19/072,292 Page 17 Art Unit: 2408 Application/Control Number: 19/072,292 Page 18 Art Unit: 2408 Application/Control Number: 19/072,292 Page 19 Art Unit: 2408 Application/Control Number: 19/072,292 Page 20 Art Unit: 2408 Application/Control Number: 19/072,292 Page 21 Art Unit: 2408 Application/Control Number: 19/072,292 Page 22 Art Unit: 2408 Application/Control Number: 19/072,292 Page 23 Art Unit: 2408 Application/Control Number: 19/072,292 Page 24 Art Unit: 2408 Application/Control Number: 19/072,292 Page 25 Art Unit: 2408 Application/Control Number: 19/072,292 Page 26 Art Unit: 2408 Application/Control Number: 19/072,292 Page 27 Art Unit: 2408 Application/Control Number: 19/072,292 Page 28 Art Unit: 2408 Application/Control Number: 19/072,292 Page 29 Art Unit: 2408 Application/Control Number: 19/072,292 Page 30 Art Unit: 2408 Application/Control Number: 19/072,292 Page 31 Art Unit: 2408 Application/Control Number: 19/072,292 Page 32 Art Unit: 2408 Application/Control Number: 19/072,292 Page 33 Art Unit: 2408
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