Prosecution Insights
Last updated: August 17, 2026
Application No. 19/072,618

METHOD FOR READING DATA OF IMAGE SENSOR, AND IMAGE SENSOR THEREFOR

Non-Final OA §102§103
Filed
Mar 06, 2025
Priority
Sep 06, 2022 — RE 10-2022-0112647 +2 more
Examiner
NGUYEN, CHAN T H
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
429 granted / 497 resolved
+26.3% vs TC avg
Minimal +3% lift
Without
With
+2.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
11 currently pending
Career history
511
Total Applications
across all art units

Statute-Specific Performance

§101
3.0%
-37.0% vs TC avg
§103
54.7%
+14.7% vs TC avg
§102
29.1%
-10.9% vs TC avg
§112
5.6%
-34.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 497 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDS) submitted on 01/14/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2, 4, 6-9, 11-12, 16-17 and 19-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Matsuzawa et al. (“Matsuzawa”, US 2021/0266486). Regarding claim 1, Matsuzawa discloses an device comprising: an image sensor (Matsuzawa: an image sensor 10, 100, see figs. 1, 10, 11, 22, 26, 29 and par. [0089]); and an image signal processor (Matsuzawa: an image processing circuit 6, see figs. 12A, 13 and par. [0115] ), wherein the image sensor comprises: a pixel array comprising a plurality of pixels configured to detect light (Matsuzawa: see figs. 1, 10, 11, 22, 26, 29 and pars. [0089]-[0090], wherein a pixel array 10 comprising a plurality of pixels 1 configured to detect light); a row driver configured to select a row of a pixel to be driven from among the plurality of pixels in the pixel array (Matsuzawa: see fig. 1 and par. [0092], in which a row selection unit 2 configured to select a row of a pixel to be driven from among the plurality of pixels in the pixel array); and a column driver configured to select a column of a pixel to be driven from among the plurality of pixels in the pixel array (Matsuzawa: see fig. 1 and par. [0094], note that a column selection unit 4 configured to select a column of a pixel to be driven from among the plurality of pixels in the pixel array), wherein the image sensor is configured to: read out a pixel value, based on a designated pixel pattern, by operation of the row driver and the column driver (Matsuzawa: see figs. 1, 22 and pars. [0093]-[0095], in which read out a pixel value, based on a designated pixel pattern as 4*1 region or 3*3 region, by operation of the row selection unit 2 and the column selection unit 4), and output, to the image signal processor, image data acquired based on the pixel value (Matsuzawa: see figs. 12A, 13 and par. [0115], wherein the image processing circuit 6 is provided outside the image sensor 10 and receives an output signal from the image sensor 10 and produces a pixel control signal), and wherein the designated pixel pattern comprises pixels located in a plurality of rows and a plurality of columns of the pixel array (Matsuzawa: see fig. 22 and par. [0139], in which pixels 1a in 3*3 region is read out). Regarding claim 2, Matsuzawa discloses the electronic device of claim 1, further comprising first memory storing one or more instructions, wherein the image sensor further comprises second memory (Matsuzawa: see pars. [0113], [0115] and [0123]), wherein the image sensor is further configured to: store the pixel value in the memory (Matsuzawa: see pars. [0113], [0115] and [0123], store the pixel value in the memory frame); and acquire the image data by generating an array pattern corresponding to an arrangement of pixels in the pixel array based on the pixel value stored in the memory (Matsuzawa: see pars. [0113], [0115] and [0123], acquire the image data by generating an array pattern 4*1 or 3*3 corresponding to an arrangement of pixels in the pixel array based on the pixel value stored in the memory frame). Regarding claim 4, Matsuzawa discloses the electronic device of claim 1, further comprising: first memory storing one or more instructions; an illuminance sensor; and at least one processor operatively coupled to the illuminance sensor and the image sensor and configured to execute the one or more instructions, wherein the one or more instructions, when executed by the at least one processor, cause the electronic device to: acquire an illuminance value through the illuminance sensor; and identify the designated pixel pattern based on the illuminance value (Matsuzawa: see par. [0111], when incident light on the low-illuminance pixel is 70 dB or more, the entire dynamic range is increased to 130 dB when the readout pixel 1a is controlled based on the pixel control signal such that the low-illuminance pixel is switched to the high-illuminance pixel). Regarding claim 6, Matsuzawa discloses the electronic device of claim 1, wherein the image sensor further comprises: a row selection switch coupled between the row driver and pixels of a row of the pixel array (Matsuzawa: see fig. 2 and par. [0091], wherein a row selection switch connected to RS coupled between the row driver and pixels of a row of the pixel array); and a column selection switch coupled to the column driver and to pixels of a column of the pixel array (Matsuzawa: see fig. 2 and par. [0091], in which a column selection switch M1 coupled to the column driver and to pixels of a column of the pixel array), wherein the row driver is configured to control the row selection switch based on the designated pixel pattern (Matsuzawa: see fig. 2 and par. [0091], note that the row selection unit 2 is configured to control the row selection switch based on the designated pixel pattern), and wherein the column driver is configured to control the column selection switch based on the designated pixel pattern (Matsuzawa: see fig. 2 and par. [0091], wherein the column selection unit 4 is configured to control the column selection switch M1 based on the designated pixel pattern). Regarding claim 7, Matsuzawa discloses the electronic device of claim 1, wherein the designated pixel pattern comprises a group of pixels selected from among the pixel array (Matsuzawa: see fig. 1). Regarding claim 8, Matsuzawa discloses the electronic device of claim 1, wherein the image sensor further comprises second memory storing information on the designated pixel pattern (Matsuzawa: see pars. [0113], [0115] and [0123], in which the image sensor further comprises a frame memory storing information on the designated pixel pattern 4*1 or 3*3). Regarding claim 9, Matsuzawa discloses the electronic device of claim 8, further comprising: first memory storing one or more instructions; and at least one processor configured to execute the one or more instructions, wherein the one or more instructions, when executed by the at least one processor, cause the electronic device to: analyze the image data (Matsuzawa: see fig. 15 and par. [0117], wherein a pixel control signal is determined based on an analysis result of light intensity obtained by suing a target frame 53); determine a pattern based on a result of the analysis of the image data (Matsuzawa: see par. [0094], determine a pattern based on a control signal); and update the information on the designated pixel pattern stored in the memory to be the determined pattern (Matsuzawa: see par. [0114], update the information on the designated pixel pattern stored in the frame memory to be the determined pattern). Regarding claim 12, Matsuzawa discloses the method of claim 11, wherein the reading out the pixel value comprises storing the pixel value in memory of the image sensor, and wherein the creating the image data comprises acquiring the image data by generating an array pattern corresponding to an arrangement of pixels in the pixel array based on the pixel value stored in the memory (Matsuzawa: see par. [0113], [0114], [0117]). Regarding claims 11, 16-17 and 19-20, claims 11, 16-17 and 19-20 recite the similar subject matter as previously discussed in claims 1, 7, 9 and 12. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Matsuzawa et al. (“Matsuzawa”, US 2021/0266486). Regarding claim 10, Matsuzawa discloses the electronic device of claim 1. Matsuzawa does not explicitly disclose that the designated pixel pattern comprises pixels that are not adjacent to each other in the pixel array. The Examiner takes Official Notice that that the designated pixel pattern comprises pixels that are not adjacent to each other in the pixel array is well known in the art. Therefore, it would have been obvious to one of ordinary skill in the art to incorporate a pattern into Matsuzawa’s system to be not adjacent to each other in the pixel array. The rational to do so is to have diversity designated pixel pattern. Regarding claim 15, claim 15 recites the similar subject matter as previously discussed in claim 10. Claims 3, 13 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Matsuzawa et al. (“Matsuzawa”, US 2021/0266486) in view of Genov et al. (“Genov”, US 2018/0331139). Regarding claim 3, Matsuzawa discloses the electronic device of claim 1, further comprising first memory storing one or more instructions, wherein the one or more instructions, when executed by the image signal processor (Matsuzawa: see figs. 12A and 13). Matsuzawa does not explicitly disclose causing the image sensor to acquire corrected image data by interpolating pixel values included in the image data. However, Genov teaches causing the image sensor to acquire corrected image data by interpolating pixel values included in the image data (Genov: see par. [0003]). One would have been modified to include a process as taught by Genov in the apparatus of Matsuzawa to assign a full color value for each pixel (Genov: see par. [0003]). Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to combine the teachings of Genov with the Matsuzawa’s system to includes that the image sensor acquires corrected image data by interpolating pixel values included in the image data. Regarding claims 13 and 18, claims 13 and 18 recite the similar subject matter as previously discussed in claim 3. Claims 5 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Matsuzawa et al. (“Matsuzawa”, US 2021/0266486) in view of Araki et al. (“Araki”, US 2019/0110011). Regarding claim 5, Matsuzawa discloses the electronic device of claim 4, wherein the one or more instructions, when executed by the at least one processor. Matsuzawa does not explicitly disclose causing the electronic device to: based on the illuminance value being greater than or equal to a threshold, control the image sensor to read out the pixel value in units of a single row; and based on the illuminance value being less than the threshold, control the image sensor to read out the pixel value in units of the designated pixel pattern. On the other hand, Araki teaches causing the electronic device to: based on the illuminance value being greater than or equal to a threshold, control the image sensor to read out the pixel value in units of a single row; and based on the illuminance value being less than the threshold, control the image sensor to read out the pixel value in units of the designated pixel pattern (Araki: see pars. [0041], [0067], [0075], wherein the signal read out by the readout operation of the readout scanning system corresponds to the amount of light incident after the immediately preceding readout operation or the electronic shutter operation; the readout mode is based on the object brightness). One would have been modified to include a readout mode as taught by Araki in the apparatus of Matsuzawa to reduce the power consumption as readout only the desired pixels. Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to combine the teachings of Araki with the Matsuzawa’s system to includes causing the electronic device to: based on the illuminance value being greater than or equal to a threshold, control the image sensor to read out the pixel value in units of a single row; and based on the illuminance value being less than the threshold, control the image sensor to read out the pixel value in units of the designated pixel pattern. Regarding claim 14, claim 14 recites the similar subject matter as previously discussed in claim 5. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHAN T H NGUYEN whose telephone number is (571)272-3452. The examiner can normally be reached M-F 8AM-4PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lin Ye can be reached at 571-272-7372. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHAN T NGUYEN/Patent Examiner, Art Unit 2638 /LIN YE/Supervisory Patent Examiner, Art Unit 2638
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Prosecution Timeline

Mar 06, 2025
Application Filed
Jul 21, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
89%
With Interview (+2.8%)
2y 0m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 497 resolved cases by this examiner. Grant probability derived from career allowance rate.

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