DETAILED ACTION
1. This action is in response to the amendment filed on 5/26/26.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
3. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claims 1-18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Nakayama et al. (US 2022011377) in view of Mokhberdoran et al. (US 20180241202).
Regarding claim 1: Nakayama et al. disclose an apparatus (i.e. figure 1), comprising:
a solid-state disconnect electronic component (i.e. MRp) characterized by a predetermined let-through current (i.e. current path from 20 to Lp and/or the maximum current that allow to pass through the relay MRp during a fault); and
a sensor (i.e. circuit of 10) coupled (i.e. electrically coupled) to the solid-state disconnect electronic component (i.e. MRp);
the solid-state disconnect electronic component (i.e. MRp) is configured to disconnect at least one of:
an operational electronic component (i.e. 3) coupled (i.e. electrically coupled) to the solid-state disconnect electronic component (i.e. MRp) or a power source (i.e. 20) upon the sensor (i.e. circuit of 10) detecting a fault condition (i.e. fault condition from 10), the power source (i.e. 20) being coupled (i.e. electrically coupled) to at least one of: the solid-state disconnect electronic component (i.e. MRp) and the operational electronic component (i.e. 3),
but does not specifically disclose the let-through current being a multiple of a rated current; and perform an ultra-fast on/off switching using the predetermined let-through current.
Mokhberdoran et al. disclose a DC system comprising the let-through current being a multiple of a rated current (i.e. the fast switching solid-state device support the current rating of the system, nominal current, the rise of fault current and repetitive surge current, ¶ 41, 70-74 and 78-81. Also see figures 10a-d multiple faut current ¶ 91-2); and perform an ultra-fast on/off switching using the predetermined let-through current (i.e. current path from input to output and/or the maximum current that allow to pass through the fast switching solid-state device during a fault) (i.e. ¶ 67 and 92-93).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Nakayama et al.’s invention with the DC system as disclose by Mokhberdoran et al., because the ultra-fast operation of the circuit breaker prevents the fault current from reaching very high values.
Regarding claim 2: (i.e. figure 1) wherein a solid-state disconnect housing (i.e. any housing that house MRp relay, such as circuit board or chassis for the power supply) includes the solid-state disconnect electronic component (i.e. MRp).
Regarding claim 3: (i.e. figure 1) wherein the solid-state disconnect electronic component (i.e. MRp) includes at least one solid state switch component.
Regarding claim 4: (i.e. figure 1) wherein a second housing (i.e. circuit board for the controller) includes the solid-state disconnect housing and the sensor (i.e. circuit of 10).
Regarding claim 5: (i.e. figure 1) wherein a first terminal of the sensor (i.e. circuit of 10) is coupled (i.e. electrically coupled) to a first terminal of the power source (i.e. 20) and the operational electronic component (i.e. 3) is coupled (i.e. electrically coupled) to a second terminal of the power source (i.e. 20).
Regarding claim 6: (i.e. figure 1) wherein the solid-state disconnect electronic component (i.e. MRp) is coupled (i.e. electrically coupled) to a second terminal of the sensor (i.e. circuit of 10).
Regarding claim 7: (i.e. figure 1) further comprising a pre-charge relay electronic component (i.e. MRm) and a first main relay electronic component.
Regarding claim 8: (i.e. figure 1) wherein the operational electronic component includes at least one of: a motor (i.e. 3), a power source, a power consuming element, a direct current/direct current power supply, an alternating current/direct current power supply, or any combination thereof.
Regarding claim 9: (i.e. figure 1) wherein the solid-state disconnect electronic component provides short circuit protection (i.e. function of circuit 10 and MRp) to at least one of: the operational electronic component or the power source (i.e. ¶ 23).
Regarding claim 10: (i.e. figure 1) wherein the solid-state disconnect electronic component (i.e. MRp) performs operational on/off switching.
Regarding claim 11: (i.e. figure 1) wherein the solid-state disconnect electronic component monitors (i.e. function of circuit 10 and MRp) at least one of: a current supplied to the operational electronic component from the power source, a voltage supplied to the operational electronic component from the power source (i.e. ¶ 19), an operating temperature, or any combination thereof.
Regarding claim 12: (i.e. figure 1) wherein the power source is a battery (i.e. 20).
Regarding claim 14: (i.e. figure 1) wherein the operational electronic component (i.e. 3) is coupled (i.e. electrically coupled) to the power source (i.e. 20) via a second main relay electronic component (i.e. MRm).
Regarding claim 13: Nakayama et al. discloses (i.e. figure 1) the let-through current of the solid-state disconnect electronic component (i.e. MRp) is in a range of approximately 100 amperes to approximately 1200 amperes (i.e. any amp value) the claimed invention except for with a response time being less than 10 microseconds, and wherein the ultra-fast on/off switching is performed. It would have been obvious to one having ordinary skill in the art at the time of the invention was made to modify Nakayama et al.’s invention to have a let-through current of the solid-state disconnect electronic component is in a range of approximately 100 amperes to approximately 1200 amperes, to increase the efficiency of the power supply. Since, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Mokhberdoran et al. disclose a DC system comprising the ultra-fast on/off switching is performed (i.e. ¶ 67 and 93-93).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Nakayama et al.’s invention with the DC system as disclose by Mokhberdoran et al., because the ultra-fast operation of the circuit breaker prevents the fault current from reaching very high values.
Regarding claim 15: (i.e. figure 1) wherein the second main relay (i.e. MRm) component is coupled to a control component and the second main relay component includes a reduced contactor component (i.e. contactor of MRm).
Regarding claim 16: (i.e. figure 1) further comprising at least one processor (i.e. controller of 13) configured to control operation of the solid-state disconnect electronic component.
Regarding claim 17: (i.e. figure 1) wherein the fault condition (i.e. fault condition from 10) includes at least one of the following: a short circuit, a current surge above a predetermined threshold current, a voltage surge above a predetermined threshold voltage, a temperature above a predetermined threshold temperature, or any combination thereof (i.e. ¶ 17-29).
Regarding claim 18: Nakayama et al. disclose (i.e. figure 1) solid-state disconnect apparatus, comprising: a solid-state disconnect electronic component characterized by a predetermined let-through current (i.e. current path from 20 to Lp and/or the rated current of the relay MRp) including at least one processor; and at least one memory storing instructions that, when executed by the at least one processor (i.e. ¶ 20), cause the at least one processor to disconnect an operational electronic component (i.e. 3) coupled (i.e. electrically coupled) to the solid-state disconnect electronic component (i.e. MRp) and a power source (i.e. 20) upon a sensor detecting a fault condition (i.e. fault condition from 10), the power source (i.e. 20) being coupled (i.e. electrically coupled) to at least one of: the solid-state disconnect electronic component (i.e. MRp) and the operational electronic component (i.e. 3),
but does not specifically disclose the let-through current being a multiple of a rated current; and perform an ultra-fast on/off switching using the predetermined let-through current.
Mokhberdoran et al. disclose a DC system comprising the let-through current being a multiple of a rated current (i.e. the fast switching solid-state device support the current rating of the system, nominal current, the rise of fault current and repetitive surge current, ¶ 41, 70-74 and 78-81. Also see figures 10a-d multiple faut current ¶ 91-2); and perform an ultra-fast on/off switching using the predetermined let-through current (i.e. current path from input to output and/or the maximum current that allow to pass through the fast switching solid-state device during a fault) (i.e. ¶ 67 and 92-93).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Nakayama et al.’s invention with the DC system as disclose by Mokhberdoran et al., because the ultra-fast operation of the circuit breaker prevents the fault current from reaching very high values.
Regarding claim 20: Nakayama et al. disclose an apparatus (i.e. figure 1), comprising:
a solid-state disconnect electronic component (i.e. MRp) characterized by a predetermined let-through current (i.e. current path from 20 to Lp and/or the rated current of the relay MRp);
a reduced contactor component (i.e. contactor of MRm); and
a sensor (i.e. circuit of 10) coupled to the solid-state disconnected electronic component (i.e. MRp);
the solid-state disconnect electronic component (i.e. MRp) is configured to disconnect at least one of: an operational electronic component (i.e. 3) coupled to the solid-state disconnect electronic component (i.e. MRp) or a power source (i.e. 20) upon the sensor detecting a fault condition (i.e. fault condition from 10), the power source (i.e. 20) being coupled (i.e. electrically coupled) to at least one of: the solid-state disconnect electronic component (i.e. MRp) and the operational electronic component (i.e. 3),
but does not specifically disclose the let-through current being a multiple of a rated current; and perform an ultra-fast on/off switching using the predetermined let-through current.
Mokhberdoran et al. disclose a DC system comprising the let-through current being a multiple of a rated current (i.e. the fast switching solid-state device support the current rating of the system, nominal current, the rise of fault current and repetitive surge current, ¶ 41, 70-74 and 78-81. Also see figures 10a-d multiple faut current ¶ 91-2); and perform an ultra-fast on/off switching using the predetermined let-through current (i.e. current path from input to output and/or the maximum current that allow to pass through the fast switching solid-state device during a fault) (i.e. ¶ 67 and 92-93).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Nakayama et al.’s invention with the DC system as disclose by Mokhberdoran et al., because the ultra-fast operation of the circuit breaker prevents the fault current from reaching very high values.
Response to Arguments
5. Applicant's arguments filed 5/26/26 have been fully considered but they are not persuasive.
Applicant argues that “Nakayama fails to perform any ultra-fast switching in accordance with the predetermined let-through current. Nakayama also fails to disclose or suggest that the let-through current is "a multiple of a rated current," as recited in the amended claim 1. Nowhere does Mokhberdoran disclose or suggest that its circuitry, and in particular, its solid-state circuit breakers (SSCB) are characterized by a particular "let-through" current that is a multiple of a rated current. Thus, Nakayama, Mokhberdoran, and/or their combination fail to disclose or suggest all elements of claim 1 and do not render claim 1 obvious for at least these reasons.”
The Examiner disagrees, because Mokhberdoran disclose (i.e. equivalent show in parentheses) a DC system comprising the let-through current being a multiple of a rated current (i.e. the fast switching solid-state device support the current rating of the system, nominal current, the rise of fault current and repetitive surge current, ¶ 41, 70-74 and 78-81. Also see figures 10a-d multiple faut current ¶ 91-2); and perform an ultra-fast on/off switching using the predetermined let-through current (i.e. current path from input to output and/or the maximum current that allow to pass through the fast switching solid-state device during a fault) (i.e. ¶ 67 and 92-93).
Conclusion
6. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached at 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Nguyen Tran/Primary Examiner, Art Unit 2838
Prosecution Insights