DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Czegledi et al. (hereinafter referred to as “Czegledi”, US 2025/0030449) in view of Barker et al. (hereinafter referred to as “Barker”, US 2012/0244899).
As to claim 1, Czegledi teaches an equalizer network apparatus comprising: distributing a first input signal received (Fig. 3, signal 310) through a receiving antenna of a wideband LoS-MIMO network (paragraphs [0009] and [0028]) to a first path from a first input terminal to a first output terminal, and distribute a second input signal (Fig. 3, signal 320) received through the receiving antenna to a second path from a second input terminal to the first output terminal (Fig. 3, receiving antenna(s) 1 and 2, signals 310 and 320 are divided/distributed); a first delay line located on the first path, and configured to delay the first input signal distributed to the first path (Fig. 3, delay lines/FIR filters 311-314, paragraphs [0063]-[0064], since FIR filters inherently comprise delay lines); a second phase shifter located on the second path and configured to shift a phase of the second input signal distributed to the second path (Fig. 3, 301-304, paragraphs [0063]-[0064]); and a combiner configured to combine the delayed first input signal and the phase-shifted second input signal to perform channel separation (Fig. 3, combiners 321-322, output 1 and output 2, paragraphs [0062]-[0064] and [0069], claims 5-6 and 8).
Czegledi does not expressly teach a power distributor to distribute the first and signal input signals; and a power combiner to combine the delayed first input signal and the phase shifted second input signal.
Barker further teaches a power distributor to distribute the first and signal input signals (Fig. 1, power distributers 101A-101B, paragraphs [0027]-[0028]); and a power combiner to combine the delayed first input signal and the phase shifted second input signal (Fig. 1, power combiners 102A-102B, paragraphs [0027]-[0028]).
It would have been obvious to one of ordinary skill in the art to use a power distributor to distribute the first and signal input signals; and a power combiner to combine the delayed first input signal and the phase shifted second input signal to split each of the first and second signals into two signal components of different power and power combine the delayed first input signal and the phase shifted second input signal in order to improve MIMO link in favor of spectral efficiency.
Claim(s) 2-3, 6-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Czegledi in view of Barker, and further in view of Lourenco et al. (hereinafter referred to as “Lourenco”, US 2022/0181762).
As to claim 2, Czegledi and Barker do not expressly teach that the first delay line comprises a variable delay line for a variable delay, and a fixed delay line for a fixed delay.
Lourenco further teaches that delay lines/elements of FIR filters can be variable or fixed depending on the desired applications/designs.
It would have been obvious to one of ordinary skill in the art that the first delay line comprises a variable delay line for a variable delay, and a fixed delay line for a fixed delay for the reason stated above.
As to claim 3, Czegledi does not expressly teach the second phase shifter comprises a variable phase shifter for a variable phase shift, or a fixed phase shifter for a fixed phase shift.
Barker further teaches that the second phase shifter comprises a variable phase shifter for a variable phase shift, or a fixed phase shifter for a fixed phase shift (paragraphs [0027]-[0028]).
It would have been obvious to one of ordinary skill in the art that the second phase shifter comprises a variable phase shifter for a variable phase shift, or a fixed phase shifter for a fixed phase shift, doing so would permit tuning and optimization of the cross-coupling network.
As to claim 6, Czegledi further teaches a second delay line for the wideband LoS-MIMO processing of an asymmetrical array (i.e., N transmit antennas and M receive antennas, paragraphs [0009], [0028], and [0058]), wherein the second delay line is located on the second path and configured to delay the phase-shifted second input signal so as to compensate for a time delay caused by a receiving array (Fig. 3, 301-304 and 311-314), and the combiner combines the delayed first input signal and the delayed second input signal (Fig. 3, combiners 321-322).
As to claim 7, Czegledi further teaches a first phase shifter located in front of the first delay line on the first path, and configured to shift a phase of the first input signal distributed to the first path and transmit the phase-shifted first input signal to the first delay line (Fig. 3, 301-304 and 311-314).
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Czegledi in view of Barker, and further in view of Saleh (US 4,723,321).
As to claim 12, Czegledi teaches an equalizer network apparatus comprising: distributing a first input signal received (Fig. 3, signal 310) through a receiving antenna of a wideband LoS-MIMO network (paragraphs [0009] and [0028]) to a first path from a first input terminal to a first output terminal, and distribute a second input signal (Fig. 3, signal 320) received through the receiving antenna to a second path from a second input terminal to the first output terminal (Fig. 3, receiving antenna(s) 1 and 2, signals 310 and 320 are divided/distributed); a first delay line located on the first path, and configured to delay the first input signal distributed to the first path (Fig. 3, delay lines/FIR filters 311-314, paragraphs [0063]-[0064], since FIR filters inherently comprise delay lines); a second phase shifter located on the second path and configured to shift a phase of the second input signal distributed to the second path (Fig. 3, 301-304, paragraphs [0063]-[0064]); and a combiner configured to combine the delayed first input signal and the phase-shifted second input signal to perform channel separation (Fig. 3, combiners 321-322, output 1 and output 2, paragraphs [0062]-[0064] and [0069], claims 5-6 and 8).
Czegledi does not expressly teach a plurality of analog equalizer networks; a power distributor to distribute the first and signal input signals; and a power combiner to combine the delayed first input signal and the phase shifted second input signal.
Barker further teaches a power distributor to distribute the first and signal input signals (Fig. 1, power distributers 101A-101B, paragraphs [0027]-[0028]); and a power combiner to combine the delayed first input signal and the phase shifted second input signal (Fig. 1, power combiners 102A-102B, paragraphs [0027]-[0028]).
It would have been obvious to one of ordinary skill in the art to use a power distributor to distribute the first and signal input signals; and a power combiner to combine the delayed first input signal and the phase shifted second input signal to split each of the first and second signals into two signal components of different power and power combine the delayed first input signal and the phase shifted second input signal in order to improve MIMO link in favor of spectral efficiency.
Saleh further teaches a plurality of equalizer networks (Figs. 3-4, cancellers 12 and 13).
It would have been obvious to one of ordinary skill in the art to employ a plurality of analog equalizer networks in order to perform equalization (or interference cancellation) in receivers that have four or more antennas.
Claim(s) 13-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Czegledi in view of Barker, further in view of Saleh, and further in view of Lourenco.
As to claim 13, Czegledi, Barker, and Saleh do not expressly teach that the first delay line comprises a variable delay line for a variable delay, and a fixed delay line for a fixed delay.
Lourenco further teaches that delay lines/elements of FIR filters can be variable or fixed depending on the desired applications/designs.
It would have been obvious to one of ordinary skill in the art that the first delay line comprises a variable delay line for a variable delay, and a fixed delay line for a fixed delay for the reason stated above.
As to claim 14, Czegledi does not expressly teach the second phase shifter comprises a variable phase shifter for a variable phase shift, or a fixed phase shifter for a fixed phase shift.
Barker further teaches that the second phase shifter comprises a variable phase shifter for a variable phase shift, or a fixed phase shifter for a fixed phase shift (paragraphs [0027]-[0028]).
It would have been obvious to one of ordinary skill in the art that the second phase shifter comprises a variable phase shifter for a variable phase shift, or a fixed phase shifter for a fixed phase shift, doing so would permit tuning and optimization of the cross-coupling network.
As to claim 15, Czegledi further teaches a second delay line for the wideband LoS-MIMO processing of an asymmetrical array (i.e., N transmit antennas and M receive antennas, paragraphs [0009], [0028], and [0058]), wherein the second delay line is located on the second path and configured to delay the phase-shifted second input signal so as to compensate for a time delay caused by a receiving array (Fig. 3, 301-304 and 311-314), and the combiner combines the delayed first input signal and the delayed second input signal (Fig. 3, combiners 321-322).
As to claim 16, Czegledi further teaches a first phase shifter located in front of the first delay line on the first path, and configured to shift a phase of the first input signal distributed to the first path and transmit the phase-shifted first input signal to the first delay line (Fig. 3, 301-304 and 311-314).
Allowable Subject Matter
Claims 4-5, 8-11, and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
White et al., US 2003/0179137, Fig. 9
Erceg et al., US 2003/0050020, Fig. 5
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FRESHTEH N AGHDAM whose telephone number is (571)272-6037. The examiner can normally be reached Monday-Friday 10:30-7:00 ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chieh M Fan can be reached at 571-272-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/FRESHTEH N AGHDAM/Primary Examiner, Art Unit 2632 5/30/2026
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