Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1-20 are pending in Instant Application.
Priority
Examiner acknowledges Applicant’s claim to priority benefits of PCT/CN2024/082736 filed 03/20/2024.
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 02/12/2026, 11/17/2025, 03/09/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered if signed and initialed by the Examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-10, 12-13, 16-18, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Stroud et al., “hereinafter Stroud” (U.S. Patent Application: 20130343387) in view of Huang et al., “hereinafter Huang” (U.S. Patent: 11665077).
As per Claim 1, Stroud discloses a network device comprising:
a storage device, arranged to store program codes (Stroud, Para.308, Storage device 109 includes an operating system, application level programs to be executed on one or more processors within the system, and other data and/or instructions used to configure various components or perform the tasks of the present disclosure. Storage device 109 may also store data generated by application level programs or by hardware components of the system.);
a central processing unit (CPU), arranged to load and execute the program codes to deal with a control function of a network speed test (Stroud, Para.345, Control CPU 106 may program any one of the CLDs on the board (e.g., 102A, 102B, 102C, or 123) to configure the logic and memory of that CLD. Control CPU 106 may write instructions and/or data to a CLD, Para.86, network testing system 16 may comprise any or all of the following testing and simulation subsystems: a high-speed, high-resolution network packet capture subsystem 20, a high-speed packet generation and measurement subsystem 22, Para.80, network testing system 16 may be configured for testing network 12 and/or devices 14 within or connected to network 12… the test network 12 and/or devices 14 are referred to herein as the test system 18. Thus, a test system 18 may comprise a network 12, one or more devices 14 within a network 12 or coupled to a network 12, one or more hardware, software, and/or firmware components of device(s) 14, or any other component or aspect of a network or network device.);
a hardware acceleration circuit, arranged to provide hardware-accelerated packet forwarding (Stroud, Para.121, packets sent by the traffic generation CLD 102C are forwarded directly to an Ethernet test interface 101 for delivery to the test system 18, Para.181, network packet capture subsystem 20 of network testing system 16 may provide high-speed, high-resolution network packet capture capable of capturing all types of network packets (e.g., Ethernet, TCP, UDP, ICMP, IGMP, etc.) at the maximum speed of the tested system 18 (e.g., 4.88 million packets per second, transmit and receive, per test interface).);
and a network processing unit (NPU), arranged to interact with the control function performed by the CPU, and deal with processing of data packets used for the network speed test (Stroud,Para.105, network processors 105 are programmed to generate outbound network data in the form of one or more data packets and are programmed to receive and process inbound network data in the form of one or more data packets…network processors 105 may be specialized CPUs with instruction sets and hardware optimized for processing network data. For example, network processors may be selected from the Netlogic XLR family of processors.);
wherein transmission of the data packets between the network device and another network device is performed through the NPU (Stroud, Para.135, for packets sent from a network processor 105 or controller 106, the sending processor 105, 106 first specifies a target address in a special internal header in each packet. This address may specify a test interface 101 or another processor 105, 106. The router CLD 102B may use the target address to determine where to send the packet next, e.g., it may direct the packet to the another router CLD 102B or to the nearest capture and offload CLD 102A, Para.174, Management switch 110 may route packets based on the MAC address included in each packet passing through switch 110. Thus, management switch 110 may essentially act as a router, allowing control CPUs 106 to communication with network processor 105 and CLD 102 on the same card 54 and other cards 54 in the system 16, ), without intervention of the CPU (Stroud, Para.347, the CLD directly interprets the incoming packets to make the access to internal CLD memory without intervention by an intermediate CPU or microcontroller processing the Ethernet packets.).
However Stroud does not explicitly disclose the hardware acceleration circuit.
Huang discloses the hardware acceleration circuit (Huang, Col, 1, Line:50-52, a SoC (System on Chip) used in the router with a hardware accelerator can forward packets in a line rate, the packet processing capability of the processor).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings as in Stroud with the teachings as in Huang. The motivation for doing so would have been for implementing a speed test method is then performed when the network device initiates a speed test. In the method, the speed test server transmits test packets with a first identifier to the network device for a first duration. The network device then calculates a downstream transmission rate according to the test packets. Further, the network device also transmits test packets with a second identifier to the speed test server for a second duration. Through a program performed in the speed test server, the speed test server calculates an upstream transmission rate according to the test packets. (Huang, Col.2, Line:42-51).
With respect to Claim 17 is substantially similar to Claim 1 and is rejected in the same manner, the same art and reasoning applying.
As per Claim 2, Stroud in view of Huang discloses the network device of claim 1, wherein the network speed test is a user datagram protocol (UDP) speed test (Huang, Col.3, Line:60-67, a speed test system and a speed test method that is performed by a speed test system including a speed test server and a network device (e.g., customer premises equipment (CPE), a router, a gateway, a modem or the like) at the site of a subscriber. According to one aspect of the disclosure, in the speed test method, there is generally a distributed UDP (User Datagram Protocol) load balancing network speed test mechanism that allows a dispatch server of the system to find an available speed test server by a querying process to perform the speed test method.).
The same motivation that was utilized for combining Stroud, Huang as set forth in claim 1 is equally applicable to claim 2.
With respect to Claim 18 is substantially similar to Claim 2 and is rejected in the same manner, the same art and reasoning applying.
As per Claim 4, Stroud in view of Huang discloses the network device of claim 1, wherein the program codes comprise: a data transfer module, arranged to run in a kernel space, and act as an interface between the CPU and the NPU (Stroud, Para.396, each network processor 105 configures its network interface with the supplied network address information. At step 424, each network processor 105 downloads the relevant OS kernel from drive 109 into its own memory using TFTP server 340, mounts filesystem via NFS server 344, Para.379, system 16 may be configured such that local network processors 105 boot from the local control processor 106 using DHCP, NFS (Network File System), and TFTP (Trivial File Transfer Protocol).); and a control application, arranged to run in a user space, and deal with the control function (Stroud, Para.146, applications from the controller 106 via the management network, Para.226, Controller software 132 of controller 106 to manage network resources, allowing the network processor-generated application traffic).
As per Claim 5, Stroud in view of Huang discloses the network device of claim 4, wherein the hardware acceleration circuit comprises a forwarding table used by the hardware-accelerated packet forwarding, and the control application is further arranged to set the forwarding table for enabling the hardware-accelerated packet forwarding of the data packets (Stroud, Para.133, Each router CLD 102B may include a high-speed, low-latency SRAM memory. This memory may be used for storing routing tables, statistics, TCP reassembly offload, or other suitable data, Para.199, TABLE-US-00002 TABLE 2 Network speed Era Maximum packets/second 10 Mbps Ethernet early 1990s 14,880 packets/sec 100 Mbps Ethernet late 1990s 148,809 packets/sec 1 Gbps Ethernet early 2000s 1,488,095 packets/sec 10 Gbps Ethernet late 2000s 14,880,952 packets/sec 40 Gbps Ethernet early 2010s 59,523,809 packets/sec 100 Gbps Ethernet early 2010s 148,809,523 packets/sec).
As per Claim 6, Stroud in view of Huang discloses the network device of claim 4, wherein the program codes further comprise a kernel network stack, and control packets are transmitted between the control application and the another network device through the kernel network stack (Stroud, Para.357, controller software 132 includes a software module called an CLD server. The CLD server provides a centralized mechanism for tracking failures and timeouts of Ethernet commands. The CLD server may be implemented as an operating system level driver that implements a raw socket. This raw socket is configured as a handler for Ethernet packets of the type created to implement the CLD control protocol. All other Ethernet packets left for handling by the controller's networking stack or other raw sockets.).
As per Claim 7, Stroud in view of Huang discloses the network device of claim 4, wherein the network speed test is an upstream test, and the NPU comprises: arranged to generate the data packets and send the data packets to the hardware acceleration circuit; and a message handler circuit, arranged to receive a control message from the control application, and parse the control message to set parameters of the upstream processing circuit (Stroud, Para.350, FIG. 17 illustrates the layout of the Ethernet packets containing CLD control messages according to certain embodiments of the present disclosure. The first portion of the packet is the IEEE standard header for Ethernet packets, including the destination MAC address, the source MAC address, and the Ethernet packet type field, Para.345, control CPU 106 may send instructions to traffic generating CLD 102C to have that device generating a specified number of network messages in a particular format with specified characteristics. In another example, control CPU 106 may send instructions to capture/offload CLD 102A to read back latency statistics gathered during a packet capture window.).
Stroud does not disclose the network speed test is an upstream test and an upstream processing circuit.
Huang discloses the network speed test is an upstream test and an upstream processing circuit (Huang, Col.3, Line:1-3, the upstream transmission rate is calculated in the speed test server, the network device can obtain the test result from the speed test server, Col.6, Line:17-23, When the upstream speed test is performed, the speed test server 20 receives the upstream test packets from the network device 22. The speed test server 20 calculates the upstream transmission rate based on the received test packets by a speed test send and receive task 201. The test result including the upstream transmission rate is then generated and stored to the speed test server 20.).
The same motivation that was utilized for combining Stroud, Huang as set forth in claim 1 is equally applicable to claim 7.
As per Claim 8, Stroud in view of Huang discloses the network device of claim 4, wherein the network speed test is an upstream test, and the NPU comprises: an upstream processing circuit; and a message handler circuit, arranged to receive an upstream test command from the control application, and instruct the upstream processing circuit to start generating the data packets and sending the data packets to the hardware acceleration circuit in response to the upstream test command (Huang, Col.6, Line:17-34, When the upstream speed test is performed, the speed test server 20 receives the upstream test packets from the network device 22. The speed test server 20 calculates the upstream transmission rate based on the received test packets by a speed test send and receive task 201. The test result including the upstream transmission rate is then generated and stored to the speed test server 20. Further, a report comprising the upstream test result is generated and transmitted to the network device 22 by a response message of the HTTP(s) (hypertext transfer protocol) GET message that is formed by the HTTP server 203 in the speed test server 20, which is indicated by the data flow 213 in the diagram. In some embodiments, the test results are also updated to a data model of the network device 22. The test traffic during the speed tests along both the downstream and upstream directions, are as indicated by data flows 211 in the diagram. The speed tests may be performed for a predetermined time interval, for example, 10 seconds.).
The same motivation that was utilized for combining Stroud, Huang as set forth in claim 1 is equally applicable to claim 8.
As per Claim 9, Stroud in view of Huang discloses the network device of claim 4, wherein the network speed test is an upstream test, and the NPU comprises: a message handler circuit, arranged to receive a stop command from the control application (Stroud, Para.250, at step 248, the network processor 105 stops simulation, and controller 106 stops data collection regarding the simulation. At step 250, the reporting engine 162 on controller 106 may generate reports based on data collected and stored at step 244.).
As per Claim 10, Stroud in view of Huang discloses the network device of claim 4, receive the data packets from the hardware acceleration circuit and parse the data packets to generate statistics data; and a message handler circuit, arranged to receive a get statistics command from the control application, and further arranged to generate a statistics message according to the statistics data and send the statistics message to the control application in response to the get statistics command (Stroud, Para.152, The network processor 105 works with software on the controller 106 to collect statistics, which may subsequently be used by the statistics and reporting engine 162 of subsystem 28, Para.153, The network processor 105 may also collect statistics from CLDs 102A, 102B, and 102C and report them to the controller 106. In an alternative embodiment, the controller 106 itself is configured to collect statistics directly from CLDs 102A, 102B, and 102C, Para.163, Controller 106 hosts the database, statistics and reporting engine 162 of statistics collection and reporting subsystem 28.).
Stroud does not disclose the network speed test is a downstream test, and the NPU comprises: a downstream processing circuit, arranged to receive the data packets from the hardware acceleration circuit.
Huang discloses the network speed test is a downstream test, and the NPU comprises: a downstream processing circuit, arranged to receive the data packets from the hardware acceleration circuit (Huang, Col. 4, Line:64-67, the speed test process includes a downstream speed test that is proceeding from the speed test server (i.e., 16A, 16B, 16C or 16D) to the network device 12 and an upstream speed test that is proceeding from the network device 12 to the speed test server. After the test results are generated, the test results are updated to a data model of the network device 12. In some embodiments, the test results are also provided to the dispatch server 14 (i.e., stored to the database 15) after the speed test process is completed.).
The same motivation that was utilized for combining Stroud, Huang as set forth in claim 1 is equally applicable to claim 10.
As per Claim 12, Stroud in view of Huang discloses the network device of claim 4,the NPU comprises: a message handler circuit, arranged to send a stop command to the control application (Stroud, Para.187, Controller software 132 of controller 106 configured to start, stop and post-process packet captures, Para.265, at step 268, security engine 150 stops simulation, and controller 106 stops data collection regarding the simulation. At step 270, the reporting engine 162 on controller 106 may generate reports based on data collected and stored at step 264.).
Stroud does not disclose the network speed test is a downstream test.
Huang discloses the network speed test is a downstream test (Huang, Col. 4, Line:64-67, the speed test process includes a downstream speed test that is proceeding from the speed test server (i.e., 16A, 16B, 16C or 16D) to the network device 12 and an upstream speed test that is proceeding from the network device 12 to the speed test server. After the test results are generated, the test results are updated to a data model of the network device 12. In some embodiments, the test results are also provided to the dispatch server 14 (i.e., stored to the database 15) after the speed test process is completed.).
The same motivation that was utilized for combining Stroud, Huang as set forth in claim 1 is equally applicable to claim 8.
As per Claim 13, Stroud in view of Huang discloses the network device of claim 1, wherein each of the data packets comprises a header and a payload (Stroud, Para.407, a packet (e.g., part of a data stream from test network 18) is received at system 16 on a test interface 101 and forwarded to capture/offload CLD 102A via a physical interface. At step 534, prepend module 506 attaches a prepend header to the received packet. The prepend header may include one or more header fields that are presently populated, including a timestamp indicting the arrival time of the packet, and one or more header fields that may be populated later, e.g., a hash value to be subsequently populated by routing module 508 in routing CLD 102B, as discussed below. The prepend header is discussed in greater detail below, following this description of method 530.); headers of the data packets are set by different header data, respectively; and payloads of the data packets are set by same payload data (Stroud, Para.526, segmentation logic 704 generates a new packet 706 the size of the segment length and copies in the original packet's IP and TCP headers. Segmentation logic 704 may keep a segment counter and set a segment sequence number on new packet. Segmentation logic 704 may then fill the data payload of new packet 706 with data from the data payload portion of original packet 722.).
Stroud does not discloses the network speed test is an upstream test.
Huang discloses the network speed test is an upstream test (Huang, Col. 4, Line:14-17, the speed test method is performed based on upstream test packets and downstream test packets for testing the upstream transmission rate and the downstream transmission rate, respectively.).
The same motivation that was utilized for combining Stroud, Huang as set forth in claim 1 is equally applicable to claim 8.
As per Claim 16, Stroud in view of Huang discloses the network device of claim 1, wherein the network device is an optical network unit (ONU) (Stroud, Para.216, the timestamp may have a 10 nanosecond resolution, which is fine-grained enough to measure the difference in latency between a packet traveling through a 1 meter and a 20 meter optical cable (effectively measuring the speed of light.)).
With respect to Claim 20 is substantially similar to Claim 16 and is rejected in the same manner, the same art and reasoning applying.
Claims 3, 19 are rejected under 35 U.S.C. 103 as being unpatentable over Stroud et al., “hereinafter Stroud” (U.S. Patent Application: 20130343387) in view of Huang et al., “hereinafter Huang” (U.S. Patent: 11665077) and further in view of Kerpez et al., “hereinafter Kerpez” (U.S. Patent Application: 20220247651).
As per Claim 3, Stroud in view of Huang discloses the network device of claim 2,
However Stroud in view of Huang do not disclose the UDP speed test complies with a TR-471 speed test protocol.
Kerpez discloses the UDP speed test complies with a TR-471 speed test protocol (Kerpez, Para.64, edge probing can derive time information by invoking a User-Datagram Protocol (UDP) speed test, as defined in Broadband Forum TR-471, Maximum IP-Layer Capacity Metric, Related Metrics, and Measurements, 2020 to determine network speed. The UDP speed test can identify network performance and sectionalize to find bottlenecks.).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings as in Stroud, Huang with the teachings as in Kerpez. The motivation for doing so would have been for measuring or improving edge computing performance. Time information comprises but is not limited to information that can be used to determine delay, jitter, computation time, network time, overall delay, overall latency, overall jitter, delay or jitter in a particular component of a system, computation speed or computation speed variation in the entire system or in any component of the system, network delay or network transport times, network transport jitter. (Kerpez, Para.15).
With respect to Claim 19 is substantially similar to Claim 3 and is rejected in the same manner, the same art and reasoning applying.
Allowable Subject Matter
Claim 11, 14, 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/NORMIN ABEDIN/Primary Examiner, Art Unit 2449
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