DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Preliminary Remarks
This is a reply to the application filed on 03/11/2025, in which, claims 1-20 remain pending in the present application with claims 1, 8, and 15 being independent claims.
When making claim amendments, the applicant is encouraged to consider the references in their entireties, including those portions that have not been cited by the examiner and their equivalents as they may most broadly and appropriately apply to any particular anticipated claim amendments.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on March 12, 2025 is in compliance with the provisions of 37 CFR 1.97 and is being considered by the Examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Boyce et al. (US 20200186831 A1, hereinafter referred to as “Boyce”) in view of Silvestri (US 20180159911 A1, hereinafter referred to as “Silvestri”).
Regarding claim 1, Boyce discloses a method comprising:
receiving a frame-based video comprising a series of frames (see Boyce, paragraph [0171]: “the coder 743 may receive 2D video frames. The 2D video frames (as well as other video frames discussed herein) may include any suitable video data such as pixels or pixel values or data, video sequence, pictures of a video sequence, video frames, video pictures, sequence of video frames, group of pictures, groups of pictures, video data, or the like in any suitable resolution”);
encoding the frame-based video into threaded video (see Boyce, paragraph [0171]: “the term pixel or pixel value may include a value representing a pixel of a video frame such as a luminance value for the pixel, a color channel value for the pixel, or the like. In various examples, 2D video frames may include raw video or decoded video. Furthermore, as discussed herein, the coder 743 may provide both encode and decode functionality”) through steps comprising:
converting the frame-based video into a domain space (see Boyce, paragraph [0172]: “the encode component predictor 744 may receive 2D video frames that include projections from a 360 video space”);
generating a set of tiles, each tile of the set of tiles corresponding to a sub- space within the series of frames (see Boyce, paragraph [0173]: “The block selector 745 may select groups of blocks for encode component prediction (e.g. for some or all of the 2D video frames). The block selector 745 may select such groups of blocks for encode component prediction using any suitable technique or techniques. In some embodiments, the block selector 745 may receive an indicator or indicators indicative of a format type of the 2D video frames (e.g., equirectangular format, cube map format, compact cube map format, or the like) and the block selector 745 may determine which groups of blocks to select for encode component prediction responsive to the format type indicator or indicators. Each of such group of blocks selected for encode component prediction may include a first set of blocks and a second set of blocks such that the first and second set of blocks are non-neighboring in the 2D video frame but are neighboring in the 360 video space”); and
storing the threaded video in a memory device, wherein the threaded video is sparser than the frame-based video (see Boyce, paragraph [0143]: “The fragment/pixel processing unit 524 can read data that is stored in either the parallel processor memory or the system memory for use when processing the fragment data. Fragment or pixel shader programs may be configured to shade at sample, pixel, tile, or other granularities depending on the sampling rate configured for the processing units”).
Regarding claim 1, Boyce discloses all the claimed limitations with the exception of for each tile of the set of tiles, generating a set of control points while traversing a driving parameter of the series of frames based on a delta.
Silvestri from the same or similar fields of endeavor discloses for each tile of the set of tiles, generating a set of control points while traversing a driving parameter of the series of frames based on a delta (see Silvestri, paragraphs [0211]-[0212]: “control station 114 may identify control points (e.g., waypoints) within two or more frames, for example by clicking or tapping on a display screen displaying the frames. Control points may be used to define and generate a tracking path. The tracking path defines a path to be followed within the sequence of frames when a zoom level or cropping bound is applied. For example, cropping bounds can be centered on the tracking path when the instant replay is output. Frames for which control points are defined may be referred to as keyframes ... For frames that do not have explicitly defined control points, intermediate control points can be generated (e.g., by control station 114 or output node 160) along the tracking path by interpolating between keyframes, taking into account the timecodes of the keyframes and the frame containing the intermediate control point”).
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings as in Silvestri with the teachings as in Boyce. The motivation for doing so would ensure the system to have the ability to use the control station which can retrieve media frames originating in the stored media streams from the storage server based on respective timecodes disclosed in Silvestri to identify control points within two or more frames and to generate a tracking path using control points wherein the tracking path defines a path to be followed within the sequence of frames thus generating a set of control points while traversing a driving parameter of the series of frames based on a delta in order to determine whether to keep or remove a given control point therefore performing data deduplication or compression based on the identified control points.
Regarding claim 2, the combination teachings of Boyce and Silvestri as discussed above also disclose the method of claim 1, wherein the set of control points corresponds to a luminance value (see Boyce, paragraph [0171]: “the term pixel or pixel value may include a value representing a pixel of a video frame such as a luminance value for the pixel, a color channel value for the pixel, or the like”); and
wherein encoding the frame-based video into threaded video data further comprises, for each tile of the set of tiles, generating a second set of control points while traversing the driving parameter of the series of frames, wherein the second set of control points corresponds to a color value (see Boyce, paragraph [0183]: “FIG. 7G illustrates an embodiment of a 2D video frame 770 including a projection from a 360 video space in a cube map format and selected blocks for encode component prediction. For example, a group of blocks G3 may include a block 771 and a block 772 that may be aligned for encode component prediction. The group of blocks G4 may include a block 773 and a block 774 that may be rotated and aligned as needed for encode component prediction. As discussed herein, other combinations of blocks may be identified as neighbors and aligned into groups of blocks for encode component prediction. The 2D video frame 770 may include a left frame boundary 776, a right frame boundary 777, a top frame boundary 778, and a bottom frame boundary 779. Furthermore, the 2D video frame 770 may include blank pixel regions R1, R2, which are illustrated as hatched in the 2D video frame 770 but may include any suitable color or pixel values (e.g. black)”).
The motivation for combining the references has been discussed in claim 1 above.
Regarding claim 3, the combination teachings of Boyce and Silvestri as discussed above also disclose the method of claim 1 further comprising:
decoding the threaded video by reconstructing, for each tile, the frame-based video based on the threaded video (see Boyce, paragraph [0162]: “The bitstream may be stored or transmitted or the like and processed by a decoder. The decoder, such as a standards compliant decoder, may decode the bitstream to reconstruct the 2D video frames (e.g., the projections from the 360 video). The reconstructed 2D video frames may be processed for presentation to a user. For example, a selected viewport may be used to determine a portion or portions of the reconstructed 2D video frames, which may be assembled as needed and provided to a display device for presentation to a user”).
The motivation for combining the references has been discussed in claim 1 above.
Regarding claim 4, the combination teachings of Boyce and Silvestri as discussed above also disclose the method of claim 3, wherein a first tile of the set of tiles has a first tile- playback rate, and a second tile of the set of tiles has a second tile-playback rate, wherein the first tile-playback rate is different than the second tile-playback rate (see Silvestri, paragraph [0210]: “Referring now to FIGS. 9A to 12D, there are illustrated sequences of video frames in accordance with one embodiment. For example, FIGS. 9A to 9D illustrate frames 910, 920, 930 and 940 of an instant replay media clip. Although only four frames are shown for ease of illustration, it will be appreciated that the media clip may comprise any plurality of frames depending on the length of the instant replay and frame rate”).
The motivation for combining the references has been discussed in claim 1 above.
Regarding claim 5, the combination teachings of Boyce and Silvestri as discussed above also disclose the method of claim 3, wherein decoding the threaded video includes:
generating a thread based on the set of control points within the threaded video (see Boyce, paragraph [0300]: “one or more data caches (e.g., 2112) are included to cache thread data during thread execution. In some embodiments, sampler 2110 is included to provide texture sampling for 3D operations and media sampling for media operations. In some embodiments, sampler 2110 includes specialized texture or media sampling functionality to process texture or media data during the sampling process before providing the sampled data to an execution unit”); and
reconstructing the frame-based video based on sampling the thread (see Boyce, paragraph [0305]: “The execution unit hardware references a set of compaction tables based on the index values and uses the compaction table outputs to reconstruct a native instruction in the 128-bit format”).
The motivation for combining the references has been discussed in claim 1 above.
Regarding claim 6, the combination teachings of Boyce and Silvestri as discussed above also disclose the method of claim 1, wherein generating a set of control points while traversing a driving parameter of the series of frames based on the delta comprises:
determining a luminance value or a color value for the tile at each frame of the series of frames (see Boyce, paragraph [0171]: “The 2D video frames (as well as other video frames discussed herein) may include any suitable video data such as pixels or pixel values or data, video sequence, pictures of a video sequence, video frames, video pictures, sequence of video frames, group of pictures, groups of pictures, video data, or the like in any suitable resolution”), wherein the frames are organized sequentially with respect to the driving parameter (see Silvestri, paragraph [0219]: “Referring now to FIGS. 10A to 10D, there is illustrated a further sequence of frames 1010, 1020, 1030 and 1040, in accordance with some embodiments in which control points are automatically identified by control station 114 based on an initial input from a user and movement of objects within a scene”); and
in response to determining the luminance value or color value between an initial frame associated with a first control point and a subsequent frame exceeds the delta (see Boyce, paragraph [0072]: “delta color compression is performed on depth and color data on a per-tile basis”), generating a second control point at the subsequent frame (see Silvestri, paragraph [0222]: “In subsequent frames, control station 114 analyzes the scene, identifies the selected object and generates intermediate control points”).
The motivation for combining the references has been discussed in claim 1 above.
Regarding claim 7, the combination teachings of Boyce and Silvestri as discussed above also disclose the method of claim 1, wherein the driving parameter is a time domain parameter or a frequency domain parameter (see Silvestri, paragraph [0112]: “A timecode reference may be a timing reference associated with a particular point in time, as referenced to the timecode of the stream”).
The motivation for combining the references has been discussed in claim 1 above.
Claim 8 is rejected for the same reasons as discussed in claim 1 above. In addition, the combination teachings of Boyce and Silvestri as discussed above also disclose a memory component (see Boyce, paragraph [0052]: “The memory hub 105 may be a separate component within a chipset component or may be integrated within the one or more processor(s) 102.”); and
a processing device coupled to the memory component (see Boyce, paragraph [0052]: “The computing system 100 includes a processing subsystem 101 having one or more processor(s) 102 and a system memory”).
Claim 9 is rejected for the same reasons as discussed in claim 2 above.
Claim 10 is rejected for the same reasons as discussed in claim 3 above.
Claim 11 is rejected for the same reasons as discussed in claim 4 above.
Claim 12 is rejected for the same reasons as discussed in claim 5 above.
Claim 13 is rejected for the same reasons as discussed in claim 6 above.
Claim 14 is rejected for the same reasons as discussed in claim 7 above.
Claim 15 is rejected for the same reasons as discussed in claim 1 above. In addition, the combination teachings of Boyce and Silvestri as discussed above also disclose a non-transitory computer readable medium storing executable instructions, which when executed by a processing device (see Boyce, paragraph [0151]: “implemented in one or more modules as a set of logic instructions stored in a machine- or computer-readable storage medium such as random access memory (RAM), read only memory (ROM), programmable ROM (PROM), firmware, flash memory, etc., to be executed by a processor or computing device”).
Claim 16 is rejected for the same reasons as discussed in claim 2 above.
Claim 17 is rejected for the same reasons as discussed in claim 3 above.
Claim 18 is rejected for the same reasons as discussed in claim 4 above.
Claim 19 is rejected for the same reasons as discussed in claim 5 above.
Claim 20 is rejected for the same reasons as discussed in claim 6 above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NIENRU YANG whose telephone number is (571)272-4212. The examiner can normally be reached Monday-Friday 10AM-6PM EST.
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NIENRU YANG
Examiner
Art Unit 2484
/NIENRU YANG/Examiner, Art Unit 2484
/THAI Q TRAN/Supervisory Patent Examiner, Art Unit 2484