Prosecution Insights
Last updated: October 02, 2026
Application No. 19/077,945

RESONANT CONVERTER

Non-Final OA §103
Filed
Mar 12, 2025
Priority
Mar 15, 2024 — provisional 63/565,803
Examiner
FINCH III, FRED E
Art Unit
Tech Center
Assignee
Delta Electronics Inc.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
741 granted / 924 resolved
+20.2% vs TC avg
Strong +17% interview lift
Without
With
+17.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
27 currently pending
Career history
952
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
47.0%
+7.0% vs TC avg
§102
28.6%
-11.4% vs TC avg
§112
18.6%
-21.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 924 resolved cases

Office Action

§103
DETAILED ACTION This Office action is in response to the application filed on 12 March 2025. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-4 and 8-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 2025/0273384; hereinafter “Chen”) in view of Hu et al. (US 2022/0005795; hereinafter “Hu”)1 and “Magnetic Circuit Design for Power Electronics” by Hurley, et al. (hereinafter “Hurley”). In re claim 1, Chen discloses a resonant converter (Figs. 1-6) comprising: a circuit board (Fig. 1; the boards 100, 200 are considered to be part of a single, composite circuit board structure as shown) comprising a plurality of sub-layer boards ([0017]), a primary-side circuit disposed on the circuit board (Fig. 2: 150; [0020]), a secondary-side circuit disposed on the circuit board (350; [0024]), and the primary-side circuit or the secondary-side circuit comprising a power component (Fig. 3: power transistors PMS1-2 and SMS1-4, capacitors Cr, Co), a planar transformer disposed on the circuit board and electrically connected to the primary-side circuit and the secondary-side circuit (200; [0024]), and the planar transformer comprising: a through hole penetrating the circuit board (Fig. 6 shows the through-holes through which the magnetic pillars 210P1, 210P2 (Fig. 4A/5A) of magnetic core 210 pass; see Abstract, [0036], a core (210) comprising a core column (210P1, 210P2) penetrating the through hole (see Figs. 4A/5A and Abstract), a wiring formed around the through hole, and configured to be as a winding of the planar transformer (primary windings P1, P2 and secondary windings ST1/ST2 and SB1/SB2; see [0042], [0044]), and a first via formed on the circuit board, and configured to electrically connect the power component and the winding disposed on the sub-layer board (see vias V1 in Fig. 7; see [0017], [0042], [0058]). Chen does not disclose the following features: wherein the power component is embedded in any one of the sub-layer boards the planar transformer core being of iron Regarding feature (1), embedding power components such as power switching components in sub-layers of a multi-layered PCB was known; Hu discloses a resonant power converter on a PCB (Figs. 5-6) and teaches that integrated switching devices can be embedded in sub-layers of the PCB to reduce the area size and increase efficiency through AC impedance reduction ([0009]-[0012]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the converter of Chen by embedding the power components ( in a sub-layer board as taught by Hu in order to reduce the area of the converter and increase efficiency through AC impedance reduction. Regard feature (2), the use of iron materials in transformer cores was conventionally known; Hurley teaches that iron-based ferrite materials were commonly used in high-frequency applications to reduce eddy current losses (sec. 17.2 Magnetic Materials and Characteristics). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the converter of Chen by using an iron-based material such as ferrite for the transformer core as taught by Hurley in order to reduce eddy current losses at high switching frequencies. In re claim 2, Chen as modified discloses wherein the number of the power component is plural, and comprises: a first switch (Figs. 3, 6-7: SMS1) disposed on the circuit board, a second switch (SMS4) disposed on the circuit board, and an output capacitor (Co) disposed on the circuit board, and electrically connected to the first switch and the second switch to form the secondary-side circuit (see Fig. 3), and the first switch, the second switch, and the output capacitor respectively embedded in any one of the sub-layer boards (as resulting from the modification in view of Hu as proposed above), wherein the wiring is a secondary-side wiring (Figs. 3-7: windings ST1/ST2, SB1/SB2) and is configured to be as a secondary-side winding electrically connected to the secondary-side circuit (Fig. 3), and the first switch, the second switch, and the output capacitor are electrically connected to the secondary-side winding through the corresponding first vias respectively (see vias such as V1 in Fig. 7, other vias not shown; see [0017], [0042], [0058]). In re claim 3, Chen as modified discloses wherein the number of the power component is plural, and comprises: a first power switch disposed on the circuit board (Fig. 3: PMS1; [0020]), and a second power switch disposed on the circuit board (PMS2), and the first power switch and the second power switch forming a primary-side switch bridge arm of the primary-side circuit (See Fig. 3: primary circuit 150), and the first power switch and the second power switch respectively embedded in any one of the sub-layer boards (as resulting from the modification in view of Hu as proposed above), wherein the wiring is a primary-side wiring (Figs. 3-7: primary windings P1, P2) and is configured to be as a primary-side winding electrically connected to the primary-side circuit (see Fig. 3), and the first power switch and the second power switch are electrically connected to the primary-side winding through the corresponding first vias respectively (primary side vias not explicitly shown; see [0017], [0042], [0058]). In re claim 4, Chen as modified discloses a second via formed on the circuit board (Fig. 7: multiple vias V1), wherein the winding is a modular winding embedded in in any one of the sub-layer boards (see Figs. 4B/5B), and the modular winding is electrically connected to the primary-side circuit or the secondary-side circuit through the second via (see [0017], [0042], [0058]). In re claim 8, Chen as modified discloses an electrical wiring configured to electrically connect the first via and the second via so that the power component electrically connected to the modular winding through the electrical wiring. In re claim 9, Chen as modified discloses wherein the primary-side circuit comprises: a modular winding embedded in in any one of the sub-layer boards of the circuit board, and the modular winding comprising an inductor wiring for forming an inductor winding, and a third via formed on the circuit board, and configured to electrically connect the modular winding to the primary-side circuit. Claim(s) 10- is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 2025/0273384; hereinafter “Chen”) in view of “Magnetic Circuit Design for Power Electronics” by Hurley, et al. (hereinafter “Hurley”) and Afsharian et al. (US 2022/0230797; hereinafter “Afsharian”)2. In re claim 10, Chen discloses a resonant converter (Figs. 1-6) comprising: a circuit board (Fig. 1; the boards 100, 200 are considered to be part of a single, composite circuit board structure as shown) comprising a plurality of sub-layer boards ([0017]), a primary-side circuit disposed on the circuit board (Fig. 2: 150; [0020]), a secondary-side circuit disposed on the circuit board (350; [0024]), and the primary-side circuit or the secondary-side circuit comprising: a first switch disposed on the circuit board (Figs. 3, 6-7: SMS1), a second switch disposed on the circuit board (SMS2), and an output capacitor (Fig. 3: Co or unlabeled capacitors connected to SMS1-4) disposed on the circuit board ([0029]), and electrically connected to the first switch and the second switch (Fig. 3), and a planar transformer disposed on the circuit board and electrically connected to the first switch, the second switch, and the output capacitor (Fig. 3: 200; [0024]), and the planar transformer comprising: a through hole penetrating the circuit board (Fig. 6 shows the through-holes through which the magnetic pillars 210P1, 210P2 (Fig. 4A/5A) of magnetic core 210 pass; see Abstract, [0036], a core (210) comprising a first core column (210P1, 210P2) penetrating the through hole (see Figs. 4A/5A and Abstract), a secondary-side winding (secondary windings ST1/ST2 and SB1/SB2) arranged on at least one sub-layer board (see Figs. 4B/5B) and formed around the through hole (see [0042], [0044]), wherein one terminal of the secondary-side wiring is electrically connected to the first switch (see Fig. 3: ST1 connected to SMS1), and the other terminal of the secondary-side wiring is electrically connected to the second switch (ST2 connected to SMS2), wherein the first switch and the second switch are disposed on the same side of the through hole (see Figs. 6-7). Chen does not disclose the following features: the planar transformer core being of iron the output capacitor is disposed between the first switch and the second switch Regarding feature (1), the use of iron materials in transformer cores was conventionally known; Hurley teaches that iron-based ferrite materials were commonly used in high-frequency applications to reduce eddy current losses (sec. 17.2 Magnetic Materials and Characteristics). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the converter of Chen by using an iron-based material such as ferrite for the transformer core as taught by Hurley in order to reduce eddy current losses at high switching frequencies. Regard feature (2), Afsharian discloses a resonant converter (Fig. 12) wherein secondary side switches (SR) and an output capacitor (Co) are coupled to a secondary winding so that the output capacitor is disposed between the first and second switch (See Fig. 5B: CAP between SR1, SR3 or between SR2, SR4) as part of a design to reduce termination losses and leakage inductance ([0010]-[0011], [0057]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the converter of Chen by disposing the output capacitor between the first switch and the second switch as taught by Afsharian in order to reduce termination losses and leakage inductance. In re claim 11, Chen as modified discloses wherein the first switch and the second switch are substantially mirrored with the output capacitor as the center (as a result of the modification in view of Afsharian; see Afsharian at Fig. 5B: CAP between SR1, SR3 or between SR2, SR4). In re claim 12, Chen as modified discloses wherein the secondary-side wiring comprises: a first secondary-side wiring electrically connected to the first switch (Fig. 1: ST2), and a second secondary-side wiring electrically connected to the second switch and the first secondary-side wiring (Fig. 3: ST2), wherein the first switch, the second switch, and the output capacitor are disposed on the same surface of the circuit board (as a result of modification in view of Afsharian; see Chen at Figs. 6-7 and Afsharian at Fig. 5B), and the first secondary-side wiring and the second secondary-side wiring are respectively arranged on at least any two sub-layer boards of the circuit board (see Chen at Figs. 4B/5B). In re claim 13, Chen as modified discloses wherein the resonant converter comprises two groups of secondary-side circuits and two groups of secondary-side wirings (see Chen, Fig. 3), and each group of secondary-side wiring comprises: a first secondary-side wiring electrically connected to the first switches of the two groups of secondary-side circuits respectively (Fig. 3: ST1/SB1 connected to SMS1/SMS3), a second secondary-side wiring electrically connected to the first secondary-side wiring, and electrically connected to the second switches of the two groups of secondary-side circuits respectively (Fig. 3: ST2/SB2 connected to SMS2/SMS4), wherein the first switches, the second switches, and the output capacitors of the secondary-side circuits are respectively disposed on two surfaces of the circuit board (as a result of modification in view of Afsharian; see Afsharian, Fig. 5B: CAP, SR1, SR3 on one side; CAP, SR2, SR4 on opposite side), and the first secondary-side wirings and the second secondary-side wirings of the secondary-side wirings are respectively arranged on at least any four sub-layer boards of the circuit board (see Chen, Figs. 4B/5B). In re claim 14, Chen as modified discloses wherein the number of the output capacitor is plural (see Chen, Fig. 3: unlabeled output capacitors connected to SMS1-4; or see Afsharian, Fig. 5B and Fig. 12: plural CAP/Co), and the secondary-side circuit further comprises: a third switch disposed on the circuit board (Chen, Fig. 3: SMS3), and a fourth switch disposed on the circuit board (SMS4), wherein the first switch, the second switch, and one output capacitor are disposed on one surface of the circuit board (as a result of modification in view of Afsharian; see Afsharian, Fig. 5B: CAP, SR1, SR3 on one side); the third switch, the fourth switch, and the other output capacitor are disposed on the other surface of the circuit board (as a result of modification in view of Afsharian; see Afsharian, Fig. 5B: CAP, SR2, SR4 on other side), and the secondary-side wirings are arranged on at least any two sub-layer boards of the circuit board (See Chen, Figs. 4B/5B). In re claim 15, Chen discloses wherein when the first switch is turned on, a first current flows from the first switch around the through hole to the output capacitor to form a first current path (as evidenced by the circuit diagram in Fig. 3 of Chen: when SMS1 is ON, current flows from ground, through SMS1, through the winding ST1 which is arranged around the through-hole as shown in Fig. 6, to the output capacitor); when the second switch is turned on, a second current flows from the second switch around the through-hole to the output capacitor to form a second current path (as explained above, mutatis mutandis); wherein the first current path is opposite to the second current path (relative to the dotted ends of the windings ST1/ST2 in Fig. 3 of Chen). Allowable Subject Matter Claims 5-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: With respect to claim 5, the closest prior art is considered to be Chen as modified in view of Hu and Hurley, as presented above in this Office action. Such combination discloses the invention according to claim 4 (See rejection above), but does not further disclose wherein the modular winding comprises: a plurality of conductive materials respectively formed between a first layer and a second layer of the modular winding, and the wiring interleavingly extends to the first layer and the second layer through the plurality of conductive materials. Further, the additional prior art on record does not teach such a feature and therefore does not suggest an obvious modification to Chen that would result in the claimed features. Claims 6-7 both depend, either directly or indirectly, from claim 5 and would therefore be allowable for the same reasons. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2013/0301312 discloses an ISOLATED SWITCHING POWER SUPPLY APPARATUS including planar transformer. US 2021/0066170 discloses a POWER MODULE AND METHOD FOR MANUFACTURING THE SAME including planar transformer and embedded power components. US 2021/0274656 discloses a POWER MODULE including planar transformer. US 2022/0392696 discloses a MAGNETIC ELEMENT, METHOD FOR MANUFACTURING MAGNETIC ELEMENT, AND POWER SUPPLY MODULE comprising a planar transformer formed in a multi-layer circuit board. US 2025/0323571 is a co-pending application by the same applicant/inventors as the instant application. It is cited as claiming a similar invention, which nonetheless is considered patentably distinct from the claims of the instant application because it requires two separate circuit boards for mounting two separate secondary side circuits, in contrast to the instant claims including all circuitry on one circuit board. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FRED E FINCH III whose telephone number is (571)270-7883. The examiner can normally be reached Monday-Friday, 8:00 AM - 4:30 PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FRED E FINCH III/Primary Examiner, Art Unit 2838 1 Hu was cited by Applicant in the Information Disclosure Statement filed 12 March 2025. 2 Afsharian was cited by Applicant in the Information Disclosure Statement filed 12 March 2025.
Read full office action

Prosecution Timeline

Mar 12, 2025
Application Filed
Aug 17, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
97%
With Interview (+17.2%)
2y 5m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 924 resolved cases by this examiner. Grant probability derived from career allowance rate.

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