Prosecution Insights
Last updated: October 26, 2026
Application No. 19/079,549

MULTILAYER CERAMIC ELECTRONIC COMPONENT

Non-Final OA §102§112
Filed
Mar 14, 2025
Priority
Mar 22, 2024 — JP 2024-046276
Examiner
THOMAS, ERIC W
Art Unit
2848
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
1065 granted / 1288 resolved
+14.7% vs TC avg
Minimal -2% lift
Without
With
+-1.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
31 currently pending
Career history
1328
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
51.0%
+11.0% vs TC avg
§102
30.9%
-9.1% vs TC avg
§112
8.9%
-31.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1288 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 112 Claims 3-4 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 3 recites the limitation "the electrically conductive layer" in line 11. There is insufficient antecedent basis for this limitation in the claim. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 and 3 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Miyazaki (US 2014/0254064 A1). PNG media_image1.png 290 404 media_image1.png Greyscale PNG media_image2.png 288 460 media_image2.png Greyscale Regarding claim 1, Miyazaki discloses in Fig. 1 and 12, a multilayer ceramic electronic component (11) comprising: a multilayer body (18) including a plurality of ceramic layers (19) and a plurality of internal conductive layers (20, 21) alternately laminated in a height direction (top-bottom), a pair of main surfaces (14, 15) opposed to each other in the height direction (top-bottom), a pair of end surfaces (12, 13) opposed to each other in a length direction (left-right) orthogonal or substantially orthogonal to the height direction, and a pair of lateral surfaces (16, 17) opposed to each other in a width direction (left-right – Fig. 12) orthogonal or substantially orthogonal to the height direction and the length direction; and a pair of external electrodes (22, 23) that are each provided on a corresponding one of both end portions (22, 23) in the length direction (left-right) of the multilayer body (18) in a manner spaced apart from each other, wherein the pair of main surfaces (14, 15) includes a first main surface (top) and a second main surface (bottom) opposed to each other in the height direction (top-bottom), the pair of end surfaces (12, 13) includes a first end surface (left) and a second end surface (right) opposed to each other in the length direction (left-right), the pair of lateral surfaces (16, 17) includes a first lateral surface (left-Fig. 12) and a second lateral surface (right – Fig. 12) opposed to each other in the width direction (left-right – Fig. 12), the plurality of internal conductive layers (20, 21) include a plurality of first internal conductive layers (20) that extend toward and are exposed at the first end surface (12) and a plurality of second internal conductive layers (21) that extend toward and are exposed at the second end surface (13), each of the pair of external electrodes (22, 23) includes a main surface-side external electrode (top) on at least one of the first main surface (14) or the second main surface, the main surface-side external electrode (top) includes a surface opposed to the at least one of the first main surface (14) or the second main surface, the surface (top) includes a stepped portion (@44) that, in a height from the at least one of the first main surface (14) or the second main surface to the surface, makes a height of the surface located adjacent to a middle of the multilayer body in the length direction lower than the surface located adjacent to an outer side of the multilayer body in the length direction (see Fig. 12), and the stepped portion (@ 44) includes a curved shape (44, see Fig. 12) protruding toward the middle in the length direction, and extends in the width direction on the surface. Regarding claim 3, Miyazaki discloses the main surface-side external electrode includes a base electrode layer (34a) on the at least one of the first main surface (14) or the second main surface, a plated layer [0088] provided as an upper layer of the base electrode layer (34a), and an electrically conductive resin layer (34b – [0052]) provided between the base electrode layer (34a) and the plated layer [0088], and at a location adjacent to the middle of the multilayer body in the length direction relative to the stepped portion, the plated layer [0088] is provided and the electrically conductive polymer layer (34b) is not provided, on the base electrode layer (34a). Allowable Subject Matter Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 4 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: In combination with the other claim limitations, the prior art does not teach or suggest a multilayer ceramic electronic component : A) wherein the edge includes a curvature smaller than a curvature of the stepped portion (claim 2); and B) wherein the stepped portion includes a thickness larger than a thickness of the plated layer located on an outer side of the multilayer body in the length direction relative to the stepped portion (claim 4). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2023/0093850 A1 – a multilayer ceramic capacitor having external electrodes with convex portions US 2020/0029438 A1 – a multilayer ceramic capacitor having external electrodes with stepped portions US 2016/0351332 A1 – a multilayer ceramic capacitor having external electrodes with stepped portions US 2017/0018361 A1 – a multilayer ceramic capacitor having external electrodes with stepped portions Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC THOMAS whose telephone number is (571)272-1985. The examiner can normally be reached Monday-Friday, 6:00 AM-2:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571)272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC W THOMAS/Primary Examiner, Art Unit 2847 ERIC THOMAS Primary Examiner Art Unit 2847
Read full office action

Prosecution Timeline

Mar 14, 2025
Application Filed
Sep 28, 2026
Non-Final Rejection mailed — §102, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12770785
MULTILAYER ELECTRONIC COMPONENT INCLUDING Ni-Pd BASE ELECTRODE LAYER
2y 8m to grant Granted Oct 20, 2026
Patent 12770787
MULTILAYERED CAPACITOR
2y 5m to grant Granted Oct 20, 2026
Patent 12770790
DIELECTRIC RESIN FILM AND FILM CAPACITOR
2y 0m to grant Granted Oct 20, 2026
Patent 12763258
MULTILAYER ELECTRONIC COMPONENT
2y 11m to grant Granted Oct 13, 2026
Patent 12763268
ELECTRIC DOUBLE LAYER CAPACITOR
2y 8m to grant Granted Oct 13, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
81%
With Interview (-1.9%)
2y 3m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1288 resolved cases by this examiner. Grant probability derived from career allowance rate.

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