DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Specification
3. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
4. Claims 12 and 13 objected to because of the following informalities:
Claim 12 line 2 recites “wherein the first circuit path includes a terminal operative to supply third output current to the output node;”.
However, it appears that it should recite “wherein the first circuit path includes a terminal operative to supply a third output current to the output node;”.
Claim 13 line 2 recites “… a terminal operative to supply fifth output current to the output node.”.
However, it appears that it should recite “… a terminal operative to supply a fifth output current to the output node.”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
6. Claim(s) 1 – 5, 7, 11 – 13, 16 - 17, 20 and 22 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Jiang et al (US Pub. No. 2024/0120847 A1); (hereinafter Jiang).
Regarding claim 1, Jiang et al [e.g., Fig. 8] discloses an apparatus [e.g., voltage regulator 800] comprising: first power converter circuitry magnetically coupled to a first circuit path [e.g., path formed by inductors and AVR bridges 210-1 and 210-2]; second power converter circuitry magnetically coupled to a second circuit path [e.g., path formed by inductors and AVR bridges 810 and 815]; and a third circuit path, wherein each of the first circuit path and the second circuit path are magnetically coupled to the third circuit path [e.g., path formed by inductors and AVR bridges 210-1 and 210-2 and path formed by inductors and AVR bridges 810 and 815 magnetically coupled to main stage 110].
Regarding claim 2, Jiang et al [e.g., Fig. 8] discloses wherein the first power converter circuitry includes a first winding [e.g., secondary winding 140-1], the first winding magnetically coupled to a second winding [e.g., magnetically coupled to primary winding 130-1] disposed in series in the first circuit path [e.g., secondary winding 140-1 magnetically coupled to primary winding 130-1 from the first path (path formed by inductors and AVR bridges 210-1 and 210-2)]; and wherein the second power converter circuitry includes a third winding [e.g., primary winding 140-2], the third winding magnetically coupled to a fourth winding [e.g., magnetically coupled to primary winding 820-2] disposed in series in the second circuit path [e.g., disposed in series in the second path (path formed by inductors and AVR bridges 810 and 815)].
Regarding claim 3, Jiang et al [e.g., Fig. 8] discloses wherein the first power converter circuitry includes a first group of power converters [e.g., (130-1 and 140-1), (130-3 and 140-3)], each of which is magnetically coupled to the first circuit path [e.g., coupled to first path (path formed by inductors and AVR bridges 210-1 and 210-2)]; wherein the second power converter circuitry includes a second group of power converters [e.g., (820-2 and 140-2), (820-k and 140-k)], each of which is magnetically coupled to the second circuit path [e.g., coupled to second path (path formed by inductors and AVR bridges 810 and 815)], the apparatus further comprising: control circuitry [e.g., control circuitry controlling AVR bridges] operative to control balancing of output currents outputted from the power converters in the first group and the power converters in the second group to produce an output voltage [e.g., p. 0027 recites “In practice, the pwm signals controlling the switches 170a and 170b may be the inverse of each other, and they may be provided by control circuitry (not shown) in response to current demanded by a load coupled to the output terminal 160. That is, when an increased demand for current at output terminal 160 is sensed by the control circuitry, the control circuitry may modulate the duty cycle of the pwm control signals for switches 170a and 170b such that stage 110-1 stays active longer and supplies more current to the load. The other stages 110-2 to 110-k may be similarly controlled. In this manner, the voltage regulator 100 may be controlled to respond to load transients.”].
Regarding claim 4, Jiang et al [e.g., Fig. 8] discloses a first power supply [e.g., power supply VIN_AVR corresponding to path formed by inductors and AVR bridges 210-1 and 210-2] operative to supply first current to the first circuit path at a first terminal of the first circuit path [e.g., AVR bridge 210-1 control first current]; and wherein a second terminal of the first circuit path is operative to output the first current to produce an output voltage [e.g., second AVR bridge 210-2 controls current generated by VIN_AVR to induce output voltage on main stage 110]; a second power supply operative to supply second current to the second circuit path at a first terminal of the second circuit path [e.g., power supply VIN_AVR corresponding to path formed by inductors and AVR bridges 810 and 815]; and wherein a second terminal of the second circuit path is operative to output the second current to produce the output voltage [e.g., second AVR bridge 815 controls second current generated by VIN_AVR to induce output voltage on main stage 110].
Regarding claim 5, Jiang et al [e.g., Fig. 8] discloses a first transformer [e.g., transformer formed by windings 130-1 and 140-1] including a first winding magnetically coupled to a second winding [e.g., primary winding 130-1 coupled to secondary winding 140-1], the first winding disposed in series in the first circuit path [e.g., primary winding 130 – 1 in series in path formed by inductors and AVR bridges 210-1 and 210-2]; and a second transformer including a third winding magnetically coupled to a fourth winding [e.g., second transformer including primary winding 820-2 and secondary winding 140-2], the third winding disposed in series in the second circuit path [e.g., winding 820-2 disposed in series in the path formed by inductors and AVR bridges 810 and 815].
Regarding claim 7, Jiang et al [e.g., Fig. 8] discloses wherein the first power converter circuitry [e.g., primary winding 130-1 coupled to secondary winding 140-1] and the second power converter circuitry [e.g., primary winding 130 – 1 in series in path formed by inductors and AVR bridges 210-1 and 210-2] operate in parallel to collectively produce an output voltage [e.g., operating in parallel].
Regarding claim 11, Jiang et al [e.g., Fig. 8] discloses an output node [e.g., output terminal 160] operative to output an output voltage collectively generated by the first power converter circuitry and the second power converter circuitry [e.g., outputs total output voltage induced in winding 140 – 1, …, 140-k]; wherein each power converter in the first power converter circuitry includes a respective output terminal [e.g., each power converter having respective output node connected to output terminal 160], the respective output terminals of the power converters in the first power converter circuitry operative to collectively supply first output current to the output node [e.g., output of winding 140-1 supplying first output current to output terminal 160]; wherein each power converter in the second power converter circuitry includes a respective output terminal [e.g., second power converter (windings 140-2 and 820-2) with respective output terminals], the respective output terminals of the power converter as in the second power converter circuitry operative to collectively supply second output current to the output node [e.g., output of winding 140-2 supplying second output current].
Regarding claim 12, Jiang et al [e.g., Fig. 8] discloses wherein the first circuit path [e.g., path formed by inductors and AVR bridges 210-1 and 210-2] includes a terminal operative to supply third output current to the output node [e.g., output terminal of winding 140-3 coupled to first path and supplying a third output current to output terminal 160]; and wherein the second circuit path includes a terminal operative to supply fourth output current to the output node [e.g., path formed by inductors and AVR bridges 810 and 815 output terminal of winding 140-k supplying a fourth output current].
Regarding claim 13, Jiang et al [e.g., Fig. 8] discloses wherein the third circuit path [e.g., main stages 110 – 1, …, 110 - k] includes a terminal operative to supply fifth output current to the output node [e.g., fifth output current supplied by 110 – (k-1), p. 0025 recites “FIG. 1 is a circuit diagram of a trans-inductor voltage regulator (TLVR) 100 that may be combined with AVR bridges to realize an embodiment. As can be seen from the figure, the TLVR 100 includes a multiple (“k”) of main stages (or “phases”) 110-1, 110-2, 110-3 . . . 110-k. The main stages 110-1 to 110-k include respective switching circuitry 120-1, 120-2 . . . 120-k, respective primary windings 130-1, 130-2, 130-3 . . . 130-k, and respective secondary windings 140-1, 140-2, 140-3 . . . 140-k inductively coupled to the primary winding 130-1, 130-2, 130-3 . . . 130-k. The primary windings 130-1 to 130-k are connected in series and may be inductively coupled to the secondary windings 140-1 to 140-k by one or more transformer cores. In the configuration depicted in FIG. 1, the primary windings 130-1 to 130-k are respectively coupled to the secondary windings 140-1 to 140-k by transformer cores 150-1, 150-2, 150-3 . . . 150-k. Further, the respective inductive couplings between primary windings 130-1 to 130k and secondary windings 140-1 to 140-k are imperfect, having associated inductive leakages, which are lumped for equivalent circuit purposes into a first leakage inductance 155a between primary winding 130-1 and ground, and a second leakage inductance 155b between primary winding 130k and ground.”].
Regarding claim 16, Jiang et al [e.g., Fig. 8] discloses multiple transformers including a first set of transformers [e.g., first set of transformers formed by windings 130-1 and 140-1 by windings 130-3 and 140-3] and a second set of transformers [e.g., second set of transformer formed by windings 820-2 and 140-2 and by windings 820-k and 140-k]; wherein each of the transformers in the first set is disposed in series in the first circuit path [e.g., transformer formed by windings 130-1 and 140-1 and transformer formed by windings 130-3 and 140-3 disposed in series in path formed by inductors and AVR bridges 210-1 and 210-2]; and wherein each of the transformers in the second set is disposed in series in the second circuit path [e.g., transformer formed by windings 820-2 and 140-2 and transformer formed by windings 820-k and 140-k] disposed in series in path formed by inductors and AVR bridges 810 and 815].
Regarding claim 17, Jiang et al [e.g., Fig. 8] discloses wherein the first set of transformers is operative to provide magnetic coupling between the first power converter circuitry and the first circuit path [e.g., first set of transformers formed by windings 130-1 and 140-1 by windings 130-3 and 140-3 magnetically coupled]; and wherein the second set of transformers is operative to provide magnetic coupling between the second power converter circuitry and the second circuit path [e.g., second set of transformer formed by windings 820-2 and 140-2 and by windings 820-k and 140-k magnetically coupled].
Regarding claim 20, Jiang et al [e.g., Fig. 8] discloses a method comprising: providing magnetic coupling of first power converter circuitry to a first circuit path [e.g., first set of transformers formed by windings 130-1 and 140-1 magnetically coupled]; providing magnetic coupling of second power converter circuitry to a second circuit path [e.g., second set of transformer formed by windings 820-2 and 140-2 magnetically coupled]; and providing magnetic coupling of each of the first circuit path and the second circuit path to a third circuit path [e.g., paths magnetically coupled via transformers to main stage 110].
Regarding claim 22, Jiang et al [e.g., Fig. 8] discloses a method comprising: controlling operation of first power converter circuitry to produce first output current [e.g., first output current generated by converter corresponding to winding 140-1 to output terminal 160], the first power converter circuitry magnetically coupled to a first circuit path [e.g., magnetically coupled to path formed by inductors and AVR bridges 210-1 and 210-2]; controlling operation of second power converter circuitry to produce second output current [e.g., second output current generated by converter corresponding to winding 140-2 to output terminal 160], the second power converter circuitry magnetically coupled to a second circuit path [e.g., magnetically coupled to path formed by inductors and AVR bridges 810 and 815], wherein both the first circuit path and the second circuit path are magnetically coupled to a third circuit path [e.g., path formed by inductors and AVR bridges 210-1 and 210-2 and path formed by inductors and AVR bridges 810 and 815 magnetically coupled to main stage 110]; and producing an output voltage via the first output current and the second output current [e.g., VOUT generated by currents].
Claim Rejections - 35 USC § 103
7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
8. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
9. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jiang et al (US Pub. No. 2024/0120847 A1) in view of Yao et al (US Patent No. 11,756,725 B2); (hereinafter Jiang and Yao).
Regarding claim 6, Jiang et al discloses the claimed invention except for wherein the second winding is disposed in series with the fourth winding in the third circuit path.
Yao [e.g., Fig. 40] teaches wherein the second winding is disposed in series with the fourth winding in the third circuit path [e.g., windings 4012 and 4013 connected in series in node 4022].
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Jiang with wherein the second winding is disposed in series with the fourth winding in the third circuit path as suggested by Yao to operating as a boosting circuit [e.g., col. 10 lines 56 – 63 recites “However, switching power converter 4000 could have a different topology without departing from the scope hereof. Boost windings, e.g. 4012 and 4013, of each boosted coupled inductor 4002 are optionally electrically coupled in series with tuning inductor 4006, such as via node 4022, illustrated in FIG. 40. In some embodiments, node 4022 is a reference node, e.g., a ground plane of switching power converter 4000”].
Examiner’s Note
10. Examiner has cited particular columns, paragraphs and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figure may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art disclosed by the Examiner.
11. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Allowable Subject Matter
12. Claims 8 – 10, 14 – 15 and 21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The primary reason for the indication of the allowability of claim 8 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “…third power converter circuitry magnetically coupled to a fourth circuit path; fourth power converter circuitry magnetically coupled to a fifth circuit path; and a sixth circuit path, wherein each of the fourth circuit path and the fifth circuit path are magnetically coupled to the sixth circuit path.”
The primary reason for the indication of the allowability of claim 14 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “ … a fourth circuit path magnetically coupled to the third circuit path. “
The primary reason for the indication of the allowability of claim 21 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “…providing magnetic coupling of third power converter circuitry to a fourth circuit path; providing magnetic coupling of fourth power converter circuitry to a fifth circuit path; providing magnetic coupling of each of the fourth circuit path and the fifth circuit path to a sixth circuit path; providing magnetic coupling between the third circuit path and a seventh circuit path; and providing magnetic coupling between the sixth circuit path and the seventh circuit path.”.
Conclusion
13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ULARISLAO CORDOVA whose telephone number is (571)272-4690. The examiner can normally be reached Monday-Friday 7:30 - 5:00 ET.
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/ULARISLAO CORDOVA/Examiner, Art Unit 2838
/FRED E FINCH III/Primary Examiner, Art Unit 2838
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